PBL 387 72/1
Subscriber Line
Interface Circuit (SLIC)
Key Features
• On-chip ringing generation
- Balanced, up to 81 V
Peak
- Any waveform
- 5REN ringing load
- Automatic gain control of ring signal (AGC-R)
- Short circuit safe
• Low on-hook power consumption in Active
State (65 mW @ V
Bat
= -80 V)
• Automatic current controlled battery
switching between on-hook battery (V
Bat
) and
talk battery (V
TBat
)
• Pulse metering and on-hook transmission
• UL-1950 and MTU compliant on-hook line
voltage
• 3.3 V compatible logic interface
• Silent or fast polarity reversal
• Programmable Ring-Trip current
VTB
Ringing
Control
CRING
VR
VTBAT
VBAT
BGND
Ring Trip
Detector
VCC
AGND
PRT
C1
C2
Input
Decoder and
Control
TIPX
HP
C3
DET
RINGX
Two-wire
Interface
Line Feed
Controller
PLC
LP
REF
SPR
and
Longitudinal
Signal
Suppression
Off-hook
Detector
PLD
VTX
RSN
VF Signal
Transmission
Figure 1. Block diagram.
Description
The ringing FlexiSLIC™ PBL 387 72/1 Subscriber Line
Interface Circuit (SLIC) is a 90 V bipolar integrated cir-
cuit for use in short loop applications. The PBL 387 72/1
SLIC has been optimized for low power consumption,
low total line interface cost and for a high degree of
flexibility in various applications.
The PBL 387 72/1 SLIC supplies a balanced, sinewave
or trapezoidal ringing signal of up to 81 V
Peak
(85 V
DC supply) to the subscriber line across a load of up
to 5REN. The PBL 387 72/1 supplies programmable
constant current to the subscriber loop, sourced from
the talk battery. The On-Hook line voltage of 43 V to
56 V is derived from the battery. All battery switching
is internal to the device and is automatic. To further
reduce power consumption the automatic gain control
for the ring signal (AGC-R) keeps the level always
adjusted to the maximum, that can be sourced from the
available battery.
The SLIC incorporates loop current, ground key and
ring-trip detection functions. The PBL 387 72/1 is
compatible with loop start and ground start signal-
ling. Two- to four-wire and four- to two-wire voice
frequency (vf) signal conversion is accomplished by
the SLIC in conjunction with a standard codec. The
line terminating impedance and balance impedance
is programmable and may be complex or real for
worldwide compliance.
Longitudinal balance specifications and other device
characteristics are in compliance with Telcordia (Bell-
core) and ITU-T requirements.
Tip and ring voltages are UL-1950 compliant;
i.e. no two-wire line voltage exceeds 56 V. The
PBL 387 72/1 SLIC is packaged in a surface mount
28-pin SOIC package.
PBL 387 72
Maximum Ratings
Parameter
Symbol
Min
Max
Unit
Temperature, Humidity
Storage temperature range
Operating temperature range
Operating junction temperature range, Note 1
T
Stg
T
Amb
T
J
-55
-40
-40
+150
+110
+140
°C
°C
°C
Power supply,
-40°C
≤
T
Amb
≤
+85°C
V
CC
with respect to AGND
V
TB
with respect to AGND
V
TBat
with respect to A/BGND
V
Bat
with respect to BGND, continuous
V
CC
V
TB
V
TBat
V
Bat
-0.4
V
Bat
V
Bat
-85
6.5
0.4
0.4
0.4
V
V
V
V
Power dissipation
Continuous power dissipation at T
Amb
≤
+85 °C
Peak power dissipation @ T
Amb
= +85 °C, t < 100 ms, t
Rep
> 1 sec.
P
D
P
PD
1.5
4
W
W
Ground
Voltage between AGND and BGND
V
G
-5
V
CC
V
Digital inputs, outputs
(C1, C2, C3, DET)
Input voltage
Output voltage (DET not active)
Output current (DET)
V
ID
V
OD
I
OD
-0.4
-0.4
V
CC
V
CC
30
V
V
mA
Ring voltage, input
(VR)
Input voltage
V
R
-1.1
V
CC
V
TIPX and RINGX terminals,
-40°C
≤
T
Amb
≤
+85°C, V
Bat
= -80 V
TIPX or RINGX current
TIPX or RINGX voltage, continuous (referenced to AGND)
TIPX or RINGX, pulse < 10 ms, t
Rep
> 10 s, Note 2, Note 3
TIPX or RINGX, pulse < 1 µs, t
Rep
> 10 s, Note 2, Note 3
TIP or RING, pulse < 250 ns, t
Rep
> 10 s, Note 2 , Note 3
I
TIPX
, I
RINGX
V
TA
, V
RA
V
TA
, V
RA
V
TA
, V
RA
V
TA
, V
RA
-100
V
Bat
V
Bat
–15
V
Bat
–20
V
Bat
–25
100
2
5
10
15
mA
V
V
V
V
Notes, Maximum Ratings
1. The circuit includes thermal protection. Operation above max. junction temperature may degrade device reliability.
2. With the diodes D
B
and D
TB
included, see figure 8.
3. R
F1
and R
F2
> 20
Ω
is also required. Pulse is supplied to RING and TIP outside R
F1
and R
F2
.
4. The voltage of V
TB
sets the maximum line length see figure 12. The diode D
TB
is required see figure 8.
Recommended Operating Condition
Parameter
Ambient temperature
V
CC
with respect to AGND
V
TB
with respect to A/BGND ,Note 4
V
Bat
with respect to BGND
Symbol
T
Amb
V
CC
V
TB
V
Bat
Min
-40
4.75
-32
-80
Max
+85
5.25
-10
Unit
°C
V
V
V
2
EN/LZT 146 136 R1A © Ericsson Microelectronics, December 2001
PBL 387 72
Electrical Characteristics
-40 °C
≤
T
Amb
≤
+85 °C, V
CC
= +5 V ±5 %, V
TBat
= -32 V to -10 V, V
Bat
= -80 V, V
R
= 0.81 Vpk, R
LC
= 18.7 kΩ, (I
L
= 26.8 mA), Z
L
= 600
Ω,
R
LD
= 49.9 kΩ, R
F1
= R
F2
= 0 , R
Ref
= 15.0 kΩ, R
RT
= 66.5 kΩ, C
HP
= 33 nF, C
LP
= 0.47 µF, R
T
= 120 kΩ, R
RX
= 120 kΩ, R
VR
= 200 kΩ,
C
VR
= 0.47
µF.
Current definition: current is positive if flowing into a pin unless stated otherwise. Active state includes active normal and active reverse
states unless otherwise specified.
Parameter
Ref
fig
Conditions
Min
Typ
Max
Unit
Two-wire port
Overload level, V
TRO
Off-Hook, I
LDC
≥
10 mA
On-Hook, I
LDC
≤
5 mA
Metering, I
LDC
≥
10 mA
Input impedance, Z
TRX
Longitudinal impedance, Z
LOT
, Z
LOR
Longitudinal current limit, I
LOT
, I
LOR
Longitudinal to metallic balance, B
LM
2
Active state
1% THD, Note 1
Z
LM
= 200
Ω,
f = 16 kHz
Note 2
0 < f < 100 Hz
active state
28
70
70
IEEE standard 455-1985, ZTRX = 736
Ω
0.2 kHz < f < 1.0 kHz
53
1.0 kHz < f < 3.4 kHz
53
3
active state
0.2 kHz
≤
f
≤
1.0 kHz
1.0 kHz < f < 3.4 kHz
3
active state
0.2 kHz
≤
f
≤
1.0 kHz
1.0 kHz < f < 3.4 kHz
4
active state
0.2 kHz < f < 3.4 kHz
40
58
dB
53
53
70
70
dB
dB
53
53
70
70
dB
dB
1.0
1.0
V
Peak
V
Peak
V
Peak
Ω
35
Ω/wire
mA
rms
/wire
dB
dB
0.7
Z
T
/200
20
Longitudinal to metallic balance, B
LME
E
B
LME
= 20 × Log
LO
V
TR
Longitudinal to four-wire balance, B
LFE
E
LO
B
LFE
= 20 × Log
V
TX
Metallic to longitudinal balance, B
MLE
V
B
MLE
= 20 × Log
TR
, E
RX
= 0
V
LO
C
R
L
V
TRO
I
Ldc
TIPX
VTX
R
T
1
ωC
E
RX
<< R
L
, R
L
= 600
Ω
PBL 387 72
RINGX
RSN
R
T
= 120 kΩ,
R
RX
= 120 kΩ
R
RX
Figure 2. Overload level, V
TRO
, two-wire port.
TIPX
E
Lo
C
R
LT
V
TR
R
LR
VTX
R
T
1
ωC
V
TX
<< 150
Ω,
PBL 387 72
RINGX
RSN
R
LT
= R
LR
= 300Ω or 368
Ω
R
T
= 120 kΩ,
R
RX
= 120 kΩ
R
RX
Figure 3. Longitudinal to metallic, B
LME
, and Longitudinal to four-wire, B
LFE
, balance.
EN/LZT 146 136 R1A © Ericsson Microelectronics, December 2001
3
PBL 387 72
Parameter
Four-wire to longitudinal balance, B
FLE
E
B
FLE
= 20 × Log
RX
V
Lo
Two-wire return
loss
, r
|Z
+ Z
L
|
r = 20 × Log
TRX
|Z
TRX
– Z
L
|
TIPX idle voltage, V
TI
RINGX idle voltage, V
RI
Open loop voltage, |V
TR Open
|
Ref
fig
4
Conditions
active state
0.2 kHz < f < 3.4 kHz
0.2 kHz < f < 0.5 kHz
0.5 kHz < f < 1.0 kHz
1.0 kHz < f < 3.4 kHz, Note 3
active normal, I
L
= 0
active normal, I
L
= 0
active, I
L
= 0
43
25
27
23
- 0.9
- 51
50
56
dB
dB
dB
V
V
V
Min
40
Typ
58
Max
Unit
dB
Four-wire transmit port
(VTX)
Overload level, V
TXO
Off-hook, I
L
≥
10mA
On-hook, I
L
≤
5mA
Output offset voltage,
∆V
TX
Output impedance, Z
TX
0.2 kHz < f < 3.4 kHz
5
Load impedance > 20 kΩ,
Load impedance > 20 kΩ,
1% THD, Note 4
0.5
0.5
-100
5
100
20
V
Peak
V
Peak
mV
Ω
Four-wire receive port
(receive summing node = RSN)
RSN dc offset voltage, V
RSNdc
RSN impedance
RSN current, I
RSN
, to metallic loop
current ,I
L
, gain,
α
RSN
I
RSN
= 0 mA
0.2 kHz < f < 3.4 kHz
0.3 kHz < f < 3.4 kHz
-25
10
400
25
50
mV
Ω
ratio
TIPX
C
V
Lo
R
LT
V
TR
R
LR
VTX
R
T
1
<< 150Ω, R
LT
= R
LR
= 300Ω
ωC
E
RX
PBL 387 72
RINGX
RSN
R
T
= 120kΩ,
R
RX
= 120kΩ
R
RX
Figure 4. Metallic to longitudinal, B
MLE
and four-wire to longitudinal balance, B
FLE
.
C
R
L
I
Ldc
E
L
TIPX
VTX
R
T
V
TXO
1
<< R
L
, R
L
= 600Ω
ωC
R
T
= 120kΩ,
R
RX
= 120kΩ
PBL 387 72
RINGX
RSN
R
RX
Figure 5. Overload level, V
TXO
, four-wire transmit port.
4
EN/LZT 146 136 R1A © Ericsson Microelectronics, December 2001
PBL 387 72
Parameter
Ref
fig
Conditions
Min
Typ
Max
Unit
Frequency response
Two-wire to four-wire, g
2-4
6
relative to 0 dBm, 1.0 kHz. E
RX
= 0 V
0.3 kHz < f < 3.4 kHz
f = 8.0 kHz, 12 kHz, 16 kHz
relative to 0 dBm, 1.0 kHz. E
LO
= 0 V
0.3 kHz < f < 3.4 kHz
f = 8 kHz, 12 kHz,
16 kHz
relative to 0 dBm, 1.0 kHz. E
LO
= 0 V
0.3 kHz < f < 3.4 kHz
-0.15
-0.5
-0.15
-1.0
-1.0
-0.15
-0.1
0.15
0.1
0.15
0
0
0.15
dB
dB
dB
dB
dB
dB
Four-wire to two-wire, g
4-2
6
-0.2
-0.3
Four-wire to four-wire, g
4-4
6
Insertion loss
Two-wire to four-wire, G
2-4
V
G
2-4
= 20 × Log
TX
,E
RX
= 0
V
TR
Four-wire to two-wire, G
4-2
V
G
4-2
= 20 × Log
TR
,E
L
= 0
E
RX
6
0 dBm, 1.0 kHz, Note 5
-6.22
-6.02
-5.82
dB
6
0 dBm, 1.0 kHz, Notes 5, 6
-0.2
0.2
dB
Gain tracking
Two-wire to four-wire R
LDC
≤
2kΩ
6
Ref. -10 dBm, 1.0 kHz, Note 7
-40 dBm to +3 dBm
-55 dBm to -40 dBm
Ref. -10 dBm, 1.0 kHz, Note 7
-40 dBm to +3 dBm
-55 dBm to -40 dBm
-0.1
-0.2
-0.1
-0.2
0.1
0.2
0.1
0.2
dB
dB
dB
dB
Four-wire to two-wire R
LDC
≤
2kΩ
6
Noise
Idle channel noise at two-wire port
(TIPX-RINGX)
C-message weighting
Psophometrical weighting
Note 8
7
-83
12
-78
dBrnC
dBmp
Harmonic distortion
Two-wire to four-wire
Four-wire to two-wire
6
0 dBm, 1.0 kHz test signal
0.3 kHz < f < 3.4 kHz
-50
-50
dB
dB
Battery feed characteristics
Constant loop current, I
LConst
R
LC
= 500 - 10.4×ln(32×I
LProg
)
I
LProg
I
LProg
18 < I
LProg
< 30 mA
0.94×I
LProg
I
LProg
1.06×I
LProg
mA
Loop current detector
Programmable threshold, I
LTh
I
LTh
= 500
R
LD
, I
LTh
> 10 mA
0.9×I
LTh
I
LTh
1.1×I
LTh
mA
C
TIPX
I
LDC
VTX
R
T
R
L
V
TR
E
L
1
<< R
L
, R
L
= 600Ω
ωC
E
RX
V
TX
PBL 387 72
RINGX
RSN
R
T
= 120kΩ,
R
RX
= 120kΩ
R
RX
Figure 6. Frequency response, insertion loss, gain tracking.
5
EN/LZT 146 136 R1A © Ericsson Microelectronics, December 2001
