INTEGRATED CIRCUITS
DATA SHEET
PCF2119x
LCD controllers/drivers
Product specification
Supersedes data of 1997 Nov 21
File under Integrated Circuits, IC12
1999 Mar 02
Philips Semiconductors
Product specification
LCD controllers/drivers
CONTENTS
1
1.1
2
3
4
5
6
6.1
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
7.15
7.16
7.17
8
8.1
8.2
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
FEATURES
Note
APPLICATIONS
GENERAL DESCRIPTION
ORDERING INFORMATION
BLOCK DIAGRAM
PAD INFORMATION
Pad functions
FUNCTIONAL DESCRIPTION
LCD supply voltage generator
Programming ranges
LCD bias voltage generator
Oscillator
External clock
Power-on reset
Power-down mode
Registers
Busy flag
Address Counter (AC)
Display Data RAM (DDRAM)
Character Generator ROM (CGROM)
Character Generator RAM (CGRAM)
Cursor control circuit
Timing generator
LCD row and column drivers
Reset function
INSTRUCTIONS
Clear display
Return home
Entry mode set
Display control (and partial power-down mode)
Cursor or display shift
Function set
Set CGRAM address
Set DDRAM address
Read busy flag and read address
Write data to CGRAM or DDRAM
Read data from CGRAM or DDRAM
9
9.1
9.2
9.3
9.4
9.5
9.6
9.7
9.8
9.9
9.10
10
10.1
10.2
11
12
13
14
15
16
16.1
16.2
16.3
16.4
17
18
19
20
PCF2119x
EXTENDED FUNCTION SET
INSTRUCTIONS AND FEATURES
New instructions
Icon control
IM
IB
Normal/icon mode operation
Screen configuration
Display configuration
TC1 and TC2
Set V
LCD
Reducing current consumption
INTERFACES TO MPU
Parallel interface
I
2
C-bus interface
LIMITING VALUES
HANDLING
DC CHARACTERISTICS
AC CHARACTERISTICS
TIMING CHARACTERISTICS
APPLICATION INFORMATION
8-bit operation, 1-line display using external
reset
4-bit operation, 1-line display using external
reset
8-bit operation, 2-line display
I
2
C-bus operation, 1-line display
BONDING PAD LOCATIONS
DEFINITIONS
LIFE SUPPORT APPLICATIONS
PURCHASE OF PHILIPS I
2
C COMPONENTS
1999 Mar 02
2
Philips Semiconductors
Product specification
LCD controllers/drivers
1
FEATURES
PCF2119x
•
Single-chip LCD controller/driver
•
2-line display of up to 16 characters + 160 icons, or
1-line display of up to 32 characters + 160 icons
•
5
×
7 character format plus cursor; 5
×
8 for kana
(Japanese) and user defined symbols
•
Icon mode: reduced current consumption while
displaying icons only
•
Icon blink function
•
On-chip:
– Generation of LCD supply voltage, independent of
V
DD
, programmable by instruction (external supply
also possible)
– Temperature compensation of on-chip generated
V
LCD
:
−8
to
−12
mV/K at 5.0 V (programmable by
instruction)
– Generation of intermediate LCD bias voltages
– Oscillator requires no external components
(external clock also possible).
•
Display Data RAM: 80 characters
•
Character Generator ROM: 240, 5
×
8 characters
•
Character Generator RAM: 16, 5
×
8 characters;
4 characters used to drive 160 icons, 8 characters used
if icon blink feature is used in application
•
4 or 8-bit parallel bus and 2-wire
•
CMOS compatible
•
18 row and 80 column outputs
•
Multiplex rates 1 : 18 (for normal operation), 1 : 9 (for
single line operation) and 1 : 2 (for icon only mode)
•
Uses common 11 code instruction set (extended)
•
Logic supply voltage range, V
DD
−
V
SS
= 2.2 to 4.0 V
(up to 5.5 V if external V
LCD
is used); chip may be driven
with two battery cells
•
Display supply voltage range, V
LCD
−
V
SS
= 2.2 to 6.5 V
4
ORDERING INFORMATION
TYPE
NUMBER
PC2119RU/2
PC2119SU/2
PC2119VU/2
PACKAGE
NAME
−
−
−
chip with bumps in tray
chip with bumps in tray
chip with bumps in tray
DESCRIPTION
VERSION
−
−
−
I
2
C-bus
interface
•
Very low current consumption (20 to 200
µA):
– Icon mode: <25
µA
– Power-down mode: <2
µA.
1.1
Note
Icon mode is used to save current. When only icons are
displayed, a much lower operating voltage V
LCD
can be
used and the switching frequency of the LCD outputs is
reduced. In most applications it is possible to use V
DD
as
V
LCD
.
2
APPLICATIONS
•
Telecom equipment
•
Portable instruments
•
Point-of-sale terminals.
3
GENERAL DESCRIPTION
The PCF2119x is a low power CMOS LCD controller and
driver, designed to drive a dot matrix LCD display of 2-line
by 16 or 1-line by 32 characters with 5
×
8 dot format.
All necessary functions for the display are provided in a
single chip, including on-chip generation of LCD bias
voltages, resulting in a minimum of external components
and lower system current consumption. The PCF2119x
interfaces to most microcontrollers via a 4 or 8-bit bus or
via the 2-wire I
2
C-bus. The chip contains a character
generator and displays alphanumeric and kana
(Japanese) characters. The letter ‘x’ in PCF2119x
characterizes the built-in character set. Various character
sets can be manufactured on request.
1999 Mar 02
3
Philips Semiconductors
Product specification
LCD controllers/drivers
5
BLOCK DIAGRAM
PCF2119x
handbook, full pagewidth
C1 to C80
118 to 127, 106 to 92
87 to 73, 71 to 57,
52 to 38, 16 to 25
80
R17DUP
72
R1 to R18
27 to 34,
116 to 109,
26, 117
18
ROW DRIVERS
18
SHIFT REGISTER 18-BIT
VLCD1
12, 13
BIAS
VOLTAGE
GENERATOR
COLUMN DRIVERS
80
DATA LATCHES
VLCD2
14, 15
VLCD
GENERATOR
80
SHIFT REGISTER 5
×
12 BIT
5
OSCILLATOR
CURSOR AND DATA CONTROL
5
144
OSC
VDD1
VDD2
VSS1
VSS2
1, 2
3, 4
8, 9
10, 11
CHARACTER
GENERATOR
RAM (128
×
5)
(CGRAM)
16 CHARACTERS
8
CHARACTER
GENERATOR
ROM
(CGROM)
240 CHARACTERS
TIMING
GENERATOR
T1
T2
T3
6
7
7
129
DISPLAY DATA RAM
(DDRAM)
80 CHARACTERS/BYTES
7
ADDRESS COUNTER
(AC)
7
7
INSTRUCTION
DECODER
7
DISPLAY
ADDRESS
COUNTER
131
PD
DATA
REGISTER
(DR)
8
136
DB0/SA0
137 to 139
DB1 to DB3
8
BUSY
FLAG
INSTRUCTION
REGISTER
8
I/O BUFFER
140 to 143
E
5
134
135
RS
128
SCL
132, 133
MGK891
PCF2119x
130
POR
DB4 to DB7
R/W
SDA
Fig.1 Block diagram.
1999 Mar 02
4
Philips Semiconductors
Product specification
LCD controllers/drivers
6
PAD INFORMATION
PCF2119x
The identification of each pad and its location is given in Chapter 17.
6.1
Pad functions
Pad function description
DESCRIPTION
Supply voltage for all except the high voltage generator.
Supply voltage for the high voltage generator.
This is the ground pad for all except the high voltage generator.
This is the ground pad for the high voltage generator.
This input is used for the generation of the LCD bias levels.
This is the V
LCD
output pad if V
LCD
is generated internally. This pad must be connected to V
LCD1
.
The data bus clock input is set HIGH to signal the start of a read or write operation; data is clocked in
or out of the chip on the negative edge of the clock; note 1.
These are three test pads. T1 and T2 must be connected to V
SS1
; T3 is left open-circuit and is not user
accessible.
Table 1
SYMBOL
V
DD1
V
DD2
V
SS1
V
SS2
V
LCD1
V
LCD2
E
T1
T2
T3
R1 to R18;
R17DUP
C1 to C80
SCL
POR
PD
SDA
R/W
RS
LCD row driver outputs R1 to R18; these pads output the row select waveforms to the display;
R17 and R18 drive the icons. R17 has two pads R17 and R17DUP.
LCD column driver outputs C1 to C80.
I
2
C-bus serial clock input; note 1.
External power-on reset input.
PD selects the chip power-down mode; for normal operation PD = 0.
I
2
C-bus serial data input/output; note 1.
This is the read/write input. R/W selects either the read (R/W = 1) or write (R/W = 0) operation. This
pad has an internal pull-up resistor.
The RS input selects the register to be accessed for read and write. RS = 0, selects the instruction
register for write and the busy flag and address counter for read. RS = 1, selects the data register for
both read and write. This pad has an internal pull-up resistor.
The 8-bit bidirectional data bus (3-state) transfers data between the system controller and the
PCF2119x. DB7 may be used as the busy flag, signalling that internal operations are not yet
completed. In 4-bit operations the 4 higher order lines DB7 to DB4 are used; DB3 to DB0 must be left
open-circuit. Data bus line DB3 has an alternative function (SA0), when selected this is the I
2
C-bus
address pad. Each data line has its own internal pull-up resistor; note 1.
Oscillator or external clock input. When the on-chip oscillator is used this pad must be connected to
V
DD1.
DB0 to DB7
OSC
Note
1. When the I
2
C-bus is used, the parallel interface pad E must be at logic 0. In the I
2
C-bus read mode DB7 to DB0
should be connected to V
DD1
or left open-circuit.
a) When the parallel bus is used, pads SCL and SDA must be connected to V
SS1
or V
DD1
; they must not be left
open-circuit.
b) If the 4-bit interface is used without reading out from the PCF2119x (i.e. R/W is set permanently to logic 0), the
unused ports DB0 to DB4 can either be set to V
SS1
or V
DD1
instead of leaving them open-circuit.
1999 Mar 02
5
