PCLT-2A
Dual current limited overvoltage protected digital termination
Datasheet
−
production data
Features
■
2 channel topology: low side input with
common ground
Wide range input DC voltage:
– V
I
= - 0.3 to 30 V with R
I
= 0
Ω
– V
I
= - 30 to 35 V with R
I
= 750
Ω
Current limiter:
– 3 to 7.5 mA programmable reference
– I
LIM
= 6.1 mA to 8.8 mA with R
REF
= 10 kΩ
– I
LIM
= 2.8 mA to 4.3 mA with R
REF
= 22 kΩ
– Narrow limiter spread: < 17%
– Temperature compensated operation
Output drive:
– No output activation below 2 mA input
– 1.5 mA minimum output activating current
in opto-coupler mode
– Programmable CMOS output mode option
(V
MOD
> 2.9 V)
LED drive for sensor status: 4.4 mA typical with
R
REF
= 10 kΩ
Input protection (R
I
= 750
Ω
C
IN
= 22 nF)
IEC 61000-4-2 ESD, Level 4
– In contact, ± 8 kV; in air, ± 15 kV
– Criteria B: temporary disruption
IEC 61000-4-5 voltage surge, Level 3
– ± 500 V with 42
Ω
series resistor in
differential mode
– Criteria B: temporary disruption
IEC 61000-4-4 transient burst immunity
– ± 4 kV peak voltage; 5 kHz repetitive rate
– Criteria A: fully functional
IEC 61000-4-6 conducted RFI
– 10 V
RMS
– Criteria A: fully functional
Input protection against -30 V reverse polarity
Ambient temperature: -25 to 85 °C
■
TSSOP14
Exposed pad
■
Benefits
■
Enable input to meet type1, 2 and 3
characteristics of IEC 61131-2 standard
Compatible operation with 2 and 3 wires
proximity sensor according EN60947-5-2
standard
Flexible configuration driving either opto-
coupler, or CMOS bus controller input, or 12 V
AS-Interface network
Reduced overall dissipation
Enhanced functional reliability
Compact with high integration
Surface mount package for highly automated
assembly
Insensitive to the on-state sensor impedance
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Applications
■
Type 1, 2 and 3 logic input termination for
industrial automation
AS-Interface bus input termination
I/O termination in programmable logic
controller
Proximity detector interface
Decentralized input / output modules
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March 2012
This is information on a product in full production.
Doc ID 11821 Rev 2
1/20
www.st.com
20
Contents
PCLT-2A
Contents
1
2
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.1
2.2
2.3
IEC61000-4 standard compliance application diagrams . . . . . . . . . . . . . . 3
Functional characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3.1
2.3.2
2.3.3
The VMOD pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
OFF state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
ON state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
4
5
6
Surge voltage test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input reverse polarity robustness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Programming of the PCLT-2A according to input type requirement . 15
Unisolated AS-Interface bus application diagram . . . . . . . . . . . . . . . . 16
6.1
6.2
6.3
AS-Interface bus application overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Isolation of the sensor section and the supply from data/supply bus . . . . 16
Unisolated connection of the PCLT with AS-Interface controller . . . . . . . 17
7
8
9
10
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20
Doc ID 11821 Rev 2
PCLT-2A
Description
1
Description
The PCLT-2A is a dual input current limiter device designed for 24 V DC automation
applications.
This product is compatible with the type 2 (7.5 mA) or type 3 (3 mA) characteristic of the IEC
61131-2 standard. An internal resistance R
REF
allows the limiting current value to be
adjusted from 3 to 7.5 mA.
Each input voltage clamping block protects the module input against electromagnetic
interference such as those described in the IEC 61131-2 standard, IEC 61000-4-2 (ESD),
4-4 (transient burst), 4-5 (voltage surge) and 4-6 (conducted radio frequency interference)
standards. The supply input is also designed with such a protection structure.
The low tolerance of the current limitation allows a drastic reduction in the dissipation of the
input compared to a resistive input. The PCLT2 is packaged in TSSOP14 - a very low R
TH
exposed pad package that allows the PCB cooling pad to be reduced.
The output block of each termination channel transfers the input logic state to a logic output
and a light emitting diode (LED).
2
2.1
Characteristics
IEC61000-4 standard compliance application diagrams
Figure 1.
Isolated digital input diagram with opto-coupler driving output
V
I
2 wires sensor
V
IN
IN
1
R
I
R
I
C
I
LED
1
C
I
IN
2
R
C
C
C
V
C
R
REF
REF
COM
P
V
C
OUT
2
LED
2
MOD
COM
S
OUT
1
3 wires sensor
V
CC
Reverse polarity
1N4007
PCLT-2A
Doc ID 11821 Rev 2
3/20
Characteristics
Figure 2.
PCLT-2A
Unisolated digital input diagram with programmable CMOS output
PCLT-2A
V
I
2 wires sensor
R
I
R
I
V
C
R
C
C
C
R
REF
COM
P
Supply voltage
protection
SM15T39
Reverse polarity
1N4007
V
IN
IN
1
C
I
C
I
IN
2
V
C
REF
OUT
2
LED
2
MOD
COM
S
IN
2
BUS
CONTROLLER
V
DD
V
SS
OUT
1
LED
1
IN
1
3 wires sensor
V
CC
V
DD
GND
V
CC
5V
SUPPLY
Figure 3.
PCLT-2A pinout
IN
1
COM
P
IN
2
COM
P
V
C
N.C.
REF
1
2
3
4
5
6
7
14
13
12
11
10
9
8
OUT
1
COM
S
OUT
2
COM
S
MOD
LED
1
LED
2
N.C.: Not Connected
4/20
Doc ID 11821 Rev 2
PCLT-2A
Figure 4.
PCLT-2A termination block diagram
CURRENT LIMITER I
LIM
OUTPUT INTERFACE
Characteristics
IN
1
60% . I
LIM
LO
OPTO
LED
1
OUT
1
30% . I
LIM
10% . I
LIM
LO
EN
OVER VOLTAGE
PROTECTION
V
MOD
1.4 V
V
DD
EN
V
CC
MOD
50µA
CMOS
COM
P
CHANNEL #1
IN
2
V
C
BIASING
CIRCUIT
IN
1
LO
2mA 5V
LED
2
CURRENT
REFERENCE
CHANNEL #2
OUT
2
COM
S
REF
Figure 5.
Static characteristic of a type-2 digital input using PCLT-2A
30
25
20
D
V
F
= 0.7V; R
I
= 750
W
V
I
= V
IN
+ V
F
+ R
I
x I
IN
R
I
30
6.1
8.8
8.5
ON
ON
11
V
I
(V)
15
10
5
11
OFF
OFF
2
0
0
2
6
I
IN
(mA)
30
Doc ID 11821 Rev 2
5/20
微控制器 MCU
