Product Specification
PE3511
Product Description
The PE3511 is a high-performance static
UltraCMOS™
prescaler with a fixed divide ratio of 2. Its operating frequency
range is DC to 1500 MHz. The PE3511 operates on a nominal
3 V supply and draws only 8 mA. The input and output
interfaces support both AC-coupled, low-Z RF as well as direct
connection to low voltage positive logic devices. It is packaged
in a small 6-lead SC-70 and is ideal for frequency scaling
solutions
The PE3511 is manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi©) CMOS process, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
1500 MHz Low Power UltraCMOS™
Divide-by-2 Prescaler
Features
•
DC to 1500 MHz operation
•
Fixed divide ratio of 2
•
Low-power consumption: 8 mA typical
@ 3V
•
RF or LV Digital Interface
•
Ultra-small package: 6-lead SC-70
Figure 1. Functional Schematic Diagram
Figure 2. Package Type
6-lead SC70
D
Q
IN
PREAMP
OUT
DRIVER
OUTPUT BUFFER
CLK
QB
Table 1. Electrical Specifications
(Z
S
= Z
L
= 50
Ω
)
V
DD
= 3.0 V, -40° C
≤
T
A
≤
85° C, unless otherwise specified
Parameter
Supply Voltage
Supply Current
Input Frequency (F
in
)
Conditions
Minimum
2.85
Typical
3.0
8
Maximum
3.15
12
1500
+10
Units
V
mA
MHz
dBm
dBm
dBm
DC
DC <
Fin
≤
1000 MHz
-10
0
2
Input Power (P
in
)
1000 MHz < Fin
≤
1500
Output Power (P
out
)
DC < Fin
≤
1500 MHz
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©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 8
PE3511
Product Specification
Table 2. DC Electrical Characteristics (-40° C
≤
T
A
≤
85° C)
Symbol
V
IH
V
IL
V
OH
V
OL
Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Condition
2.7 V
≤
V
DD
≤
3.3 V
2.7 V
≤
V
DD
≤
3.3 V
V
DD
= 2.7 V; I
OH
= 2.9 mA
V
DD
= 2.7 V; I
OL
= 2.6 mA
Typical
2.0
0.8
2.2
0.4
Unit
V
V
V
V
Table 3. AC Characteristics (-40° C
≤
T
A
≤
85° C)
Symbol
t
PHL
t
PLH
t
r
t
f
Parameter
Propagation Delay
(High to Low)
Propagation Delay
(Low to High)
Output Rise Time
(10% to 90%)
Output Fall Time
(90% to 10%)
Condition*
50 MHz Pulse Train Input;
C
L
= 10 pF, R
L
= 500
Ω
50 MHz Pulse Train Input;
C
L
= 10 pF, R
L
= 500
Ω
50 MHz Pulse Train Input;
C
L
= 10 pF, R
L
= 500
Ω
50 MHz Pulse Train Input;
C
L
= 10 pF, R
L
= 500
Ω
Typical
2.6
2.8
2.2
2.1
Unit
ns
ns
ns
ns
* See figure 5 for AC test circuit
Table 4. Typical Output Swing (V
DD
= 2.7 V)
Frequency
50 MHz
500 MHz
1500 MHz
Condition
200 mVp-p Sinusoidal Input;
C
L
= 10 pF, R
L
= 500
Ω
200 mVp-p Sinusoidal Input;
C
L
= 10 pF, R
L
= 500
Ω
200 mVp-p Sinusoidal Input;
C
L
= 10 pF, R
L
= 500
Ω
Typical
2.3
1.9
1.6
Unit
Vp-p
Vp-p
Vp-p
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 8
Document No. 70-0106-03
│
UltraCMOS™ RFIC Solutions
PE3511
Product Specification
Figure 3. Pin Configuration (Top View)
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 6.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
pin 1
NC
GND
IN
1
6
OUT
GND
V
DD
.
511
SC-70
2
5
3
4
Table 5. Pin Descriptions
Pin
No.
1
2
Pin
Name
N/C
GND
Device Functional Considerations
Description
No Connect. This pin should be left open.
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
Input signal pin. DC blocking capacitor
required (100 pF typical).
Power supply pin. Bypassing is required.
Ground pin.
Divided frequency output pin. DC blocking
capacitor required (100 pF typical).
3
4
5
6
IN
V
DD
GND
OUT
The
PE3511
divides an input signal, up to a
frequency of 1500 MHz, by a factor of two thereby
producing an output frequency at half the input
frequency. To work properly with low impedance,
ground referenced interfaces, the input and output
signals (pins 3 & 6) must be AC coupled via an
external capacitor, as shown in the test circuit in
Figure 4.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance. See Figure 9 for a layout example.
Table 6. Absolute Maximum Ratings
Symbol
V
DD
P
in
T
ST
T
OP
VESD
Parameter/Conditions
Supply voltage
Input Power
Storage temperature range
Operating temperature
range
ESD voltage (Human Body
Model)
Min
Max
4.0
13
Units
V
dBm
°C
°C
V
-65
-40
150
85
2000
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage. Exposure
to absolute maximum ratings for extended periods
may affect device reliability.
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Page 3 of 8
PE3511
Product Specification
Figure 4. Test Circuit Block Diagram
Spectrum
Analyzer
1 N/C
2 GND
50 Ohm
100 pF
VDD
3V +/- 0.15 V
100 pF
1000 pF
3 IN
OUT 6
100 pF
GND 5
VDD 4
50 Ohm
PE3511
Signal
Generator
Figure 5. AC Test Circuit
V
DD
Pulse
Generator
PE3511
C
L
R
T
R
L
R
T =
Zout of pulse generator
(usually 50 ohm)
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 8
Document No. 70-0106-03
│
UltraCMOS™ RFIC Solutions
PE3511
Product Specification
Typical Performance Data: V
DD
= 3.0 V
Figure 6. Input Sensitivity
Figure 7. Device Current
Figure 8. Output Power
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©2005 Peregrine Semiconductor Corp. All rights reserved.
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