P r e l i m i na r y D at a Sh ee t , R ev . 1. 1 , J a n. 20 0 5
VDSL6100i
Int eg ra te d V DSL M ode m-on -C hip
PEF 2 282 7, Ve rsio n 1.1
Wire line Co mm unica tion s
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The information in this document is subject to change without notice.
Edition 2005-01-30
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
81669 München, Germany
©
Infineon Technologies AG 2005.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
VDSL6100i
Revision History:
Previous Version:
Page
2005-01-30
None, First Release
Rev. 1.1
Subjects (major changes since last revision)
Update of Terminology, Register list and definitions, etc.
VDSL6100i
PEF 22827
Preface
The PEF 22827 is an integrated VDSL modem-on-chip. It combines all the required
functionality for standard 4-band VDSL over a twisted pair. This modem-on-chip includes
a digital data transceiver supporting Ethernet interface, an analog front end (AFE)
handling the VDSL QAM functionality and an internal line driver to provide transmission
level to the line.
System functionality complies with ITU-T and ETSI standards for VDSL.
About This Document
This data sheet is organized as follows:
•
•
•
Product Overview
on
Page 19,
lists the main features and suggests typical
applications.
Pin and Signal Descriptions,
starting on
Page 22,
shows the logic symbol and pin
layout, lists all pins, and shows pin to signal assignment in different operation modes.
Functional Overview,
starting on
Page 55,
describes the functions of the
PEF 22827 as a whole, followed by the functions of the digital, analog and line driver
blocks, in separate sections. Block diagrams and firmware options are included.
Operation – Digital Block,
starting on
Page 81,
describes the operation of the digital
block, which controls the analog block. The description includes configuration pins,
the system clock, EEPROM, internal RAM management, and the boot process.
Operation – Line Driver
describes the computation of line driver gain and the line
driver shut down procedure.
Interfaces,
starting on
Page 134,
includes the JTAG interface (boundary scan),
management, network and EOC interfaces, and the I
2
C interface for EEPROM.
The
Memory and Register Descriptions – Digital Block
and
Memory and
Register Descriptions – Analog Block
sections, starting on
Page 171,
describe
memory mapping and registers for the digital and analog blocks, respectively. These
sections include lists of registers by address and by type, and links to the detailed
description of each register.
Electrical Characteristics - Overview,
starting on
Page 266,
specifies maximum
ratings, recommended operating conditions, heat dissipation parameters and AC/DC
characteristics for the integrated chip first, and then for the digital, analog and line
driver blocks.
Package Outline
on
Page 290.
A
Terminology
section – to help you define acronyms and expressions.
A
References
list – to help you find information not in this data sheet.
An
Index
– to help you find specific information.
4
Rev. 1.1, 2005-01-30
•
•
•
•
•
•
•
•
In addition, for convenience, the following sections are included after the last chapter:
Preliminary Data Sheet
VDSL6100i
PEF 22827
Table of Contents
Page
Preface
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
About This Document
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1
1.1
1.2
1.3
2
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.3.9
2.4
2.4.1
2.4.1.1
2.4.1.2
2.4.1.3
2.4.2
3
3.1
3.2
3.3
3.4
3.5
4
4.1
4.2
4.3
4.3.1
4.3.2
4.4
4.4.1
Product Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin and Signal Descriptions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Master Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Lists by Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
General Purpose Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Interface Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Embedded Overhead Channel (EOC) and PCM Pins . . . . . . . . . . . . . .
Ethernet Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Parallel Port Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UART Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EEPROM Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Test Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Supply and Ground Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin and Signal Assignment in Different Modes . . . . . . . . . . . . . . . . . . . . .
Ethernet Interface Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MII Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
RMII Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial MII Slave Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ethernet Serial Management Interface Modes . . . . . . . . . . . . . . . . . . .
Functional Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Block - Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog Block - Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Line Driver Block - Functional Overview . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
JTAG Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description – Digital Block
. . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Diagram – Digital Block . . . . . . . . . . . . . . . . . . . . . . . . .
Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Physical Media Dependent (PMD) Layer . . . . . . . . . . . . . . . . . . . . . . . . . .
QAM Modulator (Transmitter) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
QAM Demodulator (Receiver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Physical Medium Specific Transmission Convergence (PMS-TC) Layer .
Transmission Path Tasks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
20
21
21
22
23
25
39
40
41
41
43
45
46
46
46
47
49
49
50
51
52
53
55
55
55
55
55
57
58
58
60
60
60
62
62
62
Preliminary Data Sheet
5
Rev. 1.1, 2005-01-30
ARM技术
