PI49FCT3805/PI49FCT3806
3.3V Fast CMOS Buffer/Clock Driver
Features
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3.3V version of PI49FCT805/806
Extremely low output skew: 0.5ns
Monitor ouput pin
Clock busing wih 3-state control
TTL input and CMOS output compatible
Industrial operation at –40°C to 85°C
Extremely low static power (1mW, typ.)
Hysteresis on all inputs
Packaging:
– 20-pin 300-mil wide SOIC (S)
– 20-pin 150-mil wide QSOP (Q)
– 20-pin 209-mil wide SSOP (H)
Description
Pericom Semiconductor’s PI49FCT3805 is a 3.3V non-inverting
clock driver and the PI49FCT3806 is a 3.3V inverting clock driver
designed with two independent groups of buffers. These buffers
have 3-state Output Enable inputs (active LOW) with a 1-in, 5-out
configuration per group. Each clock driver consist of two banks of
drivers, driving five outputs each from a standard TTL compatible
CMOS input.
PI49FCT3805 Block Diagram
PI49FCT3806 Block Diagram
OE
A
IN
A
5
OA
0-4
OE
A
IN
A
5
OA
0-4
IN
B
OE
B
5
OB
0-4
IN
B
OE
B
5
OB
0-4
MON
MON
1
PS7007E
09/16/04
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Pin Description
Pin Name
OE
A
, OE
B
IN
A
, IN
B
O
A
N
,
O
B
N
MON
GND
V
CC
Description
3-State Output Enable Inputs (Active LOW)
Clock Inputs
Clock Outputs
Monitor Output
Ground
Power
PI49FCT3805 Pin Configuration
V
CCA
A
GND
O
A
0
B
0
O
A
1
A
2
V
CC
O
GND
A
B
1
GND
O
A
3
A
4
O
B
2
GND
Q
V
CC
OE
A
B
3
IN
A
GND
1
20
PI49FCT3805 Truth Table
(1)
V
CCB
V
CC
B
9
0
O
B
B
8
1
O
B
GND
O
B
2
Inputs
OE
A
,
OE
B
L
L
H
H
IN
A
, IN
B
L
H
L
H
L
H
Z
Z
Outputs
O
A
N
,
O
B
N
2
3
19
18
MON
L
H
L
H
4
17
5
16
6
7
15
14
GND
B
7
B
V
CC
O
B
3
B
6
4
O
B
MON
GND
8
13
9
12
10
11
OE
B
5
B
IN
B
4
B
Note:
1. H = High Voltage Level, L = Low Voltage Level
Z = High Impedance
PI49FCT3806 Pin Configuration
V
CCA
A
OA
0
GND
OA
1
0
B
OA
2
V
CC
GND
A
1
B
OA
3
GND
OA
4
2
B
GND
Q
V
CC
OE
A
3
B
IN
A
GND
PI49FCT3806 Truth Table
(1)
V
CCB
V
CC
OB
B
9
0
OB
B
8
1
OB
2
GND
GND
B
7
B
OB
3
V
CC
OB
B
6
4
MON
GND
OE
B
5
B
IN
B
4
B
1
20
2
3
19
18
4
17
5
16
6
7
15
14
Inputs
OE
A
,
OE
B
IN
A
, IN
B
L
L
L
H
H
L
H
H
Outputs
OA
N
, OB
N
MON
H
H
L
L
Z
H
Z
L
8
13
9
12
10
11
Note:
1. H = High Voltage Level, L = Low Voltage Level
Z = High Impedance
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(1)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
3.0
6.0
Max.
6.0
8.0
Units
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
2
PS7007E
09/16/04
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................. –65°C to +150°C
Ambient Temperature with Power Applied ............................ –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & Vcc Only) ...... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & I/O Only)..... –0.5V to +7.0V
DC Input Voltage ..................................................................... –0.5V to +7.0V
DC Output Current............................................................................... 120 mA
Power Dissipation .................................................................................... 0.5W
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in
the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
DC Electrical Characteristics
(T
A
= –40°C to +85°C, V
CC
= 3.3V ±0.3V)
Symbol
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
I
OS
V
H
Parameter
Output High Voltage
V
CC
= 3.0V, V
IN
= V
IL
or V
IH
Output Low Voltage
V
CC
= 3.0V, V
IN
= V
IL
or V
IH
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
High Impedance Output
Current
High Impedance Output
Current
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Short Circuit
(5)
Current
Input Hysteresis
Test Condition
(1)
Min.
V
CC
-0.2
2.4 (3)
Typ.
-
3.0
-
0.2
0.3
2.0
-0.5
-1
-1
-1
-1
-0.7
-35
50
-60
-86
168
-135
150
0.2
0.4
0.5
5.5
0.8
1
1
µA
1
1
-1.2
-110
200
-240
Ω
mA
V
Max.
Units
V
CC
= Min.,
V
IN
= V
IH
or V
IL
V
CC
= Min.,
V
IN
= V
IH
or V
IL
Guaranteed Logic
HIGH level
Guaranteed Logic
LOW level
V
CC
= Max
V
CC
= Max
V
CC
= Max.,
All outputs Disabled
V
CC
= Max.,
All outputs Disabled
V
CC
= Min., I
IN
= -18mA
V
OUT
= 3.3V, V
IN
=V
IL
or V
IH,
V
OUT
= 1.5V
(4)
V
OUT
= 3.3V, V
IN
= V
IL
or V
IH,
V
OUT
= 1.5V
(4)
V
CC
= Max., V
OUT
= GND
(5)
I
OH
= -0.1mA
I
OH
= -8mA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
Input Pins
Input Pins
V
IN
= V
CC
(Input Pins)
V
IN
= GND
(Input & I/O Pins)
V
OUT
= V
CC
V
OUT
= GND
V
OUT
= V
CC
V
OUT
= GND
V
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3.
V
OH
= V
CC
– 0.6V
at rated current.
4. This parameter is determined by device characterization but is not production tested.
5. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
3
PS7007E
09/16/04
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Power Supply Characteristics
(T
A
= –40°C to +85°C, V
CC
= 3.3V ±0.3V)
Parameters
I
CC
ΔI
CC
Description
Quiescent Power
Supply Current
Supply Current per
Inputs @ TTL HIGH
V
CC
=
Max.
V
CC
= Max.
V
CC
= Max.,
Outputs Open
OE
A
or
OE
B
= GND
Per Output Toggling
50%
Duty Cycle
V
CC
= Max.,
Outputs Open
FO = 10 MHz
50%
Duty Cycle
OE
A
or OE
B
= GND
Mon. Outputs Toggling
V
CC
= Max.,
Outputs Open
f
O
= 2.5 MH
Z
50%
Duty Cycle
OE
A
or
OE
B
= GND
Eleven Outputs Toggling
V
IN
= V
CC
V
IN
= GND
V
IN
=
V
CC
–
0.6V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
V
IN
=
V
CC
–
0.6V
V
IN
= GND
—
3.3
9.0
(5)
10.0
(5)
mA
—
—
1.8
1.8
6.0
(5)
7.0
(5)
Test Conditions
(1)
Min.
—
—
11
V
IN
= GND
or
V
CC
V
IN
= V
CC
–
0.6V
(3)
V
IN
= V
CC
V
IN
= GND
Typ
(2)
Max.
30
Units
µA
300
I
CCD
Supply Current per
Input per MHz
(4)
—
0.1
0.16
mA/
MH
Z
—
3.3
I
C
Total Power Supply
Current
(6)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at V
CC
= 3.3V, +25°C ambient.
3. Per TTL driven input (V
IN
=
V
CC
– 0.6V);
all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the
I
C
formula. These limits are guaranteed but not tested.
6.
I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
ΔI
CC
D
H
N
T
+ I
CCD
(f
O
N
O
)
I
CC
=
Quiescent Current
ΔI
CC
= Power Supply Current for a TTL High Input (V
IN
=
V
CC
– 0.6V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at
D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
O
= Output Frequency
N
O
= Number of Outputs at f
O
All currents are in milliamps and all frequencies are in megahertz.
4
PS7007E
09/16/04
PI49FCT3805/3806
3.3V Fast CMOS Buffer/Clock Driver
Switching Characteristics
(T
A
= –40°C to +85°C, V
CC
= 3.3V ±0.3V)
Parameter
Description
Propagation Delay
IN
A
to OA
N
,
IN
B
to OB
N
Output Enable Time
OE
A
to OA
N
, OE
B
to OB
N
Output Disable Time
OE
A
to OA
N
, OE
B
to OB
N
Skew between two outputs of
same package (same transis-
tion)
Skew between opposite transi-
tions (
tPHL
- t
PLH
) of the same
output
Skew between two outputs of
different package at same tem-
perature (Same traansition)
Test
Conditions
(Note 1)
3805/
3806
Com.
Min.
1.5
1.5
1.5
C
L
= 50pF
R
L
= 500Ω
Max.
6.5
8.0
7.0
0.7
3805A/
3806A
Com.
Min.
1.5
1.5
1.5
Max.
5.8
8.0
7.0
0.7
3805B/
3806B
Com.
Min.
1.5
1.5
1.5
Max.
5.0
6.5
6.0
0.5
3805C/
3806C
Com.
Min.
1.5
1.5
1.5
Max.
4.5
6.2
5.0
0.5
ns
Units
t
PLH
t
PLH
t
PZH
t
PZL
t
PHL
t
PLZ
t
SK(o)
(3)
t
SK(P)
(3)
1.0
0.7
0.5
0.5
t
SK(t)
(3)
1.5
1.2
1.0
0.8
Note:
1. See test circuit and waveforms
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew measured at worst cast temperature (max. temp).
Tests Circuits for All Outputs
(1)
except for F
IN
>100 MHz
6.0V
V
CC
Switch Position
Test
Disable LOW
Enable LOW
Disable HIGH
Enable HIGH
All Other Inputs
500Ω
Switch
6V
GND
Open
Pulse
Generator
V
IN
D.U.T.
V
OUT
R
T
50pF
C
L
Definitions:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to ZOUT of the Pulse
Generator.
500Ω
5
PS7007E
09/16/04
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