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PI6C2402-WIEX

6C SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, 0.150 INCH, PLASTIC, SOIC-8

器件类别:逻辑    逻辑   

厂商名称:Pericom Semiconductor Corporation (Diodes Incorporated)

厂商官网:https://www.diodes.com/

器件标准:  

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Pericom Semiconductor Corporation (Diodes Incorporated)
零件包装代码
SOIC
包装说明
SOP,
针数
8
Reach Compliance Code
compliant
系列
6C
输入调节
STANDARD
JESD-30 代码
R-PDSO-G8
JESD-609代码
e3
长度
4.9 mm
逻辑集成电路类型
CLOCK DRIVER
湿度敏感等级
1
功能数量
1
反相输出次数
端子数量
8
实输出次数
1
最高工作温度
85 °C
最低工作温度
-40 °C
输出特性
SERIES-RESISTOR
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
认证状态
Not Qualified
座面最大高度
1.75 mm
最大供电电压 (Vsup)
3.465 V
最小供电电压 (Vsup)
3.135 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
温度等级
INDUSTRIAL
端子面层
MATTE TIN
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
40
宽度
3.9 mm
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1
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PI6C2402
Phase-Locked Loop Clock Driver
Product Features
2X CLK_IN on CLK_OUT
High-Performance Phase-Locked-Loop Clock Distribution
for Networking, ATM, 100/134 MHz Registered DIMM
Synchronous DRAM modules for server/workstation/
PC applications
Zero Input-to-Output delay
Low jitter: Cycle-to-Cycle jitter ±100ps max.
On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
Operates at 3.3V V
CC
Wide range of Clock Frequencies
Package:
Plastic 8-pin SOIC Package (W)
Product Description
The PI6C2402 features a low-skew, low-jitter, phase-locked loop
(PLL) clock driver. By connecting the feedback CLK_OUT output
to the feedback FB_IN input, the propagation delay from the
CLK_IN input to any clock output will be nearly zero. The PI6C2402
provides 2X CLK_IN on CLK_OUT output.
Application
If the system designer needs more than 16 outputs with the features
just described, using two or more zero-delay buffers such as
PI6C2509Q, and PI6C2510Q, is likely to be impractical. The device-
to-device skew introduced can significantly reduce the perfor-
mance. Pericom recommends the use of a zero-delay buffer and an
eighteen output non-zero-delay buffer. As shown in
Figure 1, this combination produces a zero-delay buffer with all the
signal characteristics of the original zero-delay buffer, but with as
many outputs as the non-zero-delay buffer part. For example, when
combined with an eighteen output non-zero delay buffer, a system
designer can create a seventeen-output zero-delay buffer.
Logic Block Diagram
CLK_IN
FB_IN
S
2
PLL
CLK_OUT
Product Pin Configuration
CLK_IN
AV
CC
AGND
CLK_OUT
Feedback
1
2
3
4
8
FB_IN
V
CC
GND
S
8-Pin
W
7
6
5
Control Input
Zero Delay
Buffer
PI6C2402
CLK_OUT
18 Output
Non-Zero
Delay
Buffer
S
17
Output Source
PLL
CLK_IN
PLL Shutdown
N
Y
Reference
Clock
Signal
1
0
Figure 1. This Combination Provides Zero-Delay Between the
Reference Clocks Signal and 17 Outputs
1
PS8418B
05/21/01
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2402
Phase-Locked Loop Clock Driver
Pin Functions
Pin Name
CLK _IN
AV
CC
AGND
CLK _O UT
S
GND
V
CC
FB_IN
Pin Numbe r
1
2
3
4
5
6
7
8
Type
I
Power
Ground
O
I
Ground
Power
I
Analog power.
Analog ground.
Clock output. The output provides low- skew copies of CLK _IN and
has an embedded series- damping resistor.
Control Input S. S is used to bypass the PLL for test purposes. When S is strapped to
ground, PLL is bypassed and CLK _IN is buffered directly to the device outputs.
Ground.
Power supply.
Feedback input. FB_IN provides the feedback signal to the internal PLL.
D e s cription
Reference Clock input. CLK _IN allows spread spectrum clock input
Absolute Maximum Ratings
(Over operating free-air temperature range, see Note 1)
Symbol
V
I
V
O
VI_DC
IO_DC
Power
T
STG
Input voltage range
Output voltage range
DC input voltage
DC output current
Maximum power dissipation at T
A
= 55
o
C in still air
Storage temperature
–65
Parame te r
M in.
–0.5
–0.5
–0.5
M ax.
V
CC
+ 0.5
V
CC
+ 0.5
+5.0
100
1.0
150
mA
W
o
Units
V
C
Note:
1. Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
V
I
T
A
Parame te r
Supply voltage
Supply voltage
High level input voltage
Low level input voltage
Input voltage
O perating free- air temperature
O perating free- air temperature
Commercial
Industrial
0
0
–40
Te mpe rature
Commercial
Industrial
M in.
3.0
3.135
2.0
0.8
V
CC
70
85
ºC
M ax.
3.6
3.465
V
Units
2
PS8418B
12/07/01
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2402
Phase-Locked Loop Clock Driver
Electrical Characteristics
Symbol
I
CC
C
I
C
O
I
OH
I
OL
(Over recommended operating free-air temperature range)
Te s t Condition
V
I
= V
CC
or GND; I
O
= 0
(2)
V
I
= V
CC
or GND; I
O
=
V
I
= V
CC
or GND
V
O
= V
CC
or GND
V
OUT
= 2.4V
V
OUT
= 2.0V
V
OUT
= 0.8V
V
OUT
= 0.55V
0
(2)
Te mpe rature
Commercial
Industrial
V
CC
3.6V
3.465V
3.3V
M in.
Typ.
M ax.
10
10
Units
µA
pF
4
6
–18
–30
25
17
mA
Note:
2. Continuous Output Current
AC Specifications Timing Requirements
Symbol
F
CLOCK
D
CYI
t
p
tj
t
r
t
f
Parame te r
Clock frequency
Clock frequency
Input clock duty cycle
Stabilization time after power up
Phase error without jitter
(3)
Jitter, cycle- to- cycle
Duty cycle
Rise- time, 0.4V to 2.0V
Fall- time, 2.0V to 0.4V
(Over recommended ranges of supply voltage and operating free-air temperature, C
L
= 25pF)
Te s t Condition
Commercial
Industrial
M in.
25
25
40
Typ.
M ax.
134
100
60
1
+150
+100
55
Units
MHz
%
ms
ps
%
ns
CLK _IN
at 100MHz and 66MHz
At 100MHz and 66MHz
–150
–100
45
1.0
1.1
Note:
3. This switching parameter is guaranteed by design.
3
PS8418B
12/07/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI6C2402
Phase-Locked Loop Clock Driver
8-pin Plastic SOIC (W) Package
8
.149
.157
3.78
3.99
.0099
.0196
0.25
x 45˚
0.50
1
.189
.196
.016
.026
0.406
0.660
REF
4.80
5.00
1.35
1.75
SEATING PLANE
0-8˚
.0075
.0098
0.40 .016
1.27 .050
0.19
0.25
.053
.068
.2284
.2440
5.80
6.20
.050
BSC
1.27
.013 0.330
.020 0.508
.0040 0.10
.0098 0.25
X.XX DENOTES DIMENSIONS
X.XX IN MILLIMETERS
Ordering Information
Orde ring Code
PI6C2402W
PI6C2402- WI
Package Name
W8
W8
Package Type
8- pin 150- mil SOIC
8- pin 150- mil SOIC
Ope rating Range
Commercial
Industrial
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
4
PS8418B
12/07/01
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参数对比
与PI6C2402-WIEX相近的元器件有:PI6C2402-WIX。描述及对比如下:
型号 PI6C2402-WIEX PI6C2402-WIX
描述 6C SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, 0.150 INCH, PLASTIC, SOIC-8 6C SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8, 0.150 INCH, PLASTIC, SOIC-8
是否Rohs认证 符合 不符合
厂商名称 Pericom Semiconductor Corporation (Diodes Incorporated) Pericom Semiconductor Corporation (Diodes Incorporated)
零件包装代码 SOIC SOIC
包装说明 SOP, SOP,
针数 8 8
Reach Compliance Code compliant compliant
系列 6C 6C
输入调节 STANDARD STANDARD
JESD-30 代码 R-PDSO-G8 R-PDSO-G8
长度 4.9 mm 4.9 mm
逻辑集成电路类型 CLOCK DRIVER CLOCK DRIVER
功能数量 1 1
端子数量 8 8
实输出次数 1 1
最高工作温度 85 °C 85 °C
最低工作温度 -40 °C -40 °C
输出特性 SERIES-RESISTOR SERIES-RESISTOR
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP SOP
封装形状 RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE SMALL OUTLINE
峰值回流温度(摄氏度) 260 NOT SPECIFIED
认证状态 Not Qualified Not Qualified
座面最大高度 1.75 mm 1.75 mm
最大供电电压 (Vsup) 3.465 V 3.465 V
最小供电电压 (Vsup) 3.135 V 3.135 V
标称供电电压 (Vsup) 3.3 V 3.3 V
表面贴装 YES YES
温度等级 INDUSTRIAL INDUSTRIAL
端子形式 GULL WING GULL WING
端子节距 1.27 mm 1.27 mm
端子位置 DUAL DUAL
处于峰值回流温度下的最长时间 40 NOT SPECIFIED
宽度 3.9 mm 3.9 mm
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