21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Product Description
Product Features
•
•
•
•
•
•
•
•
PI74ALVCH16260 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
Bus Hold retains last active bus state during 3-State,
eliminating the need for external pullup resistors
Industrial operation at 40°C to +85°C
Packages available:
56-pin 240 mil wide plastic TSSOP (A)
56-pin 300 mil wide plastic SSOP (V)
Pericom Semiconductors PI74ALVCH series of logic circuits are
produced using the Companys advanced 0.5 micron CMOS
technology, achieving industry leading speed.
The PI74ALVCH16260 is a 12-bit to 24-bit multiplexed D-type latch
designed for 2.3V to 3.6 V
CC
operation. It is used in applications
where two separate datapaths must be multiplexed onto, or
demultiplexed from, a single data path.
Typical applications include multiplexing and/or demultiplexing
address and data information in microprocessor or bus-interface
and in memory-interleaving.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available
for address and/or data transfer. The output-enable (OE1B, OE2B,
and OEA) inputs control bus transceiver functions. The OE1B and
OE2B control signals also allow bank control in the A-to-B direction.
Address and/or data information can be stored using the internal
storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B)
inputs are used to control data storage. When the latch-enable input
is HIGH, the latch is transparent. When the latch-enable input goes
LOW, the data present at the inputs is latched and remains latched
until the latch-enable input is returned HIGH.
To ensure high-impedance state during power up or power down,
OE should be tied to V
CC
through a pullup resistor whose minimum
value is determined by the current-sinking capability of the driver.
Logic Block Diagram
LE1B
2
LE2B
27
30
LEA1B
LEA2B
55
OE2B
OE1B
OEA
56
29
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
1
SEL
28
G1
A1
8
C1
1
1
C1
1D
C1
1D
6
2B1
23
1D
1B1
C1
1D
TO 11 OTHER CHANNELS
1
PS8089C
04/17/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Truth Tables
(1)
Product Pin Description
Pin Name
OE
SEL
LE
A,1B,2B
A,1B,2B
GND
V
CC
Description
Output Enable Input (Active LOW)
Select
Latch Enable
Data Inputs
3-State Outputs
Ground
Power
1B
H
L
X
X
X
X
X
2B
X
X
X
H
L
X
X
B to A (OEB = H)
Inputs
SEL
H
H
H
L
L
L
X
LE1B
H
H
L
X
X
X
X
LE2B
X
X
X
H
H
L
X
OEA
L
L
L
L
L
L
H
Output
A
H
L
A0
H
L
A0
Z
Product Pin Configuration
OEA
LE1B
2B3
GND
2B2
2B1
VCC
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
LE2B
SEL
1
2
3
4
5
6
7
8
9
10
56
55
54
53
52
51
50
49
48
47
OE2B
LEA2B
2B4
GND
2B5
2B6
VCC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
LEA1B
OE1B
A to B (OEA = H)
Inputs
A
H
L
H
L
H
L
X
X
X
X
X
LEA1B LEA2B OE1B
H
H
H
H
L
L
L
X
X
X
X
H
H
L
L
H
H
L
X
X
X
X
L
L
L
L
L
L
L
H
L
H
L
OE2B
L
L
L
L
L
L
L
H
H
L
L
Outputs
1B
H
L
H
L
1B0
1B0
1B0
Z
Active
Z
Active
2B
H
L
2B0
2B0
H
L
2B0
Z
Z
Active
Active
11
56-Pin
46
12
A, V
45
13
44
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Note:
1. H = High Signal Level
L = Low Signal Level
X = Irrelevant
Z = High Impedance
2
PS8089C
04/17/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ................................................. 65°C to +150°C
Ambient Temperature with Power Applied ................. 40°C to +85°C
Input Voltage Range, V
IN ............................................
0.5V to V
CC
+0.5V
Output Voltage Range, V
OUT .....................................
0.5V to V
CC
+0.5V
DC Input Voltage .......................................................... 0.5V to +5.0V
DC Output Current ....................................................................100mA
Power Dissipation ........................................................................ 1.0W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40°C to +85°C, V
CC
= 3.3V ± 10%)
Parame te rs
V
CC
V
IH(3)
V
IL(3)
V
IN(3)
V
OUT(3)
V
OH
De s cription
Supply Voltage
Input HIGH Voltage
Input LOW Voltage
Input Voltage
Output Voltage
Output HIGH Voltage
I
OH
= - 100
µ
A, V
CC
= Min. to Max.
V
IH
= 1.7V, I
OH
= 6mA, V
CC
= 2.3V
V
IH
= 1.7V, I
OH
= 12mA, V
CC
= 2.3V
V
IH
= 2.0V, I
OH
= 12mA, V
CC
= 2.7V
V
IH
= 2.0V, I
OH
= 12mA, V
CC
= 3.0V
V
IH
= 2.0V, I
OH
= 24mA, V
CC
= 3.0V
V
OL
Output LOW Voltage
I
OL
= 100
µ
A, V
IL
= Min. to Max.
V
IL
= 0.7V, I
OL
= 6mA, V
CC
= 2.3V
V
IL
= 0.7V, I
OL
= 12mA, V
CC
= 2.3V
V
IL
= 0.8V, I
OL
= 12mA, V
CC
= 2.7V
V
IL
= 0.8V, I
OL
= 24mA, V
CC
= 3.0V
I
OH(3)
Output HIGH Current
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
I
OL(3)
Output LOW Current
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
0
0
V
CC
- 0.2
2.0
1.7
2.2
2.4
2.0
0.2
0.4
0.7
0.4
0.55
12
12
24
12
12
24
mA
V
Te s t Conditions
(1)
M in.
2.3
1.7
2.0
0.7
0.8
V
CC
V
CC
Typ.
(2)
M ax.
3.6
Units
3
PS8089C
04/17/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
DC Electrical Characteristics-
Continued
(Over the Operating Range, T
A
= 40°C to +85°C, V
CC
= 3.3V ±10%)
Parame te rs D e s cription
I
IN
I
IN
(
HOLD
)
Input Current
Input Hold Current
Te s t Conditions
(1)
V
IN
= V
CC
or GND, V
CC
= 3.6V
V
IN
= 0.7V, V
CC
= 2.3V
V
IN
= 1.7V, V
CC
= 2.3V
V
IN
= 0.8V, V
CC
= 3.0V
V
IN
= 2.0V, V
CC
= 3.0V
V
IN
= 0 to 3.6V, V
CC
= 3.6V
I
OZ
I
CC
∆I
CC
O utput Current (3- State O utputs)
Supply Current
Supply Current per Input @ TTL HIGH
V
OUT
= V
CC
or GND, V
CC
= 3.6V
V
CC
= 3.6V, I
OUT
= 0
µ
A,
V
IN
= GND or V
CC
V
CC
= 3.0V to 3.6V
O ne Input at V
CC
0.6V
O ther Inputs at V
CC
or GND
V
IN
= V
CC
or GND, V
CC
= 3.3V
V
O
= V
CC
or GND, V
CC
= 3.3V
3.5
9
45
45
75
75
±500
±10
40
750
µA
M in.
Typ.
(2)
M ax.
±5
Units
C
I
C
O
Control Inputs
O utputs
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
Timing Requirements over Operating Range
V
CC
= 2.5V ± 0.2V
M in.
3.3
1.4
1.6
0
10
M ax.
V
CC
= 2.7V
M in.
3.3
1.1
1.9
0
10
M ax.
V
CC
= 3.3V ± 0.3V
M in.
3.3
1.1
1.5
0
10
ns/V
ns
M ax.
Parame te rs
t
W
t
SU
t
H
∆
t/
∆v
(1)
De s cription
Pulse duration, LE1B, LE2B,
LEA1B, or LEA2B High
Setup time, data before LE1B,
LE2B, LEA1B, or LEA2B
Hold time, data after LE1B,
LE2B, LEA1B or LEA2B
Input Transition Rise or Fall
Units
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
4
PS8089C
04/17/01
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16260
12-Bit To 24-Bit Multiplexed D-Type Latch
with 3-State Outputs
Switching Characteristics over Operating Range
(1)
Parame te rs
From (Input)
A or B
t
PD
t
EN
t
DIS
LE
SEL
OE
OE
To (Output)
B or A
A or B
A
A or B
A or B
V
CC
= 2.5V ± 0.2V
M in.
(2)
1.2
1.0
1.2
1.0
1.7
M ax.
6.0
6.2
7.5
7.2
5.9
V
CC
= 2.7V
M in.
(2)
M ax.
5.1
5.2
6.6
6.4
5.0
V
CC
= 3.3V ± 0.3V
M in.
(2)
1.2
1.0
1.1
1.0
1.3
M ax.
(2)
4.3
4.4
5.6
5.4
4.6
ns
Units
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, T
A
= 25ºC
Parame te r
Outputs Enabled
Outputs Disabled
Te s t Conditions
C
L
= 50pF,
f = 10 MHz
V
CC
= 2.5V ± 0.2V
V
CC
= 3.3V ± 0.3V
Typical
87
80.5
120
118
Units
C
PD
Power Dissipation Capacitance
pF
Power Supply Characteristics
Parame te rs
I
CC
∆I
CC
D e s cription
Q uiescent Power Supply Current
Supply Current per
Input @TTL HIGH
Te s t Conditions
(1)
V
CC
= Max., Iout = 0V, Vin = GND or V
CC
V
CC
= 3.0V to 3.6V, O ne input at V
CC
0.6V
O ther inputs at V
CC
or GND
M in.
Typ
(2)
M ax.
40
750
Units
µA
Note:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
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PS8089C
04/17/01
嵌入式系统
