21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74FCT162344T
Address/Clock Driver
PI74FCT162344T
Fast CMOS
Address/Clock Driver
Product Features
Ideal for address line driving and clock distribution
Eight banks with 1:4 fanout with 3-state control
Typical t
SK
(
O
)
output skew < 500ps
Balanced output drivers: ±24mA
Hysteresis on all inputs
Packages available:
56-pin 240-mil wide plastic TSSOP (A)
56-pin 300-mil wide plastic SSOP (V)
Product Description
Pericom Semiconductors PI74FCT series of logic circuits are
produced in the Companys advanced 0.6 micron CMOS
technology, achieving industry leading speed grades.
The PI74FCT162344T is an address/clock driver designed to
provide the ability to fanout to memory arrays. Eight banks, each
with a fanout of four, and 3-state control, provide efficient address
distribution. One or more banks may be used for clock distribution.
The PI74FCT162344T has balanced output drivers. It is designed
with current limiting resistors at its outputs to control the output
edge rate resulting in lower ground bounce and undershoot. This
eliminates the need for external terminating resistors for most
interface applications.
Logic Block Diagram
OE
1
B
11
A
1
B
14
A
5
B
54
OE
3
B
51
B
21
A
2
B
24
A
6
B
61
B
64
OE
2
B
31
A
3
B
34
OE
4
B
71
A
7
B
74
B
41
A
4
B
44
A
8
B
81
B
84
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PI74FCT162344T
Address/Clock Driver
Product Pin Configuration
OE
1
B
11
B
12
GND
B
13
B
14
V
CC
A
1
B
21
B
22
GND
B
23
B
24
A
2
A
3
B
31
B
32
GND
B
33
B
34
A
4
V
CC
B
41
B
42
GND
B
43
B
44
OE
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
56-Pin
44
OE
4
B
81
B
82
GND
B
83
B
84
V
CC
A
8
B
71
B
72
GND
B
73
B
74
A
7
A
6
B
61
B
62
GND
B
63
B
64
A
5
V
CC
B
51
B
52
GND
B
53
B
54
OE
3
Product Pin Description
Pin Name
OE
x
Ax
Bxx
GND
V
CC
Description
3-State Output Enable Inputs (Active LOW)
Inputs
3-State Outputs
Ground
Power
Truth Table
(1)
Inputs
OE
X
L
L
H
Note:
1. H
L
X
Z
=
=
=
=
A
X
L
H
X
High Voltage Level
Low Voltage Level
Dont Care
High Impedance
Outputs
Bxx
L
H
Z
A,V
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(1)
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
V
IN
= 0V
V
OUT
= 0V
Typ
3.5
3.5
Max.
6.0
8.0
Units
pF
pF
Note:
1. This parameter is determined by device characterization but is not production tested.
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PI74FCT162344T
Address/Clock Driver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Note:
Storage Temperature .......................................................... 65°C to +150°C
Stresses greater than those listed under
Ambient Temperature with Power Applied ..............................0°C to +70°C
MAXIMUM RATINGS may cause permanent damage
to the device. This is a stress rating only and functional
Supply Voltage to Ground Potential ..................................... 0.5V to +7.0V
operation of the device at these or any other conditions
DC Input Voltage .................................................................. 0.5V to +7.0V
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
DC Output Current ............................................................... 60 to +120mA
maximum rating conditions for extended periods may
Power Dissipation ................................................................................0.5W
affect reliability.
Operating Range
Ambient Temperature = 40°C to +85°C
Vcc = 5.0V ±10%
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40°C to +85°C, V
CC
= 5.0V ±10%)
Parameters Description
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
I
OS
I
OUT
V
H
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance
Output Current
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output Drive Current
Input Hysteresis
Test Conditions
(1)
V
CC
= Min, V
IN
= V
IH
or V
IL
V
CC
= Min., V
IN
= V
IH
or V
IL
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.
(3-State Output Pins)
V
CC
= Min., I
IN
= 18mA
V
CC
= 5V, V
IN
=V
IH
or V
IL
, V
OUT
= 1.5V
(3)
V
CC
= 5V, V
IN
=V
IH
or V
IL
, V
OUT
= 1.5V
(3)
V
CC
= Max., V
OUT
= 2.5V
(3)
V
IN
= V
CC
(Input Pins)
V
IN
= GND (Input & I/O Pins)
V
OUT
= 2.7V
V
OUT
= 0.5V
I
OH
= 24mA
I
OL
= 24mA
Min.
2.4
2.0
60
60
80
50
Typ
(2)
3.3
0.3
0.7
115
115
140
100
Max.
0.55
0.8
±1
±1
±1
±1
1.2
150
150
225
180
V
mA
mA
mA
mA
mV
Units
V
V
V
V
µA
µA
µA
Short Circuit Current
(4)
V
CC
= Max., V
OUT
= GND
(4)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. This parameter is determined by device characterization but is not production tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
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PI74FCT162344T
Address/Clock Driver
Power Supply Characteristics
Parameters Description
I
CC
∆I
CC
I
CCD
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
Test Conditions
(1)
V
CC
= Max.
V
CC
= Max.
V
CC
= Max.,
Outputs Open
OE
X
= GND
One Bit Toggling
50% Duty Cycle
V
CC
= Max.,
Outputs Open
f
I
= 10 MH
Z
50% Duty Cycle
OE
X
= GND
One Bit Toggling
V
CC
= Max.,
Outputs Open
f
I
= 2.5 MH
Z
50% Duty Cycle
OE
X
= GND
16 Bits Toggling
V
IN
= GND or V
CC
V
IN
= 3.4 V
(3)
V
IN
= V
CC
V
IN
= GND
Min.
Typ
(2)
0.1
0.5
170
Max.
500
1.5
220
Units
µA
mA
µA/
MHz
I
C
Total Power Supply
Current
(6)
V
IN
= V
CC
V
IN
= GND
1.7
2.7
(5)
mA
V
IN
= 3.4 V
V
IN
= GND
V
IN
= V
CC
V
IN
= GND
2.0
3.4
3.5
(5)
4.9
(5)
V
IN
= 3.4 V
V
IN
= GND
5.4
10.9
(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 5.0 V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4 V); all other inputs at Vcc or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + fiNi)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4 V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
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PI74FCT162344T
Address/Clock Driver
Switching Characteristics over Operating Range
162344AT
Com.
162344CT
Com.
Min
Max
162344ET
Com.
Min
Max
Unit
Parameters
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK
1
(o)
(3,5)
t
SK
2
(o)
(4,5)
Description
Propagation Delay
A
X
to B
X
Output Enable Time
OE
X
to B
X
Output Disable Time
OE
X
to B
X
Output Skew
Output Skew
Conditions
(1)
C
L
= 50pF
R
L
= 500ohm
Min
Max
1.5
1.5
1.5
4.8
6.2
5.6
0.5
0.5
1.5
1.5
1.5
4.3
5.8
5.2
0.35
0.5
1.5
1.5
1.5
3.8
5.0
4.6
0.25
0.3
ns
ns
ns
ns
ns
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. Skew between outputs of the same bank and same package, switching in the same transition.
4. Skew between outputs of all banks of the same package with A1 through A8 tied together, switching in the same transition.
5. This parameter is guaranteed but not production tested.
Tests Circuits For All Outputs
(1)
V
CC
7.0V
Switch Position
Test
Disable LOW
Enable LOW
All Other Tests
Switch
7V
Open
500Ω
V
IN
Pulse
Generator
R
T
D.U.T.
50pF
C
L
500Ω
V
OUT
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe
capacitance.
R
T
= Termination resistance: should be equal to
Z
OUT
of the Pulse Generator.
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FPGA/CPLD
