PIC12F609/615/12HV609/615
PIC12F609/615/12HV609/615 Rev. A Silicon/Data Sheet Errata
The PIC12F609/615/12HV609/615 parts you have
received conform functionally to the Device Data Sheet
(DS41302A), except for the anomalies described
below.
None.
Clarifications/Corrections to the Data
Sheet:
In the Device Data Sheet (DS41302A), the following
clarifications and corrections should be noted.
1. Module: 8-Pin Diagram,
PIC12F609/HV609
(PDIP, SOIC,
TSSOP, DFN)
Diagram title – replace TSSOP package with
MSOP
package as shown.
(PDIP, SOIC,
MSOP,
DFN)
2. Module: Table 2: PIC12F615/HV615 Pin
Summary (PDIP, SOIC, TSSOP,
DFN)
Table title – replace TSSOP package with
MSOP
package as shown.
(PDIP, SOIC,
MSOP,
DFN)
©
2007 Microchip Technology Inc.
DS80294B-page 1
PIC12F609/615/12HV609/615
3. Module: REGISTER 6-1: T1CON: TIMER1
CONTROL REGISTER
Bit 1 should read as shown in bold.
bit 1
TMR1CS:
Timer1 Clock Source Select bit
1
= External clock from T1CKI pin (on the rising edge)
0
= If T1ACS =
1
system clock (F
OSC
)
=
0
internal clock (F
OSC
/4)
4. Module: REGISTER 8-1: CMCON0:
COMPARATOR CONTROL
REGISTER 0
Bit 0 should read as shown in bold.
bit 0
CMCH:
Comparator C1 Channel Select bit
0
= CMV
IN
- pin of the Comparator connects to CIN0-
1
= CMV
IN
- pin of the Comparator connects to CIN1-
5. Module: Comparator Voltage Reference
Under “Section 8.10.3 Output Clamped to V
SS
”:
Change from:
• VREN =
0
• VRR =
1
• VR<3:0> =
0000
To:
•
FVREN =
0
6. Module: 17.0 PACKAGING INFORMATION
Replace TSSOP package with
MSOP
package as
shown.
8-Lead MSOP
Example
XXXXXX
YWWNNN
602/MS
610017
DS80294B-page 2
©
2007 Microchip Technology Inc.
PIC12F609/615/12HV609/615
8-Lead Plastic Micro Small Outline Package (MS) [MSOP]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
N
E
E1
NOTE 1
1
2
b
A
A2
c
φ
e
A1
Units
Dimension Limits
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
Overall Width
Molded Package Width
Overall Length
Foot Length
Footprint
Foot Angle
Lead Thickness
Lead Width
N
e
A
A2
A1
E
E1
D
L
L1
φ
c
b
L1
MILLIMETERS
MIN
NOM
8
0.65 BSC
–
0.75
0.00
–
0.85
–
4.90 BSC
3.00 BSC
3.00 BSC
0.40
0°
0.08
0.22
0.60
0.95 REF
–
–
–
8°
0.23
0.40
0.80
1.10
0.95
0.15
MAX
L
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.
3. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-111B
©
2007 Microchip Technology Inc.
DS80294B-page 3
PIC12F609/615/12HV609/615
7. Module: 8-Pin Diagram,
PIC12F615/HV615
(PDIP, SOIC,
TSSOP, DFN)
Diagram title – replace TSSOP package with
MSOP
package as shown.
(PDIP, SOIC,
MSOP,
DFN)
8. Module: Table 1: PIC12F609/HV609 Pin
Summary (PDIP, SOIC, TSSOP,
DFN)
Table title – replace TSSOP package with
MSOP
package as shown.
(PDIP, SOIC,
MSOP,
DFN)
9. Module: Figure 2-1: Program Memory
Map and Stack for the
PIC12F609/615/12HV609/615
Wraps to 0000h-07FFh should be:
Wraps to 0000h-03FFh
10. Module: Section 10.4.3 Enhanced PWM
Auto-Shutdown Mode
Last paragraph before Figure 10-10, the part has
no P1C or P1D. The paragraph should read:
The enabled PWM pins are asynchronously
placed in their shutdown states. The state of each
PWM output pin is determined by the PSSAC and
PSSBD bits of the ECCPAS register. Each pin may
be placed into one of three states:
11. Module: Register 10-2: ECCPAS:
Enhanced
Capture/Compare/PWM
Auto-Shutdown Control Register
Unimplemented bits are Readable/Writable bits.
U-0 should be R/W-0 for bits 6 and 7.
REGISTER 10-2:
R/W-0
ECCPASE
bit 7
ECCPAS: ENHANCED CAPTURE/COMPARE/PWM AUTO-SHUTDOWN
CONTROL REGISTER
R/W-0
R/W-0
ECCPAS1
R/W-0
ECCPAS0
R/W-0
PSSAC1
R/W-0
PSSAC0
R/W-0
PSSBD1
R/W-0
PSSBD0
bit 0
ECCPAS2
DS80294B-page 4
©
2007 Microchip Technology Inc.
PIC12F609/615/12HV609/615
REVISION HISTORY
Rev A Document (10/2006)
First revision of this document.
Clarifications/Corrections to the Data Sheet:
Added Modules 1 through 6.
Rev B Document (03/2007)
Clarifications/Corrections to the Data Sheet:
Added Modules 7 through 11; Module 6: Replaced
MSOP Package Drawing.
©
2007 Microchip Technology Inc.
DS80294B-page 5
