M
PIC16F72
PIC16F72
1.2
Programming Mode
The Programming mode for the PIC16F72 allows pro-
gramming of user program memory, special locations
used for ID, and the configuration word.
FLASH Memory Programming Specification
This document includes the programming
specifications for the following device:
1.0
PROGRAMMING THE PIC16F72
Pin Diagram
PDIP, SOIC, SSOP, MLF
MCLR/V
PP
RA0/AN0
RA1/AN1
RA2/AN2
RA3/AN3/V
REF
RA4/T0CKI
RA5/AN4/SS
V
SS
OSC1/CLKI
OSC2/CLKO
RC0/T1OSO/T1CKI
RC1/T1OSI
RC2/CCP1
RC3/SCK/SCL
RB7/PGD
RB6/PGC
RB5
RB4
RB3
RB2
RB1
RB0/INT
V
DD
V
SS
RC7
RC6
RC5/SDO
RC4/SDI/SDA
The PIC16F72 is programmed using a serial method.
The Serial mode allows the PIC16F72 to be pro-
grammed while in the users’ system, allowing for
increased design flexibility. This programming specifi-
cation applies to PIC16F72 devices in all packages.
The PIC16F72 requires two programmable power sup-
plies, one for V
DD
(2.0V to 5.5V) and the other for V
PP
of 12.75V to 13.25V. Both supplies should have a min-
imum resolution of 0.25V.
TABLE 1-1:
Pin Name
PIN DESCRIPTIONS (DURING PROGRAMMING): PIC16F72
During Programming
Function
Pin Type
I
I/O
P
P
P
Clock Input
Data Input/Output
Program Mode Select
Power Supply
Ground
Pin Description
RB6/PGC
RB7/PGD
MCLR/V
PP
V
DD
V
SS
CLOCK
DATA
V
TEST
MODE
V
DD
V
SS
Legend: I = Input, O = Output, P = Power
2002 Microchip Technology Inc.
Preliminary
PIC16F72
1.1
Hardware Requirements
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DS39588A-page 1
PIC16F72
2.0
2.1
PROGRAM MODE ENTRY
User Program Memory Map
2.2
ID Locations
The user memory space extends from 0x0000 to
0x07FF (2K). Table 2-1 shows the actual implementa-
tion of program memory in the PIC16F72. Configura-
tion memory begins at 0x2000, and continues to
0x3FFF. The PC will increment from 0x0000 to 0x1FFF
and wrap to 0x0000, 0x2000 to 0x3FFF and wrap
around to 0x2000 (not to 0x0000).
Once in configuration memory, the highest bit of the PC
stays a ‘1’, thus, always pointing to the configuration
memory. The only way to point to program memory is
to reset the part and re-enter Program/Verify mode, as
described in Section 2.3.
Configuration memory is selected when the PC points
to any address in the range of 0x2000-0x201F; how-
ever, only locations 0x2000 through 0x2007 are imple-
mented. Addressing locations beyond 0x201F will
access program memory (see Figure 2-1).
A user may store identification information (ID) in four
ID locations mapped to [0x2000:0x2003]. It is recom-
mended that each ID location word is written as
‘11 1111 1000 bbbb’,
where
‘bbbb’
is ID infor-
mation. The ID locations can be read even after code
protection is enabled.
To understand the program memory read mechanism
after code protection is enabled, refer to Section 4.0.
Table 4-1 shows specific calculations and behavior for
the PIC16F72 device.
TABLE 2-1:
PROGRAM MEMORY
IMPLEMENTATION IN THE
PIC16F72
Program Memory Size
0x0000 – 0x07FF (2K)
Device
PIC16F72
DS39588A-page 2
Preliminary
2002 Microchip Technology Inc.
PIC16F72
FIGURE 2-1:
PROGRAM MEMORY MAPPING
2K words
0h
Implemented
1FFh
Implemented
3FFh
400h
7FFh
Reserved
2000h
2001h
2002h
2003h
2004h
2005h
2006h
2007h
ID Location
ID Location
Reserved
ID Location
ID Location
Reserved
Reserved
Device ID
Configuration Word
Accesses
0x0020
to
0X0FFF
1FFFh
2000h
2007h
2008h
201Fh
2020h
3FFFh
2002 Microchip Technology Inc.
Preliminary
DS39588A-page 3
PIC16F72
2.3
Program/Verify Mode
The Program/Verify mode is entered by holding pins
RB6 and RB7 low, while raising MCLR pin from V
IL
to
V
PP
. Once in this mode, the user program memory and
the configuration memory can be accessed and pro-
grammed in serial fashion (RB6 and RB7 are Schmitt
Trigger inputs in this mode).
The sequence that enters the device into the Program-
ming/Verify mode places all other logic into the RESET
state. All I/O are in the RESET state (high impedance
inputs).
A device RESET will clear the PC and point to address
0x0000. The ‘Increment Address’ command will incre-
ment the PC. The ‘Load Configuration’ command will
set the PC to 0x2000. The available commands are
shown in Table 2-2.
The normal sequence for programming two program
memory words at a time is as follows:
1.
2.
3.
4.
5.
6.
7.
8.
Issue the ‘Load Data’ command to load a word
at the current (even) program memory address.
Issue an ‘Increment Address’ command.
Load a word at the current (odd) program mem-
ory address using the ‘Load Data’ command.
Issue a ‘Begin Programming’ command to begin
programming.
Wait tprog (about 1 ms).
Issue an ‘End Programming’ command.
Increment to the next address.
Repeat this sequence as required to write pro-
gram and configuration memory.
The address and program counter is reset to 0x0000 by
resetting the device (taking MCLR below V
IL
) and
re-entering Programming mode. Program and configu-
ration memory may then be read or verified using the
‘Read Data’ and ‘Increment Address’ commands.
2.3.1
SERIAL PROGRAM/VERIFY
OPERATION
RB6 is used as a clock input pin, and RB7 is used for
entering command bits and data input/output. To enter
a command, the clock pin (RB6) is pulsed six times.
Each command bit is latched on the falling edge of the
clock (RB6), with the Least Significant bit (LSb) of the
command being entered first. The data on pin RB7
needs a minimum setup (tset1) and hold time (thold1),
with respect to the falling edge of the clock. The read
and load commands are specified to have a minimum
delay (tdly1) between the command and data. After this
delay, the clock pin is cycled 16 times with the first cycle
being a START bit (0) and the last cycle being a STOP
bit (0). Data is transferred LSb first (see Figure 5-1).
During a read operation, the LSb will be output to pin
RB7 on the rising edge of the second clock pulse and
during a load operation, the LSb will be latched on the
falling edge of the second clock pulse. A minimum
delay (tdly2) is required between consecutive
commands (see Figure 5-2).
To allow for decoding of commands and reversal of
data pin configuration, a time separation of at least
(tdly1) is required between a command and a data
word, or another command (see Figure 5-3).
The available commands are listed below:
•
•
•
•
•
•
•
Load Configuration
Load Data for Memory
Read Data from Memory
Increment Address
Begin Programming
Bulk Erase Program Memory
End Programming
The alternative sequence for programming one pro-
gram memory word at a time is as follows:
1.
2.
3.
4.
5.
6.
Set a word for the current memory location using
the ‘Load Data’ command.
Issue a ‘Begin Programming’ command to begin
programming.
Wait tprog.
Issue an ‘End Programming’ command.
Increment to the next address.
Repeat this alternative sequence as required to
write program and configuration memory.
TABLE 2-2:
COMMAND MAPPING FOR PIC16F72
Command
Mapping (MSb … LSb)
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
0
1
0
0
0
0
0
1
0
Data
0, data (14), 0
0, data (14), 0
0, data (14), 0
Load Configuration (Set PC = 2000h)
Load Data for Memory
Read Data from Memory
Increment Address
Begin Programming
Bulk Erase Program Memory (Chip Erase)
End Programming
DS39588A-page 4
Preliminary
2002 Microchip Technology Inc.
PIC16F72
2.3.1.1
Load Configuration
2.3.1.6
Chip Erase (Program Memory)
After receiving the Load Configuration command, the
PC will be set to 0x2000 and the data sent with the
command is discarded. The four ID locations and the
configuration word can then be programmed using the
normal programming sequence, as described in
Section 2.3. A description of the memory mapping
schemes of the program memory for normal operation
and Configuration mode operation is shown in
Figure 2-1. After the configuration memory is entered,
the only way to get back to the user program memory
is to exit the Program/Verify Test mode by taking MCLR
low.
Erasure of configuration and program memory begins
after this command is received and decoded. The
erase sequence is self-timed and it is not necessary to
issue an ‘End Programming’ command, only to wait for
the appropriate time interval (tera) for the entire erase
sequence, before issuing another command.
This procedure will disable code protection (code pro-
tect bit = 1); however, all data within the program mem-
ory will be erased when this command is executed and
thus, the security of the data or code is not
compromised.
Note:
All CHIP ERASE operations must take
place with V
DD
between 4.75V and 5.25V.
2.3.1.2
Load Data for Memory
The device will load in a 14-bit “data word” when 16
cycles are applied, as described previously. A timing
diagram for the load data command is shown in
Figure 5-1.
2.4
Programming Algorithm Requires
Variable V
DD
2.3.1.3
Read Data from Memory
The PIC16F72 uses an intelligent algorithm, which
calls for program verification at V
DDAPP
.
The actual chip erase and programming must be done
with V
DD
in the V
DDP
range (see Table 5-1).
V
DDP
= V
DD
range required during programming
V
DDAPP
= V
DD
in the target application
Programmers must verify the PIC16F72 at V
DDAPP
.
Since Microchip may introduce future versions of the
PIC16F72 with a broader V
DD
range, it is best that
these levels are user selectable (defaults are OK).
Note:
Any programmer not meeting this require-
ment may only be classified as a “proto-
type” or “development” programmer, but
not a “production quality” programmer.
The device will transmit data bits out of the memory
(program or configuration) currently addressed by the
PC, starting with the second rising edge of the clock
input. RB7 will go into Output mode on the second ris-
ing clock edge and will revert back to Input mode
(hi-impedance) after the 16th rising edge. A timing dia-
gram for this command is shown in Figure 5-2.
If the device is code protected, user program memory
will read all ‘0’s. Configuration memory can still be read.
2.3.1.4
Increment Address
The PC is incremented by one. A timing diagram for
this command is shown in Figure 5-3.
2.3.1.5
Begin Programming
A ‘Load Data’ command must be issued before
every ‘Begin Programming’ command.
Program-
ming of memory (configuration or program) will begin
after this command is received and decoded. Program-
ming requires (tprog) time and is terminated using an
‘End Programming’ command.
2002 Microchip Technology Inc.
Preliminary
DS39588A-page 5
嵌入式系统
