PIC16(L)F1764/5/8/9
14/20-Pin, 8-Bit Flash Microcontrollers
Description
The PIC16(L)F1764/5/8/9 family offers intelligent analog with digital peripherals to create up to two independent closed-
loop channels. These 14 and 20-pin devices enable the ability to interconnect the on-chip peripherals to create custom
functions specific to each application; helping simplify the implementation of a complex control system and give
designers the flexibility to innovate.
Core Features
• C Compiler Optimized RISC Architecture
• Only 49 Instructions
• Operating Speed:
- DC – 32 MHz clock input
- 125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Up to Four 8-Bit Timers
• Up to Three 16-Bit Timers
• Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-out Reset (BOR) with Selectable Trip Point
• Extended Watchdog Timer (EWDT):
- Low-power 31 kHz WDT
- Software-selectable prescaler
- Software-selectable enable
Digital Peripherals
• Configurable Logic Cell (CLC):
- Up to three CLCs; up to four selected inputs
- Integrated combinational and state logic
• Up to Two Complementary Output Generators
(COG):
- Push-Pull, Full-Bridge and Steering modes
• Up to Two Capture/Compare/PWM (CCP)
modules
• Pulse-Width Modulators (PWM):
- Up to two 10-bit PWMs
- Up to two 16-bit PWMs
• Peripheral Pin Select (PPS):
- Configure any digital pin to output
• Serial Communications:
- Enhanced USART (EUSART)
- SPI, I
2
C, RS-232, RS-485, LIN compatible
- Auto-Baud Detect, auto-wake-up on start
• Up to 18 I/O Pins:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-On-Change (IOC) with edge select
• Up to Two Data Signal Modulators (DSM)
Memory
•
•
•
•
Up to 14 Kbytes Flash Program Memory
Up to 1024 Bytes Data RAM Memory
Direct, Indirect and Relative Addressing modes
High-Endurance Flash (HEF):
- 128B of nonvolatile data storage
- 100K erase/write cycles
Intelligent Analog Peripherals
• 10-Bit Analog-to-Digital Converter (ADC):
- Up to 12 external channels
- Conversion available during Sleep
• Up to Two Operational Amplifiers (OPA):
- Selectable internal and external channels
• Up to Four Fast Comparators (COMP):
- Up to five external inverting inputs
- Up to eight external non-inverting inputs
- Fixed Voltage Reference at non-inverting
input(s)
- Comparator outputs externally accessible
• Digital-to-Analog Converters (DAC):
- Up to two 10-bit resolution DACs
- Up to two 5-bit resolution DACs
Operating Characteristics
• Operating Voltage Range:
- 1.8V to 3.6V (PIC16LF1764/5/8/9)
- 2.3V to 5.5V (PIC16F1764/5/8/9)
• Temperature Range:
- Industrial: -40°C to +85°C
- Extended: -40°C to +125°C
eXtreme Low-Power (XLP) Features
•
•
•
•
Sleep mode: 50 nA @ 1.8V, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz
Operating Current:
- 8
A
@ 32 kHz, 1.8V, typical
- 32
A/MHz
@ 1.8V, typical
• Low-Power BOR (LPBOR):
- 200 nA in Sleep
2014-2015 Microchip Technology Inc.
DS40001775B-page 1
PIC16(L)F1764/5/8/9
Intelligent Analog Peripherals (Cont.)
• Voltage Reference:
- Fixed Voltage Reference (FVR): 1.024V,
2.048V and 4.096V output levels
• Zero-Cross Detector (ZCD):
- Detect high-voltage AC signal
• Programmable Ramp Generator (PRG):
- Slope compensation
- Ramp generation
• High-Current Drive I/Os:
- 100 mA capacity @ 5V
Clocking Structure
• 16 MHz Internal Oscillator:
- ±1% at calibration
- Selectable frequency range, 32 MHz to
31 kHz
• 31 kHz Low-Power Internal Oscillator
• 4x Phase-Locked Loop (PLL):
- For up to 32 MHz internal operation
• External Oscillator Block with:
- Three External Clock modes up to 32 MHz
TABLE 1:
PIC16(L)F1764/5/8/9 FAMILY TYPES
Programmable Ramp Gen
High-Endurance Flash (B)
Program Memory Flash
(Words/Kbytes)
Data Signal Modulator
Peripheral Pin Select
Data SRAM (Bytes)
8-Bit Timers w/HLT
Zero-Cross Detect
High-Current I/Os
Data Sheet Index
10-Bit ADC (ch)
10/16-Bit PWM
16-Bit Timers
5/10-Bit DAC
Comparator
I/O Pins
(2)
EUSART
Device
PIC16(L)F1764
(A)
PIC16(L)F1768
(A)
Note
1:
2:
4096/7
4096/7
128
128
512
512
12
18
3
3
3
3
1/3
1/3
1/3
1/3
2
2
4
4
8
8
12
12
1/1
1/1
2/2
2/2
1
1
2
2
1/1
1/1
2/2
2/2
1
1
2
2
1
1
2
2
3
3
3
3
1
1
2
2
1
1
1
1
1
1
2
2
2
2
2
2
Y
Y
Y
Y
1
1
1
1
1
1
1
1
I/H
I/H
I/H
I/H
PIC16(L)F1765
(A)
8192/14 128 1024 12
PIC16(L)F1769
(A)
8192/14 128 1024 18
Debugging Methods: (I) – Integrated on Chip; (H) – via ICD Header; E – Emulation Product.
One pin is input-only.
Data Sheet Index:
(Unshaded devices are described in this document.)
A.
DS-40001775
PIC16(L)F1764/5/8/9 Data Sheet, 14/20-Pin 8-Bit Flash Microcontrollers.
Note:
For other small form factor package availability and marking information, please visit
http://www.microchip.com/packaging
or contact your local sales office.
TABLE 2:
PIC16(L)F1764
PIC16(L)F1765
PIC16(L)F1768
PIC16(L)F1769
Note:
PACKAGES
PDIP
SOIC
TSSOP
QFN
SSOP
Packages
Pin details are subject to change.
DS40001775B-page 2
2014-2015 Microchip Technology Inc.
Debug
(1)
Op Amp
I
2
C/SPI
COG
CCP
CLC
PIC16(L)F1764/5/8/9
PIN DIAGRAMS
FIGURE 1:
14-PIN PDIP, SOIC, TSSOP
V
DD
RA5
RA4
MCLR/V
PP
/RA3
RC5
RC4
RC3
1
PIC16(L)F1764
3
4
5
6
7
PIC16(L)F1765
2
14
13
12
11
10
9
8
V
SS
RA0/ICSPDAT
RA1/ICSPCLK
RA2
RC0
RC1
RC2
Note:
See
Table 3
for location of all peripheral functions.
FIGURE 2:
16-PIN QFN (4x4)
V
DD
V
SS
12 RA0
PIC16(L)F1764
PIC16(L)F1765
11 RA1
10 RA2
9 RC0
5
RC4
6
RC3
7
RC2
8
RC1
NC
NC
16 15 14 13
RA5 1
RA4 2
MCLR/V
PP
/RA3 3
RC5 4
Note:
See
Table 3
for location of all peripheral functions.
2014-2015 Microchip Technology Inc.
DS40001775B-page 3
PIC16(L)F1764/5/8/9
FIGURE 3:
20-PIN PDIP, SOIC, SSOP
V
DD
RA5
RA4
MCLR/V
PP
/RA3
RC5
RC4
RC3
RC6
RC7
RB7
1
2
3
PIC16(L)F1768
PIC16(L)F1769
RA5
V
DD
4
5
6
7
8
9
10
20 V
SS
19 RA0
18 RA1
17 RA2
16 RC0
15 RC1
14 RC2
13 RB4
12 RB5
11 RB6
Note:
See
Table 4
for location of all peripheral functions.
FIGURE 4:
20-PIN QFN (4x4)
RA4
20 19 18 17 16
MCLR/V
PP
/RA3 1
RC5 2
RC4 3
RC3 4
RC6 5
6
RC7
7
RB7
8
RB6
9 10
RB5
RB4
PIC16(L)F1768
PIC16(L)F1769
15 RA1
14 RA2
13 RC0
12 RC1
11 RC2
Note:
See
Table 4
for location of all peripheral functions.
RA0
V
SS
DS40001775B-page 4
2014-2015 Microchip Technology Inc.
PIN ALLOCATION TABLES
TABLE 3:
14-Pin PDIP/SOIC/TSSOP
2014-2015 Microchip Technology Inc.
DS40001775B-page 5
14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1764/5)
Programmable
Ramp Generator
Comparator
16-Pin QFN
Zero Cross
Hi Current
Reference
Modulator
Interrupts
EUSART
Pull-ups
Op Amp
Timers
MSSP
RA0
13
12
AN0
V
REF
-
DAC1REF-
DAC3REF-
V
REF
+
DAC1REF+
DAC3REF+
—
—
—
—
DAC1OUT1
DAC3OUT1
—
—
C1IN0+
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
ICSPDAT
RA1
12
11
AN1
—
C1IN0-
C2IN0-
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
ICSPCLK
RA2
RA3
RA4
RA5
11
4
3
2
10
3
2
1
AN2
—
AN3
—
—
—
—
—
—
—
—
—
ZCD
—
—
—
—
—
—
—
T0CKI
(1)
T6CKI
(1)
T1G
(1)
SOSCO
T1CKI
(1)
T2CKI
(1)
SOSCI
T5CKI
(1)
T4CKI
(1)
—
T5G
(1)
T3G
(1)
T3CKI
(1)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
COG1IN
(1)
—
—
—
—
—
—
CLCIN3
(1)
—
MD1CH
(1)
MD1CL
(1)
MD1MOD
(1)
—
—
—
—
—
—
—
—
INT
(1)
IOC
IOC
IOC
IOC
Y
Y
Y
Y
—
—
—
—
—
V
PP
MCLR
OSC2
CLKOUT
OSC1
CLKIN
—
—
—
—
—
—
V
DD
V
SS
—
—
—
—
RC0
RC1
RC2
RC3
RC4
RC5
V
DD
V
SS
OUT
(2)
10
9
8
7
6
5
1
14
—
—
—
—
9
8
7
6
5
4
16
13
—
—
—
—
AN4
AN5
AN6
AN7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
OPA1IN+
OPA1IN-
OPA1OUT
—
—
—
—
—
—
—
—
—
C2IN0+
C1IN1-
C2IN1-
C1IN2-
C2IN2-
C1IN3-
C2IN3-
—
—
—
—
C1OUT
C2OUT
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PRG1IN0
—
PRG1R
(1)
PRG1F
(1)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PWM3
PWM5
—
—
—
—
—
—
—
CCP1
(1)
—
—
CCP1
—
—
—
—
—
—
—
—
—
—
—
COG1A
COG1B
COG1C
COG1D
—
CLCIN2
(1)
—
CLCIN0
(1)
CLCIN1
(1)
—
—
—
CLC1OUT
CLC2OUT
CLC3OUT
—
—
—
—
—
—
—
—
—
MD1OUT
—
—
—
—
—
—
—
CK
(1)
RX
(1,3)
—
—
DT
(3)
TX
CK
—
SCL
(1)
SCK
(1,3)
SDI
(1)
SDA
(1,3)
—
SS
(1)
—
—
—
—
SDO
SDA
(3)
SCK
SCL
(3)
IOC
IOC
IOC
IOC
IOC
IOC
—
—
INT
—
—
—
Y
Y
Y
Y
Y
Y
—
—
—
—
—
—
—
—
—
—
Y
Y
—
—
—
—
—
—
Basic
PWM
COG
ADC
DAC
CCP
CLC
I/O
PIC16(L)F1764/5/8/9
Note 1:
Default peripheral input. Input can be moved to any other pin with the PPS Input Selection register. See
Table 12-1.
2:
All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS Output Selection registers. See
Table 12-2.
3:
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.