PIC32MX330/350/370/430/450/470
32-bit Microcontrollers (up to 512 KB Flash and 128 KB SRAM)
with Audio/Graphics/Touch (HMI), USB, and Advanced Analog
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 80 MHz
®
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Core: 80 MHz/105 DMIPS MIPS32 M4K
®
• MIPS16e
®
mode for up to 40% smaller code size
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
•
•
•
•
•
0.9% internal oscillator
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timer
Fast wake-up and start-up
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Up to five UART modules (20 Mbps):
- Supports LIN 1.2 protocols and IrDA
®
support
• Two 4-wire SPI modules (25 Mbps)
• Two I
2
C modules (up to 1 Mbaud) with SMBus support
• PPS to allow function remap
• Parallel Master Port (PMP)
Power Management
• Low-power management modes (Sleep and Idle)
• Integrated Power-on Reset, Brown-out Reset, and High
Voltage Detect
• 0.5 mA/MHz dynamic current (typical)
• 40
μA
I
PD
current (typical)
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• 32-bit Programmable Cyclic Redundancy Check (CRC)
• Two additional channels dedicated to USB
Audio/Graphics/Touch HMI Features
External graphics interface with up to 34 PMP pins
Audio data communication: I
2
S, LJ, RJ, USB
Audio data control interface: SPI and I
2
C™
Audio data master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
•
•
•
•
Input/Output
• 15 mA or 12 mA source/sink for standard V
OH
/V
OL
and
up to 22 mA for non-standard V
OH1
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• External interrupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Advanced Analog Features
• ADC Module:
- 10-bit 1 Msps rate with one Sample and Hold (S&H)
- Up to 28 analog inputs
- Can operate during Sleep mode
• Flexible and independent ADC trigger sources
• On-chip temperature measurement capability
• Comparators:
- Two dual-input Comparator modules
- Programmable references with 32 voltage points
Debugger Development Support
•
•
•
•
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited program and six complex data breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type
Pin Count
I/O Pins (up to)
Contact/Lead Pitch
Dimensions
Note:
QFN
64
53
0.50
9x9x0.9
64
53
0.50
10x10x1
TQFP
100
85
0.40
12x12x1
100
85
0.50
14x14x1
VTLA
124
85
0.50
9x9x0.9
All dimensions are in millimeters (mm) unless specified.
2012-2013 Microchip Technology Inc.
Preliminary
DS60001185B-page 1
PIC32MX330/350/370/430/450/470
TABLE 1:
PIC32MX330/350/370/430/450/470 CONTROLLER FAMILY FEATURES
10-bit 1 Msps ADC (Channels)
Remappable Peripherals
Program Memory (KB)
(1)
Timers/Capture/Compare
(2)
Data Memory (KB)
DMA Channels
(Programmable/Dedicated)
USB On-The-Go (OTG)
External Interrupts
(3)
Remappable Pins
Analog Comparators
Packages
I/O Pins
Device
CTMU
RTCC
PIC32MX330F064H
PIC32MX330F064L
PIC32MX350F128H
PIC32MX350F128L
PIC32MX350F256H
PIC32MX350F256L
PIC32MX370F512H
PIC32MX370F512L
PIC32MX430F064H
PIC32MX430F064L
PIC32MX450F128H
PIC32MX450F128L
PIC32MX450F256H
PIC32MX450F256L
PIC32MX470F512H
PIC32MX470F512L
Note
1:
2:
3:
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
64
100
124
QFN,
TQFP
TQFP
VTLA
64+12
64+12
16
16
32
32
64
64
128
128
16
16
32
32
64
64
128
128
37
54
37
54
37
54
37
54
34
51
34
51
34
51
34
51
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
5/5/5
4
5
4
5
4
5
5
5
4
5
4
5
4
5
4
5
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
2/2
SPI/I
2
S
UART
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
N
N
N
N
N
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/0
4/2
4/2
4/2
4/2
4/2
4/2
4/2
4/2
53
85
53
85
53
85
51
83
51
83
51
83
51
83
51
83
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
N
Y
QFN,
128+12
TQFP
TQFP
VTLA
128+12
QFN,
256+12
TQFP
TQFP
VTLA
256+12
QFN,
512+12
TQFP
TQFP
VTLA
QFN,
TQFP
TQFP
VTLA
512+12
64+12
64+12
QFN,
128+12
TQFP
TQFP
VTLA
128+12
QFN,
256+12
TQFP
TQFP
VTLA
256+12
QFN,
512+12
TQFP
TQFP
VTLA
512+12
All devices feature 12 KB of Boot Flash memory.
Four out of five timers are remappable.
Four out of five external interrupts are remappable.
DS60001185B-page 2
Preliminary
2012-2013 Microchip Technology Inc.
Trace
JTAG
I
2
C™
PMP
Pins
PIC32MX330/350/370/430/450/470
Pin Diagrams
64-Pin QFN
(1,2,3)
= Pins are up to 5V tolerant
TRD3/RPE3/CTPLS/PMD3/RE3
TRD2/AN20/PMD2/RE2
TRD1/PMD1/RE1
TRD0/PMD0/RE0
TRCLK/RPF1/RF1
RPF0/RF0
RPD5/PMRD/RD5
RPD4/PMWR/RD4
AN26/RPD3/RD3
AN21/PMD4/RE4
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
AN22/RPE5/PMD5/RE5
AN23/PMD6/RE6
AN27/PMD7/RE7
AN16/C1IND/RPG6/SCK2/PMA5/RG6
AN17/C1INC/RPG7/PMA4/RG7
AN18/C2IND/RPG8/PMA3/RG8
MCLR
AN19/C2INC/RPG9/PMA2/RG9
V
SS
V
DD
AN5/C1INA/RPB5/RB5
AN4/C1INB/RB4
PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/C2INB/RPB2/CTED13/RB2
PGEC1/VREF-/CVREF-/AN1/RPB1/CTED12/RB1
PGED1/V
REF
+/CV
REF
+/AN0/RPB0/PMA6/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AN25/RPD2/RD2
AN24/RPD1/RD1
V
DD
V
CAP
RD7
RD6
PIC32MX330F064H
PIC32MX350F128H
PIC32MX350F256H
PIC32MX370F512H
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SOSCO/RPC14/T1CK/RC14
SOSCI/RPC13/RC13
RPD0/RD0
RPD11/PMCS1/RD11
RPD10/PMCS2/RD10
RPD9/RD9
RPD8/RTCC/RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RG2
SDA1/RG3
RPF6/SCK1/INT0/RF6
RPF2/RF2
RPF3/RF3
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PGED2/AN7/RPB7/CTED3/RB7
AV
DD
TDO/AN11/PMA12/RB11
V
SS
V
DD
TCK/AN12/PMA11/RB12
TDI/AN13/PMA10/RB13
AN14/RPB14/CTED5/PMA1/RB14
AN15/RPB15/OCFB/CTED6/PMA0/RB15
TMS/CV
REFOUT
/AN10/RPB10/CTED11/PMA13/RB10
PGEC2/AN6/RPB6/RB6
AVss
AN8/RPB8/CTED10/RB8
AN9/RPB9/CTED4/PMA7/RB9
SDA2/RPF4/PMA9/RF4
SCL2/RPF5/PMA8/RF5
Note
1:
2:
3:
The RPn pins can be used by remappable peripherals. See
Table 1
for the available peripherals and
Section 12.3 “Peripheral
Pin Select”
for restrictions.
Every I/O port pin (RAx-RGx), with the exception of RF6, can be used as a change notification pin (CNAx-CNGx). See
Section 12.0 “I/O Ports”
for more information.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS
externally.
2012-2013 Microchip Technology Inc.
Preliminary
DS60001185B-page 3
PIC32MX330/350/370/430/450/470
Pin Diagrams (Continued)
64-Pin QFN
(1,2,3)
= Pins are up to 5V tolerant
TRD3/RPE3/CTPLS/PMD3/RE3
TRD2/AN20/PMD2/RE2
TRD1/PMD1/RE1
TRD0/PMD0/RE0
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
AN22/RPE5/PMD5/RE5
AN23/PMD6/RE6
AN27/PMD7/RE7
AN16/C1IND/RPG6/SCK2/PMA5/RG6
AN17/C1INC/RPG7/PMA4/RG7
AN18/C2IND/RPG8/PMA3/RG8
MCLR
AN19/C2INC/RPG9/PMA2/RG9
V
SS
V
DD
AN5/C1INA/RPB5/V
BUSON
/RB5
AN4/C1INB/RB4
PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/C2INB/RPB2/CTED13/RB2
PGEC1/V
REF
-/CV
REF
-/AN1/RPB1/CTED12/RB1
PGED1/V
REF
+/CV
REF
+/AN0/RPB0/PMA6/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
RPD5/PMRD/RD5
RPD4/PMWR/RD4
AN26/RPD3/RD3
AN25/RPD2/SCK1/RD2
AN24/RPD1/RD1
TRCLK/RPF1/RF1
RPF0/RF0
V
DD
AN21/PMD4/RE4
V
CAP
RD7
RD6
PIC32MX430F064H
PIC32MX450F128H
PIC32MX450F256H
PIC32MX470F512H
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SOSCO/RPC14/T1CK/RC14
SOSCI/RPC13/RC13
RPD0/INT0/RD0
RPD11/PMCS1/RD11
SCL1/RPD10/PMCS2/RD10
SDA1/RPD9/RD9
RPD8/RTCC/RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
D+
D-
V
USB3V3
V
BUS
USBID/RF3
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
AN15/RPB15/OCFB/CTED6/PMA0/RB15
SDA2/RPF4/PMA9/RF4
PGED2/AN7/RPB7/CTED3/RB7
AV
DD
AV
SS
AN8/RPB8/CTED10/RB8
AN9/RPB9/CTED4/PMA7/RB9
TMS/CV
REFOUT
/AN10/RPB10/CTED11/PMA13/RB10
TDO/AN11/PMA12/RB11
V
SS
V
DD
TCK/AN12/PMA11/RB12
TDI/AN13/PMA10/RB13
AN14/RPB14/CTED5/PMA1/RB14
PGEC2/AN6/RPB6/RB6
SCL2/RPF5/PMA8/RF5
Note
1:
2:
3:
The RPn pins can be used by remappable peripherals. See
Table 1
for the available peripherals and
Section 12.3 “Peripheral
Pin Select”
for restrictions.
Every I/O port pin (RAx-RGx), with the exception of RF6, can be used as a change notification pin (CNAx-CNGx). See
Section 12.0 “I/O Ports”
for more information.
The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to V
SS
externally.
DS60001185B-page 4
Preliminary
2012-2013 Microchip Technology Inc.
PIC32MX330/350/370/430/450/470
Pin Diagrams (Continued)
64-Pin TQFP
(1,2)
= Pins are up to 5V tolerant
TRD3/RPE3/CTPLS/PMD3/RE3
TRD2/AN20/PMD2/RE2
TRD1/PMD1/RE1
RPD4/PMWR/RD4
AN26/RPD3/RD3
AN25/RPD2/RD2
TRD0/PMD0/RE0
TRCLK/RPF1/RF1
RPF0/RF0
RD6
RPD5/PMRD/RD5
AN21/PMD4/RE4
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
AN22/RPE5/PMD5/RE5
AN23/PMD6/RE6
AN27/PMD7/RE7
AN16/C1IND/RPG6/SCK2/PMA5/RG6
AN17/C1INC/RPG7/PMA4/RG7
AN18/C2IND/RPG8/PMA3/RG8
MCLR
AN19/C2INC/RPG9/PMA2/RG9
V
SS
V
DD
AN5/C1INA/RPB5/RB5
AN4/C1INB/RB4
PGED3/AN3/C2INA/RPB3/RB3
PGEC3/AN2/C2INB/RPB2/CTED13/RB2
PGEC1/V
REF
-/CV
REF
-/AN1/RPB1/CTED12/RB1
PGED1/V
REF
+/CV
REF
+/AN0/RPB0/PMA6/RB0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AN24/RPD1/RD1
V
CAP
RD7
V
DD
PIC32MX330F064H
PIC32MX350F128H
PIC32MX350F256H
PIC32MX370F512H
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
SOSCO/RPC14/T1CK/RC14
SOSCI/RPC13/RC13
RPD0/RD0
RPD11/PMCS1/RD11
RPD10/PMCS2/RD10
RPD9/RD9
RPD8/RTCC/RD8
V
SS
OSC2/CLKO/RC15
OSC1/CLKI/RC12
V
DD
SCL1/RG2
SDA1/RG3
RPF6/SCK1/INT0/RF6
RPF2/RF2
RPF3/RF3
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PGED2/AN7/RPB7/CTED3//RB7
AV
DD
AV
SS
AN8/RPB8/CTED10//RB8
AN9/RPB9/CTED4/PMA7/RB9
TMS/CV
REFOUT
/AN10/RPB10/CTED11//PMA13/RB10
TDO/AN11/PMA12/RB11
V
SS
V
DD
TDI/AN13/PMA10/RB13
AN14/RPB14/CTED5/PMA1/RB14
TCK/AN12/PMA11/RB12
PGEC2/AN6/RPB6/RB6
AN15/RPB15/OCFB/CTED6/PMA0/RB15
SDA2/RPF4/PMA9/RF4
SCL2/RPF5/PMA8/RF5
Note
1:
2:
The RPn pins can be used by remappable peripherals. See
Table 1
for the available peripherals and
Section 12.3 “Peripheral
Pin Select”
for restrictions.
Every I/O port pin (RAx-RGx), with the exception of RF6, can be used as a change notification pin (CNAx-CNGx). See
Section 12.0 “I/O Ports”
for more information.
2012-2013 Microchip Technology Inc.
Preliminary
DS60001185B-page 5
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