PIC32MZ Graphics (DA) Family
32-bit Graphics Applications MCUs (up to 2 MB Live Update Flash,
640 KB SRAM, and 32 MB DDR2 SDRAM) with XLP Technology
Operating Conditions
• 2.2V to 3.6V, -40ºC to +85ºC, DC to 200 MHz
• 2.2V to 3.6V, -40ºC to +105ºC (Planned)
Core: 200 MHz / 330 DMIPS MIPS32
®
microAptiv™
•
•
•
•
32 KB I-Cache, 32 KB D-Cache
MMU for optimum embedded OS execution
microMIPS™ mode for up to 35% smaller code size
DSP-enhanced core:
- Four 64-bit accumulators
- Single-cycle MAC, saturating and fractional math
• Code-efficient (C and Assembly) architecture
Advanced Analog Features
• 12-bit ADC modules:
- 18 Msps with up to six ADC circuits (five dedicated and one
shared)
- Up to 45 analog input
- Can operate during Sleep and Idle modes
- Multiple trigger sources
- Six Digital Comparators and six Digital Filters
• Two Comparators with 32 programmable voltage references
• Temperature sensor with ±2ºC accuracy
• Charge Time Measurement Unit (CTMU)
Clock Management
•
•
•
•
•
Programmable PLLs and oscillator clock sources
Dedicated PLL for DDR2
Fail-Safe Clock Monitor
Independent Watchdog and Deadman Timers
Fast wake-up and start-up
Communication Interfaces
• Two CAN modules (with dedicated DMA channels):
- 2.0B Active with DeviceNet™ addressing support
• Six UART modules (25 Mbps):
- Supports up to LIN 2.1 and IrDA
®
protocols
• Six 4-wire SPI modules (up to 50 MHz)
• SQI configurable as additional SPI module (up to 80 MHz)
• Five I
2
C modules (up to 1 Mbaud) with SMBus support
• Parallel Master Port (PMP)
• Peripheral Pin Select (PPS) to enable function remap
Power Management
• Various power management options for extreme power
reduction (V
BAT
, Deep Sleep, Sleep and Idle)
• Deep Sleep current: < 1 µA (typical)
• Integrated POR and BOR
• Programmable High/Low-Voltage Detect (HLVD) on V
DDIO
and High-Voltage Detect (HVD) on V
DDR1V8
Timers/Output Compare/Input Capture
•
•
•
•
•
•
•
•
•
Nine 16-bit and up to four 32-bit timers/counters
Nine Output Compare (OC) modules
Nine Input Capture (IC) modules
Real-Time Clock and Calendar (RTCC) module
5V-tolerant pins with up to 32 mA source/sink
Selectable open drain, pull-ups, and pull-downs
Selectable slew rate control
External interrupts on all I/O pins
PPS to enable function remap
Memory Interfaces
•
•
•
•
DDR2 SDRAM interface (up to DDR2-400)
SD/SDIO/eMMC bus interface (up to 50 MHz)
Serial Quad Interface (up to 80 MHz)
External Bus Interface (up to 50 MHz)
Input/Output
Graphics Features
• 3-layer Graphics Controller with up to 24-bit color support
• High-performance 2D Graphics Processing Unit (GPU)
Audio Interfaces
• Audio data communication: I
2
S, LJ, and RJ
• Audio control interfaces: SPI and I
2
C
• Audio master clock: Fractional clock frequencies with USB
synchronization
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) (Planned)
• Class B Safety Library, IEC 60730
• Back-up internal oscillator
High-Speed Communication Interfaces (with
Dedicated DMA)
• USB 2.0-compliant High-Speed On-The-Go (OTG) controller
• 10/100 Mbps Ethernet MAC with MII and RMII interface
Debugger Development Support
•
•
•
•
•
•
•
•
•
In-circuit and in-application programming
4-wire MIPS
®
Enhanced JTAG interface
Unlimited software and 12 complex breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Non-intrusive hardware-based instruction trace
C/C++ compiler with native DSP/fractional support
MPLAB
®
Harmony Integrated Software Framework
TCP/IP, USB, Graphics, and mTouch™ middleware
MFi, Android™, and Bluetooth
®
audio frameworks
Security Features
• Crypto Engine with a RNG for data encryption/decryption and
authentication (AES, 3DES, SHA, MD5, and HMAC)
• Advanced memory protection:
- Peripheral and memory region access control
Integrated Software Libraries and Tools
Direct Memory Access (DMA)
• Eight channels with automatic data size detection
• Programmable Cyclic Redundancy Check (CRC)
• RTOS Kernels: Express Logic ThreadX, FreeRTOS™,
OPENRTOS
®
, Micriµm
®
µC/OS™, and SEGGER embOS
®
Packages
Type
Pin Count
I/O Pins (up to)
Contact/Lead Pitch
Dimensions
169
120
0.8 mm
11x11 mm
LFBGA
288
120
0.8 mm
15x15 mm
LQFP
176
120
0.4 mm
20x20 mm
2015-2018 Microchip Technology Inc.
DS60001361G-page 1
PIC32MZ Graphics (DA) Family
TABLE 1:
Boot Flash Memory (KB)
Timers
(1)
/Capture/
Compare
PIC32MZ DA FEATURES COMMON TO ALL DEVICES
Analog Comparators
12-bit ADC Channels
External Interrupts
(2)
USB 2.0 HS OTG
Remappable Peripherals
Remappable Pins
Ethernet
I/O Pins
CTMU
GLCD
SDHC
RTCC
CAN 2.0B
160
Note
47
1:
2:
9/9/9
6
SPI/I
2
S
UART
6
2
5
45
2
Y
Y
5
Y
Y
Y
Y
Y
Y
Y
Y
120
Y
Eight out of nine timers are remappable.
Four out of five external interrupts are remappable.
TABLE 2:
169-PIN LFBGA PIC32MZ DA
FEATURES
DDR2 Controller
Interface (Internal/External)
Program Memory (KB)
DMA Channels
(Programmable/
Dedicated)
TABLE 3:
176-PIN LQFP PIC32MZ DA
FEATURES
DDR2 Controller
Interface (Internal/External)
Program Memory (KB
Data Memory (KB
DMA Channels
(Programmable/
Dedicated)
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
2J
DMA Channels
(Programmable/Dedicated)
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
4J
DDR2 SDRAM
Size (MB)
DDR2 SDRAM
Size (MB)
Data
Memory (KB)
Crypto/RNG
Crypto/RNG
Package
PIC32MZ1025DAA169
PIC32MZ1025DAB169
PIC32MZ1064DAA169
PIC32MZ1064DAB169
PIC32MZ2025DAA169
PIC32MZ2025DAB169
PIC32MZ2064DAA169
PIC32MZ2064DAB169
PIC32MZ1025DAG169
PIC32MZ1025DAH169
PIC32MZ1064DAG169
PIC32MZ1064DAH169
PIC32MZ2025DAG169
PIC32MZ2025DAH169
PIC32MZ2064DAG169
PIC32MZ2064DAH169
2048
1024
2048
1024
256
640
No
256
640
256
640
256
640
—
N
Y
N
Y
N
Y
N
Y
N
Y
N
Yes
(INT)
32
Y
N
Y
N
Y
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
8/24
8/26
6J
HF
PIC32MZ1025DAA176
PIC32MZ1025DAB176
1024
PIC32MZ1064DAA176
PIC32MZ1064DAB176
PIC32MZ2025DAA176
PIC32MZ2025DAB176
2048
PIC32MZ2064DAA176
PIC32MZ2064DAB176
PIC32MZ1025DAG176
PIC32MZ1025DAH176
1024
PIC32MZ1064DAG176
PIC32MZ1064DAH176
PIC32MZ2025DAG176
PIC32MZ2025DAH176
2048
PIC32MZ2064DAG176
PIC32MZ2064DAH176
256
640
No
256
640
256
640
256
640
—
N
Y
N
Y
N
Y
N
Y
N
Y
N
Yes
(INT)
32
Y
N
Y
N
Y
TABLE 4:
288-PIN LFBGA PIC32MZ DA
FEATURES
DDR2 Controller
Interface (Internal/External)
Program Memory (KB)
Data Memory (KB)
Crypto/RNG
PIC32MZ1025DAA288
PIC32MZ1025DAB288
PIC32MZ1064DAA288
PIC32MZ1064DAB288
PIC32MZ2025DAA288
PIC32MZ2025DAB288
PIC32MZ2064DAA288
PIC32MZ2064DAB288
2048
1024
25
6
64
0
25
6
64
0
Yes
(EXT)
N
Y
N
Y
N
Y
N
Y
DS60001361G-page 2
2015-2018 Microchip Technology Inc.
Package
Devices
Package
Devices
Devices
Trace
Y
JTAG
GPU
PMP
SQI
EBI
I
2
C
PIC32MZ Graphics (DA) Family
Device Pin Tables
TABLE 5:
PIN NAMES FOR 169-PIN DEVICES
A1
N1
169-PIN LFBGA (BOTTOM VIEW)
PIC32MZ1025DAA169
PIC32MZ1025DAB169
PIC32MZ1064DAA169
PIC32MZ1064DAB169
PIC32MZ2025DAA169
PIC32MZ2025DAB169
PIC32MZ2064DAA169
PIC32MZ2064DAB169
PIC32MZ1025DAG169
PIC32MZ1025DAH169
PIC32MZ1064DAG169
PIC32MZ1064DAH169
PIC32MZ2025DAG169
PIC32MZ2025DAH169
PIC32MZ2064DAG169
PIC32MZ2064DAH169
Ball/Pin
Number
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
C1
C2
C3
C4
Note 1:
2:
3:
4:
5:
6:
No Connect
V
BUS
RPF2/SDA3/RF2
EBID1/AN39/PMD1/RE1
AN21/RG15
TDI/AN17/SCK5/RF13
EBIWE/AN34/RPC3/PMWR/RC3
EBID12/AN10/RPC2/PMD12/RC2
EBID10/AN4/RPB8/PMD10/RB8
AN8/RPB3/RB3
EBIA5/AN7/PMA5/RA5
AN2/C1INB/RB4
AN1/C2INB/RPB2/RB2
D-
V
USB3V3
EBID4/AN18/PMD4/RE4
V
DDCORE
AN30/C2IND/RPG8/SCL4/RG8
V
DDIO
EBID5/AN12/RPC1/PMD5/RC1
EBIOE/AN19/RPC4/PMRD/RC4
PGEC1/AN9/RPB1/CTED1/RB1
AN3/C2INA/RPB15/OCFB/RB15
VREF-/CVREF-/AN27/RA9
EBIA7/AN47/HLVDIN/RPB9/PMA7/RB9
AN6/RB12
D+
V
SS
INT0/RH14
N13
A13
Polarity Indicator
Full Pin Name
Ball/Pin
Number
C5
C6
C7
C8
C9
C10
C11
C12
C13
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
E1
E2
E3
E4
E5
E6
E7
Full Pin Name
EBIA2/AN23/C2INC/RPG9/PMA2/RG9
TDO/AN31/RPF12/RF12
EBID7/AN15/PMD7/RE7
AV
SS
V
DDCORE
V
REF
+/CV
REF
+/AN28/RA10
CV
REFOUT
/AN5/RPB10/RB10
PGED1/AN0/RPB0/CTED2/RB0
SOSCI/RPC13
(6)
/RC13
(6)
TRD3/SDDATA3/SQID3/RA7
TMS/SDCD/RA0
USBID
AN20/RH4
AN13/C1INC/RPG7/SDA4/RG7
AN26/RPE9/RE9
PGEC2/RPB6/RB6
AV
SS
AV
DD
V
BAT
AN45/RPB5/RB5
PGED2/C1INA/AN46/RPB7/RB7
SOSCO/RPC14
(6)
/T1CK/RC14
(6)
TRD2/SDDATA2/SQID2/RG14
TRD0/SDDATA0/SQID0/RG13
TRD1/SDDATA1/SQID1/RG12
TRCLK/SDCK/SQICLK/RA6
AN14/C1IND/SCK2/RG6
AN25/RPE8/RE8
AN49/RB11
EBID0/PMD0/RE0
E8
GD20/EBIA22/RJ3
The RPn pins can be used by remappable peripherals. See
Table 1
and
Table 2
for the available peripherals and
12.4 “Peripheral Pin
Select (PPS)”
for restrictions.
Every I/O port pin (RAx-RKx) can be used as a change notification pin (CNAx-CNKx). See
12.0 “I/O Ports”
for more information.
Shaded pins are 5V tolerant.
This pin must be tied to Vss through a 20k
resistor in devices without DDR.
This pin is a No Connect in devices without DDR.
These pins are restricted to input functions only.
2015-2018 Microchip Technology Inc.
DS60001361G-page 3
PIC32MZ Graphics (DA) Family
TABLE 5:
PIN NAMES FOR 169-PIN DEVICES (CONTINUED)
A1
N1
169-PIN LFBGA (BOTTOM VIEW)
PIC32MZ1025DAA169
PIC32MZ1025DAB169
PIC32MZ1064DAA169
PIC32MZ1064DAB169
PIC32MZ2025DAA169
PIC32MZ2025DAB169
PIC32MZ2064DAA169
PIC32MZ2064DAB169
PIC32MZ1025DAG169
PIC32MZ1025DAH169
PIC32MZ1064DAG169
PIC32MZ1064DAH169
PIC32MZ2025DAG169
PIC32MZ2025DAH169
PIC32MZ2064DAG169
PIC32MZ2064DAH169
Ball/Pin
Number
E9
E10
E11
E12
E13
F1
F2
F3
F4
F5
F6
F7
F8
F9
F10
F11
F12
F13
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
G12
G13
H1
Note
1:
2:
3:
4:
5:
6:
AN22/RPD14/RD14
AN29/SCK3/RB14
TCK/AN24/RA1
OSC1/CLKI/RC12
OSC2/CLKO/RC15
SDCMD/SQICS0/RPD4/RD4
SQICS1/RPD5/RD5
EBIA6/RPE5/PMA6/RE5
DDRV
REF
(5)
V
SS
EBID6/AN16/PMD6/RE6
AN48/CTPLS/RB13
GD18/EBIBS1/RJ10
GD9/EBIBS0/RJ12
EBIRDY3/AN32/RJ2
AN33/SCK6/RD15
HSYNC/EBICS1/RJ5
VSYNC/EBICS0/RJ4
SCK1/RD1
GD10/EBIA14/RPD2/PMA14/PMCS1/RD2
GD11/EBIA15/RPD3/PMA15/PMCS2/RD3
V
SS1V8
V
SS
V
SS
V
SS
V
SS
V
DDIO
GD8/EBID11/PMD11/RJ14
GCLK/EBICS2/RJ6
GD0/EBID13/PMD13/RJ13
GEN/EBICS3/RJ7
N13
A13
Polarity Indicator
Full Pin Name
Ball/Pin
Number
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
H12
H13
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
K1
K2
K3
K4
K5
K6
SCK4/RD10
RTCC/RPD0/RD0
V
SS1V8
Full Pin Name
V
DDR1V8
(4)
V
DDR1V8
(4)
V
SS
V
SS
V
DDIO
GD13/EBIA18/RK4
EBIA3/AN11/PMA3/RK2
SDWP/EBIRP/RH2
EBIA0/PMA0/RJ15
GD7/EBIA12/RPD12/PMA12/RD12
GD22/EBIA13/PMA13/RD13
RPF8/SCL3/RF8
V
SS1V8
V
DDR1V8
(4)
V
DDR1V8
(4)
V
SS
V
SS
V
DDIO
GD14/EBIA19/RK5
EBIA1/AN38/PMA1/RK1
EBIA4/AN36/PMA4/RH7
AN35/RH3
MCLR
GD16/EBID8/RPF5/SCL5/PMD8/RF5
GD5/EBIA10/RPF1/PMA10/RF1
V
SS1V8
V
DDR1V8
(4)
V
DDR1V8
(4)
GD2/EBID15/RPD9/PMD15/RD9
K7
Vss
The RPn pins can be used by remappable peripherals. See
Table 1
and
Table 2
for the available peripherals and
12.4 “Peripheral Pin
Select (PPS)”
for restrictions.
Every I/O port pin (RAx-RKx) can be used as a change notification pin (CNAx-CNKx). See
12.0 “I/O Ports”
for more information.
Shaded pins are 5V tolerant.
This pin must be tied to Vss through a 20k
resistor in devices without DDR.
This pin is a No Connect in devices without DDR.
These pins are restricted to input functions only.
DS60001361G-page 4
2015-2018 Microchip Technology Inc.
PIC32MZ Graphics (DA) Family
TABLE 5:
PIN NAMES FOR 169-PIN DEVICES (CONTINUED)
A1
N1
169-PIN LFBGA (BOTTOM VIEW)
PIC32MZ1025DAA169
PIC32MZ1025DAB169
PIC32MZ1064DAA169
PIC32MZ1064DAB169
PIC32MZ2025DAA169
PIC32MZ2025DAB169
PIC32MZ2064DAA169
PIC32MZ2064DAB169
PIC32MZ1025DAG169
PIC32MZ1025DAH169
PIC32MZ1064DAG169
PIC32MZ1064DAH169
PIC32MZ2025DAG169
PIC32MZ2025DAH169
PIC32MZ2064DAG169
PIC32MZ2064DAH169
Ball/Pin
Number
K8
K9
K10
K11
K12
K13
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
L12
L13
M1
M2
M3
M4
Note
1:
2:
3:
4:
5:
6:
N13
A13
Polarity Indicator
Full Pin Name
V
SS
V
DDIO
EMDIO/RJ1
ETXEN/RPD6/RD6
GD23/EBIA16/RK0
EBIRDY2/AN37/RH11
GD6/EBIA11/RPF0/PMA11/RF0
GD21/EBIA23/RH15
GD17/EBID9/RPF4/SDA5/PMD9/RF4
V
SS1V8
V
SS1V8
V
DDIO
V
DDIO
V
DDCORE
V
DDIO
ETXERR/RJ0
GD1/EBID14/PMD14/RA4
SCL2/RA2
GD12/EBIA17/RK3
ERXERR/RPF3/RF3
GD4/EBIA9/RPG1/PMA9/RG1
EBID3/RPE3/PMD3/RE3
ERXD1/RH5
Ball/Pin
Number
M5
M6
M7
M8
M9
M10
M11
M12
M13
N1
N2
N3
N4
N5
N6
N7
N8
N9
N10
N11
N12
N13
Full Pin Name
ERXDV/ECRSDV/RH13
ECOL/RH10
ETXD3/RH1
ETXD2/RH0
ETXD1/RJ9
ETXCLK/RPD7/RD7
RPA14/SCL1/RA14
GD19/EBIA21/RK7
GD15/EBIA20/RK6
V
DDCORE
GD3/EBIA8/RPG0/PMA8/RG0
EBID2/PMD2/RE2
ERXD2/RH6
ECRS/RH12
ERXD3/RH9
ERXD0/RH8
ERXCLK/EREFCLK/RJ11
ETXD0/RJ8
EMDC/RPD11/RD11
RPA15/SDA1/RA15
EBIRDY1/SDA2/RA3
No Connect
The RPn pins can be used by remappable peripherals. See
Table 1
and
Table 2
for the available peripherals and
12.4 “Peripheral Pin
Select (PPS)”
for restrictions.
Every I/O port pin (RAx-RKx) can be used as a change notification pin (CNAx-CNKx). See
12.0 “I/O Ports”
for more information.
Shaded pins are 5V tolerant.
This pin must be tied to Vss through a 20k
resistor in devices without DDR.
This pin is a No Connect in devices without DDR.
These pins are restricted to input functions only.
2015-2018 Microchip Technology Inc.
DS60001361G-page 5
Microchip MCU
