Part Number 405GPr
Revision 2.04 – September 7, 2007
405GPr
Power PC 405GPr Embedded Processor
Features
• PowerPC
®
405 32-bit RISC processor core
operating up to 400MHz with 16KB I- and
D-caches
• Synchronous DRAM (SDRAM) interface operating
up to 133MHz
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8
check bits for ECC applications
• 4KB on-chip memory (OCM)
• External peripheral bus
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM and
external peripherals
- Up to eight devices
- External Mastering supported
• DMA support for external peripherals, internal
UART and memory
- Scatter-gather chaining supported
- Four channels
• PCI Revision 2.2 compliant interface (32-bit, up to
66MHz)
Data Sheet
- Synchronous or asynchronous PCI Bus
interface
- Internal or external PCI Bus Arbiter
• Ethernet 10/100Mbps (full-duplex) support with
media independent interface (MII)
• Programmable interrupt controller supports 13
external and 19 internal edge triggered or level-
sensitive interrupts
• Programmable timers
• Two serial ports (16550 compatible UART)
• One IIC interface
• General purpose I/O (GPIO) available
• Supports JTAG for board level testing
• Internal processor local Bus (PLB) runs at SDRAM
interface frequency
• Supports PowerPC processor boot from PCI
memory
• Unique software-accessible 64-bit chip ID number
(ECID).
Description
Designed specifically to address embedded
applications, the PowerPC 405GPr (PPC405GPr)
provides a high-performance, low-power solution that
interfaces to a wide range of peripherals by
incorporating on-chip power management features
and lower power dissipation requirements.
This chip contains a high-performance RISC
processor core, SDRAM controller, PCI bus interface,
Ethernet interface, control for external ROM and
peripherals, DMA with scatter-gather support, serial
ports, IIC interface, and general purpose I/O.
Technology: CMOS SA-27E, 0.18
μm
(0.11
μm
L
eff
)
Package: 456-ball (35mm or 27mm) enhanced plastic
ball grid array (E-PBGA) in both leaded and lead-free
versions
Power (typical): 0.72W at 266MHz
AMCC
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405GPr – Power PC 405GPr Embedded Processor
Revision 2.04 – September 7, 2007
Data Sheet
Contents
Ordering, PVR, and JTAG Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Address Map Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
On-Chip Memory (OCM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
PLB to PCI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
SDRAM Memory Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
External Peripheral Bus Controller (EBC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
IIC Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
General Purpose IO (GPIO) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Universal Interrupt Controller (UIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
10/100 Mbps Ethernet MAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Signal List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Spread Spectrum Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Strapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Tables
System Memory Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
DCR Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Signals Listed Alphabetically . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Signals Listed by Ball Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Pin Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Signal Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Package Thermal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Recommended DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Input Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Clocking Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Peripheral Interface Clock Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
I/O Specifications—Group 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
I/O Specifications—Group 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
PPC405GPr Legacy Mode Strapping Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
PPC405GPr New Mode Strapping Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
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AMCC
Revision 2.04 – September 7, 2007
405GPr – Power PC 405GPr Embedded Processor
Data Sheet
Figures
PPC405GPr Embedded Controller Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
27mm, 456-Ball E-PBGA Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
35mm, 456-Ball E-PBGA Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5V-Tolerant Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Input Setup and Hold Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Output Delay and Float Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
AMCC
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405GPr – Power PC 405GPr Embedded Processor
Revision 2.04 – September 7, 2007
Data Sheet
Ordering, PVR, and JTAG Information
Processor Fre-
quency
266MHz
266MHz
266MHz
266MHz
266MHz
266MHz
266MHz
266MHz
333MHz
2
333MHz
2
333MHz
2
333MHz
2
333MHz
2
333MHz
2
333MHz
2
333MHz
2
400MHz
400MHz
400MHz
400MHz
400MHz
400MHz
400MHz
400MHz
Rev
Level
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
Product Name
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
PPC405GPr
Order Part Number
1
PPC405GPr-3BB266
PPC405GPr-3JB266
PPC405GPr-3BB266Z
PPC405GPr-3JB266Z
PPC405GPr-3DB266
PPC405GPr-3KB266
PPC405GPr-3DB266Z
PPC405GPr-3KB266Z
PPC405GPr-3BB333
PPC405GPr-3JB333
PPC405GPr-3BB333Z
PPC405GPr-3JB333Z
PPC405GPr-3DB333
PPC405GPr-3KB333
PPC405GPr-3DB333Z
PPC405GPr-3KB333Z
PPC405GPr-3BB400
PPC405GPr-3JB400
PPC405GPr-3BB400Z
PPC405GPr-3JB400Z
PPC405GPr-3DB400
PPC405GPr-3KB400
PPC405GPr-3DB400Z
PPC405GPr-3KB400Z
Package
35mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
35mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
27mm, 456 E-PBGA
PVR Value
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
0x50910951
JTAG ID
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
0x24088049
Notes
1: Z at the end of the Order Part Number indicates a tape-and-reel shipping package. Otherwise, the chips are shipped in a tray.
2. If the 333MHz parts are operated at 266MHz or less, the operational temperature range is extended to 105
°
C
The part number contains a revision code. This refers to the die mask revision number and is included in the part
numbering scheme for identification purposes only.
The PVR (Processor Version Register) is software accessible and contains additional information about the
revision level of the part. Refer to the
PowerPC 405GPr Embedded Processor User’s Manual
for details on the
register content.
4
AMCC
Revision 2.04 – September 7, 2007
405GPr – Power PC 405GPr Embedded Processor
Data Sheet
Order Part Number Key
PPC405GPr-3BB266x
Shipping Package
Blank = Tray
Z = Tape and reel
Part Number
Grade 3 Reliability
Processor Speed
266MHz
333MHz
400MHz
Revision Level
Package and Operational Case Temperature
B: 35mm, 456 E-PBGA, -40°C to +85°C
D: 27mm, 456 E-PBGA, -40°C to +85°C
J: 35mm, 456 E-PBGA lead-free, -40°C to +85°C
K: 27mm, 456 E-PBGA lead-free, -40°C to +85°C
AMCC
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