PSD402A1,PSD402A1 pdf中文资料,PSD402A1引脚图,PSD402A1电路-Datasheet-电子工程世界

文档预览

PSD4XX

ZPSD4XX

Low Cost Field Programmable Microcontroller Peripherals

NOT FOR NEW DESIGN

FEATURES SUMMARY

Single Supply Voltage:

– 5 V±10% for PSD4XX

– 2.7 to 5.5 V for PSD4XX-V

Figure 1. Packages

Up to 1 Mbit of UV EPROM

Up to 16 Kbit SRAM

Input Latches

Programmable I/O ports

Page Logic

Programmable Security

PLDCC68 (J)

CLDCC68 (L)

TQFP68 (U)

January 2002

This is information on a product still in production but not recommended for new designs.

1/3

PSD4XX Family

PSD4XX/ZPSD4XX

Field-Programmable Microcontroller Peripherals

Table of Contents

Introduction ...........................................................................................................................................................1

Key Features ........................................................................................................................................................2

Notation ................................................................................................................................................................3

Zero-Power Background .......................................................................................................................................3

Integrated Power Management

Operation ........................................................................................................5

Design Flow ..........................................................................................................................................................6

PSD4XX Family ....................................................................................................................................................7

Table 2. PSD4XX Pin Descriptions......................................................................................................................8

The PSD4XX Architecture ..................................................................................................................................10

9.1 The ZPLD Block..........................................................................................................................................10

9.1.1 The PSD4XXA1 ZPLD Block............................................................................................................10

9.1.1.1 The DPLD ..........................................................................................................................12

9.1.1.2 The GPLD ..........................................................................................................................13

9.1.1.3 TPA Macrocell Structure ...................................................................................................13

9.1.1.4 Port B Macrocell Structure .................................................................................................17

9.1.1.5 The ZPLD Power Management..........................................................................................18

9.1.2 The PSD4XXA2 ZPLD Block............................................................................................................22

9.1.2.1 The DPLD ..........................................................................................................................24

9.1.2.2 The GPLD ..........................................................................................................................26

9.1.2.3 Port A Macrocell Structure .................................................................................................26

9.1.2.4 Port B Macrocell Structure .................................................................................................30

9.1.2.5 Port E Macrocell Structure .................................................................................................33

9.1.2.6 The ZPLD Power Management..........................................................................................34

9.2 Bus Interface...............................................................................................................................................37

9.2.1 Bus Interface Configuration ..............................................................................................................37

9.2.2 PSD4XX Interface to a Multiplexed Bus ...........................................................................................38

9.2.3 PSD4XX Interface to Non-Multiplexed Bus ......................................................................................38

9.2.4 Data Byte Enable..............................................................................................................................42

9.2.5 Optional Features .............................................................................................................................43

9.2.6 Bus Interface Examples....................................................................................................................43

9.3 I/O Ports......................................................................................................................................................48

9.3.1 Standard MCU I/O ............................................................................................................................48

9.3.2 PLD I/O ...........................................................................................................................................48

9.3.3 Address Out......................................................................................................................................49

9.3.4 Address In ........................................................................................................................................49

9.3.5 Data Port ..........................................................................................................................................49

9.3.6 Alternate Function In ........................................................................................................................49

9.3.7 Peripheral I/O ...................................................................................................................................50

9.3.8 Open Drain Outputs..........................................................................................................................50

9.3.9 Port Registers...................................................................................................................................51

9.3.10 Port A – Functionality and Structure.................................................................................................54

9.3.11 Port B – Functionality and Structure.................................................................................................54

9.3.12 Port C and Port D – Functionality and Structure ..............................................................................57

9.3.13 Port E – Functionality and Structure.................................................................................................57

9.4 Memory Block .............................................................................................................................................61

9.4.1 EPROM ............................................................................................................................................61

9.4.2 SRAM ...............................................................................................................................................61

PSD4XX Family

PSD4XX/ZPSD4XX

Field-Programmable Microcontroller Peripherals

Table of Contents

(cont.)

10.0

11.0

12.0

13.0

14.0

15.0

16.0

17.0

18.0

19.0

20.0

9.4.3 Memory Select Map..........................................................................................................................61

9.4.4 Memory Select Map for 8031 Application.........................................................................................62

9.4.5 Peripheral I/O ...................................................................................................................................65

9.5 Power Management Unit ............................................................................................................................67

9.5.1 Standby Mode ..................................................................................................................................67

9.5.2 Other Power Saving Options ............................................................................................................70

Page Register .....................................................................................................................................................72

Security Protection..............................................................................................................................................72

System Configuration .........................................................................................................................................73

12.1 Reset Input ..............................................................................................................................................76

12.2 ZPLD and Memory During Reset.............................................................................................................76

12.3 Register Values During and After Reset..................................................................................................76

12.4 ZPLD Macrocell Initialization ...................................................................................................................76

Specifications......................................................................................................................................................77

13.1 Absolute Maximum Ratings .....................................................................................................................77

13.2 Operating Range .....................................................................................................................................77

13.3 Recommended Operating Conditions......................................................................................................77

13.4 AC/DC Parameters ..................................................................................................................................78

13.5 Example of ZPSD4XX Typical Power Calculation at V

= 5.0 V...........................................................80

13.6 DC Characteristics (5 V ± 10% versions) ................................................................................................81

13.7 AC/DC Parameters – ZPLD Timing Parameters .....................................................................................82

13.8 Microcontroller Interface – AC/DC Parameters .......................................................................................84

13.9 DC Characteristics (ZPSD4XXV Versions) (3.0 V ± 10% versions) ........................................................88

13.10 AC/DC Parameters – ZPLD Timing Parameters (3.0 V ± 10% versions)................................................89

13.11 Microcontroller Interface – AC/DC Parameters (3.0 V± 10% versions)...................................................91

Timing Diagrams.................................................................................................................................................95

Pin Capacitance................................................................................................................................................102

AC Testing ........................................................................................................................................................102

Erasure and Programming................................................................................................................................102

PSD4XX Pin Assignments ................................................................................................................................103

Package Information.........................................................................................................................................105

PSD4XX Product Ordering Information ............................................................................................................110

20.1 PSD4XX Family – Selector Guide .........................................................................................................110

20.2 Part Number Construction .....................................................................................................................111

20.3 Ordering Information..............................................................................................................................111

Programmable Peripheral

PSD4XX Family

Field-Programmable Microcontroller Peripherals

1.0

Introduction

The PSD4XX family is a microcontroller peripheral that integrates high-performance and

user-configurable blocks of EPROM, programmable logic, and SRAM into one part.

The PSD4XX products also provide a powerful microcontroller interface that eliminates the

need for external “glue logic”. The no “glue logic” concept provides a user-programmable

interface to a variety of 8- and 16-bit (multiplexed or non-multiplexed) microcontrollers that

is easy to use. The part’s integration, small form factor, low power consumption, and ease

of use make it the ideal part for interfacing to virtually any microcontroller.

The PSD4XX provides two Zero-power PLDs (ZPLD): a Decode PLD (DPLD) and a

General-purpose PLD (GPLD). A configuration bit (Turbo) can be set by the MCU, and will

automatically place the ZPLDs into Standby Mode if no inputs are changing. The ZPLDs are

designed to consume minimum power using Zero-power CMOS technology that uses only

10 µA (typical) standby current. Unused product terms are automatically disabled, also

reducing power, regardless of the Turbo bit setting.

The main function of the DPLD is to perform address decoding for the internal I/O ports,

EPROM, and SRAM. The address decoding can be based on up to 24 bits of address

inputs, control signals (RD, WR, PSEN, etc.), and internal page logic. The DPLD supports

separate program and data spaces (for 8031 compatible MCUs).

The General-purpose PLD (GPLD) can be used to implement various logic functions

defined by the user, such as:

•

State machines

•

Loadable counters and shift registers

•

Inter-processor mailbox

•

External control logic (chip selects, output enables, etc.).

The GPLD has access to up to 59 inputs, 118 product terms, 24 macrocells, and 24 I/O

pins.

PSD4XX Family

1.0

Introduction

(cont.)

The PSD4XX has 40 I/O pins that are divided among 5 ports. Each I/O pin can be

individually configured to provide many functions, including the following:

•

MCU I/O

•

GPLD I/O

•

Latched address output (for MCUs with multiplexed data bus)

•

Data bus (for MCUs with non-multiplexed data bus).

The PSD4XX can easily interface with virtually any 8- or 16-bit microcontroller with a

multiplexed or non-multiplexed bus. All of the MCU control signals are connected to the

ZPLDs, enabling the user to generate signals for external devices.

The PSD4XX provides between 256 Kbits and 1 Mbit of EPROM that is divided in to four

equal-sized blocks. Each block can occupy a different address location, allowing for

versatile address mapping. The access time of the EPROM includes the address latching

and DPLD decoding.

The PSD4XX has an optional 16 Kbit SRAM that can be battery-backed by connecting a

battery to the Vstby pin. The battery will protect the contents of the SRAM in the event of a

power failure. Therefore, you can place data in the SRAM that you want to keep after the

power is switched off. Power switchover to the battery automatically occurs when V

drops

below V

stby

A four-bit Page Register enables easy access to the I/O section, EPROM, and SRAM for

microcontrollers with limited address space. The Page Register outputs are connected to

both ZPLDs and thus can also be used for external paging schemes.

The Power Management Unit (PMU) of the PSD4XX enables the user to control the

power consumption on selected functional blocks, based on system requirements.

For microcontrollers that do not generate a chip select input for the PSD, the Automatic

Power-Down (APD) unit of the PMU can be setup to enable the PSD to enter Power Down

Mode or Sleep Mode, based on the inactivity of ALE (or AS).

Implementing your design has never been easier than with PSDsoft—ST’s software

development suite. Using PSDsoft, you can do the following:

•

Configure your PSD4XX to work with virtually any microcontroller

•

Specify what you want implemented in the programmable logic using a design file

•

Simulate your design

•

Download your design to the part using a programmer.

2.0

Key Features

Single-chip programmable peripheral for microcontroller-based applications

256K to 1 Mbit of UV EPROM with the following features:

•

Configurable as 32, 64, or 128 K x 8; or as 16, 32, or 64 K x 16

•

Divided into four equally-sized mappable blocks for optimized address mapping

•

As fast as 70 ns access time, which includes address decoding

•

Built-in Zero-power technology

16 Kbit SRAM is configurable as 2K x 8 or 1K x 16. The access time can be as

quick as 70 ns, including address decoding. The contents of the SRAM can be

battery-backed by connecting a battery to the Vstby pin. The SRAM also has built-in

Zero-power technology.

40 I/O pins (divided into five 8-bit ports) that can be individually configured for:

•

Standard MCU I/O

•

PLD/macrocell I/O

•

Latched address output

•

High-order address inputs

•

Special function I/O

•

Open-drain output

福禄克的万用表怎么样，请用过的朋友评价下: 福禄克的万用表怎么样，有谁用过，经用吗，性价比如何，用过的朋友给点意见福禄克的万用表怎么样，请用过...; Lemontree 模拟电子

USB转串口问题: 各位高手请教下。。。我买了个DELL 1427 电脑他不带串口，我买了个USB转串口的设备，提...; sanoboy 嵌入式系统

做嵌入式系统移植和驱动的朋友，进来啦！: 说说你们最近关注的是啥？需要论坛提供什么样的帮助？对论坛的活动有...; soso 嵌入式系统

为什么我的MSP430G2，手一接近板子呼吸灯的闪动频率受到干扰: 今天第一次玩launchpad，下载了网友的呼吸灯程序。手不接近时灯快速闪动，手接近时才像呼吸灯。什...; wuyong0806 微控制器 MCU

初学单片机买哪种开发板实用些？过来人指导下: 本人大二刚接触单片机对单片机很感兴趣大致熟悉了keil 和proteus 我学的是51单片机...; xhs162861 嵌入式系统

QSpice-(6) 蒙特卡洛和高斯分布: QSpice-(6) 蒙特卡洛和高斯分布 Hello uu们，晚上好！什么是Monte Ca...; xutong 开关电源学习小组

特斯拉下调了广受欢迎的Powerwall 2家用太阳能电池的价格

　　特斯拉已经降低了其领先的家用太阳能电池系统——Powerwall 2的价格。特斯拉Powerwall 2目前的售价为1.17万美元。这一新的价格是在埃隆·马斯克(Elon Musk)领导的加州汽车和电池制造商之前的标价基础上降低了650美元。　　然而，对于那些生活在提供太阳能电池回扣的州的人来说，这一变化可能已经足够了。　　在那里，将为那些想要购买特斯拉Pow...[详细]
用51单片机控制LCD12864显示屏源程序

12864液晶在出厂时其对比度已经调好，所以用户在使用的时候第三管脚可不用接任何东西，本实验板上为了兼容多家12864液晶所以加了液晶对比度调节电位器，若用户使用我们配套的12864液晶可不用管它，液晶的第三管脚悬空就可以。有些液晶功耗比较大，用户在使用的时候可将液晶的第19、20引脚的背光不接，这样字体会很清楚。单片机源程序如下: /**********************BST-...[详细]
曲靖亿纬锂能23GWh圆柱磷酸铁锂储能动力电池项目正式启动

2月1日上午，曲靖亿纬锂能23GWh圆柱磷酸铁锂储能动力电池项目在曲靖经开区南海科技城正式启动。启动仪式上，项目承建商中建安装表示，曲靖亿纬锂能23GWh圆柱磷酸铁锂储能动力电池项目作为省市重点工程，工期紧、任务重，举办此次启动仪式有利于强化项目各参建单位的 ... ...[详细]
东南亚商机四起 Google：台厂莫错过

Google看好亚太地区网路产业爆发力，明日于新加坡举行大型媒体与客户造势活动，主题为「网路协助中小企业成就大事业」。Google台湾董事总经理简立峰表示，台湾企业应该跳脱过去大中华地区的思维，将商机扩展至东南亚，如联发科（2454）、宏碁（2353）、宏达电（2498）等国内知名品牌企业均具有绝佳机会。简立峰针对东南亚网路发展与台湾机会指出，东协6国（泰、越、菲、马、星、印尼）的电子...[详细]
西安紫光国芯推出多款具有自主知识产权车规级存储芯片

随着全球对可持续交通解决方案的需求不断增长，智能汽车和电动车作为未来出行的重要组成部分正蓬勃发展。然而，低功耗和高性能一直是智能车规芯片面临的重要挑战。西安紫光国芯，作为以科技创新为驱动的集成电路设计企业，多年来致力于半导体技术的创新和研发，推出了一系列具有自主知识产权的高可靠车规芯片产品，为智能出行领域提供高品质的解决方案。其中，作为业界首款具备On-Chip ECC功能的LPDD...[详细]
盗电行为不断虚拟货币“挖矿”行业亟待规范

　　　　利润低风险大盗电行为不断　　虚拟货币“挖矿”行业野蛮生长亟待规范　　来源：法制日报　　2017年比特币价值的暴涨引得无数人为之疯狂，“挖矿”俨然成为某些人密切关注的领域。电脑教程、手机软件、“矿机挖矿”……随着“挖矿”方式日益增多，一些问题也随之而来。　　今年9月，工业和信息化部网站第二季度网络安全威胁态势分析与工作综述指出，非法“挖矿”严重威胁互联网网络安...[详细]
TVS管保护器件免受高压瞬变损害

关于过电压抑制瞬变威胁—什么是瞬变？电压瞬变的定义是电能的短时激增，它们是先前存储的电能或者通过其他方式（比如大电感负载或雷电）引入的电能的突然释放的结果。在电气或电子电路中，这种能量可以通过控制开关动作，或通过随机诱导来从外源的电路中以一种可预测的方式得到释放。重复性瞬变常常归因于电动机、发电机或者反应性电路原件的切换。而另一方面，随机瞬变通常是由闪电和静电放电（ESD）引起...[详细]
海康机器人参评“维科杯·OFweek 2022中国机器人行业年度卓越技术创新企业奖”

维科杯·OFweek 2022中国机器人行业年度评选（简称OFweek Robot Awards 2022），是由中国高科技行业门户OFweek维科网及旗下权威的机器人专业媒体-OFweek维科网·机器人共同举办。该评选设立至今已有十余年，是中国机器人行业内的一大品牌盛会，亦是高科技行业具有专业性、影响力的评选之一。此次活动旨在为机器人行业的产品、技术和企业搭建...[详细]
面向血管介入手术的磁控导丝机器人系统设计

近日，中国科学院深圳先进技术研究院集成所仿生中心团队和深圳大学附属华南医院神经外科团队合作，在磁驱动连续体微型领域取得新进展。该团队提出了具有磁驱动主动转向和自主推进能力的磁性介入导丝机器人系统。通过该系统介入，医生能远程操控磁性导丝在复杂的血管分叉处快速选择正确路径并到达目标部位，有效减少医生的辐射暴露。该团队提出了磁性导丝的建模方法与轨迹规划方法，为磁性导丝的自动控制奠定了基础。 ...[详细]
LF Edge基金会成立

2019年1月24日，Linux基金会在旧金山宣布成立针对边缘计算的LF Edge基金会。新的LF Edge基金会旨在为边缘计算的各种应用类型制定统一的软件堆栈、术语定义及开发框架，并促进边缘计算领域在底层形成架构上的统一，从而推动整个行业的快速发展。　　LF Edge基金会目前包含五个初始项目：　　Akraino Edge Stack：创建一个开源软件栈，提供针对边缘计算系统和应...[详细]
传蔚来今晚将登陆纽交所，市值约为64亿美元

据知情人士透漏，中国电动汽车创业公司—— 蔚来汽车有限公司周二以每股6.25美元的价格进行招股，公司今晚将登陆纽交所。这一股票价格定价属于公司目标价格区间6.25-8.25美元的底部。以发行1.6亿份ADS计算，加上最多能超额配售2400万股，蔚来此次融资的最高额为11.5亿美元。而此前预估融资最高金额为15.18亿美元。按此价格计算，蔚来市值为64亿美元。 8月14日，蔚...[详细]
中国企业工业4.0路径：12家上市公司围猎全攻略

近期有报道称，中国版工业4.0规划——《中国制造业发展纲要(2015~2025)》初稿已完成，重点实施领域为新一代信息技术产业、生物医药与生物制造产业、高端装备制造产业、新能源产业，该规划或将于今年上半年出台。 “工业4.0”战略的核心就是通过CPS网络实现人、设备与产品的实时连通、相互识别和有效交流。从而构建一个高度灵活的个性化和数字化的智能制造模式。我们从德国的工业4.0概念得到的启示...[详细]
明星吸毒屡禁不止水下缉毒机器人终结“监狱风云”

　　最近一段时间，明星吸毒事件层出不从，近来大陆包含李代沫、张耀扬、张元、宁财神、张默(张国立之子)、何盛东、高虎等艺人吸毒被抓，柯震东这是继高虎之后，在北京被抓的第8位娱乐圈明星，从导演、编剧到演员、歌手，网友戏称将上演“监狱风云”。之所以吸毒屡禁不止，与演艺圈的特殊性有关系，同时毒品在运输过程中较为隐蔽，监管难，也是打击毒品犯罪的一大障碍。　　如何打击吸毒，贩毒，运毒呢？最近，来自美国麻省...[详细]
三星和谷歌未来谁更牛？

科技公司们一直试图改变世界、改变你我的生活形态。在上世纪90年代，微软试图通过Windows和PC走进更多领域，比如客厅、掌上电脑、手机等，但它失败了。而现在，似乎只有三个巨头还有机会，它们是苹果、谷歌和三星。苹果永远只做符合苹果风格的事情，比如确保产品的品味和价格都在一定高度上、系统层面的封闭排他性发展、小心谨慎地进入其他领域。三星和谷歌则越来越像，都在提供一种开放的平台，吸引其他合作...[详细]
芯片王者之战：座舱王者高通，再战智驾王者英伟达

今年以来，高通越发重视汽车业务。紧跟PC和手机芯片，高通汽车芯片也换上自研CPU。 10月23日，高通公司在发布新款旗舰手机SoC骁龙8至尊版之后，专门抽出一天的时间，用于发布骁龙座舱至尊版平台和Snapdragon Ride至尊版平台，这两大平台分别面向智能座舱和智能驾驶。根据高通技术公司汽车、行业解决方案和云事业群总经理Nakul Duggal介绍，两者都将于2025年出样片。 ...[详细]