PT8A261/262
PIR Sensor Light Switch Controller
Features
•
General Description
The PT8A261 and PT8A262 are low power mixed signal
CMOS LSI designed for the automatic lamp control using
PIR sensor as motion detector.
•
•
•
•
•
•
•
•
•
•
•
•
•
2-stage operational amplifier as filter
Built-in noise rejection circuit
On-chip regulator
Override function
Synchronous with AC 220V/50Hz and 110V/60Hz
Pulse output (PT8A261) for TRIAC drive or
level output (PT8A262) for relay drive
CDS to enable/disable output
Adjustable output on time duration
ON/AUTO/OFF selectable by MODE pin
Auto-reset if the ZC signal disappears over 3
seconds
40 seconds warm-up
Quick check mode for initial installation
Operating voltage: 5V
Stand-by current: 80µA
With on chip noise filter and voltage regulator, the IC
provides stable operations throughout temperature
range. CDS input to disable day time operation is
desired.
Applications
• Energy saving auto-switch in Garden, kitchen,
bathroom, corridor, storage or yard
• Auto light in meeting room
Ordering Information
Pa r t N umbe r
PT8A261PE/PT8A262PE
PT8A261WE/PT8A262WE
PT8A261DE / PT8A262DE
Pa ck a ge
Lead free 16 - Pin PDIP
Lead free and Green
16 - Pin SO IC
Die Form
Block Diagram
OP2O
OP2N
OP2P
_
+
Comparator
Note:
Adding X suffix=Tape/Reel
latch circuit
Mode and CDS
control circuit
MODE
CDS
OP1O
OP1P
OP1N
V
EE
OSCD
+
_
Voltage
divider
Control
circuit
Regulator
Output circuit
RELAY
(for 262 only)
TRIAC
(for 261 only)
delay
oscillator
System
oscillator
Delay
circuit
Counter
circuit
Zero cross
debounce
RST
OSCS
ZC
12-07-0007
1
PT0075-5
07/06/2012
PT8A261/262
PIR Sensor Light Switch Controller
Pad Location
Pad Location of PT8A261DE
1470um
Die No.
CDS
ZC
OSCS
OSCD
TRIAC
MODE
V
CC
OP2O
V
CC
NC
OP2N
OP2P
V
EE
RST
OPIP OPIN OPIO
1710um
GND
Pad Coordinate
Pad Name
X Coordinate
Y Coordinate
65.4
-101.6
399.4
232.4
689.2
-687.2
-435.6
-687.2
-687.2
Pad Name
NC
V
EE
RST
OP1P
OP1N
OP1O
OP2P
OP2N
OP2O
X Coordinate
570
-570
303.9
-44.8
-211.8
-570
-570
-570
-570
Y Coordinate
-268.6
232.4
-687.2
689.2
689.2
-435.6
-268.6
-101.6
65.4
GND
570
TRIAC
570
OSCD
570
OSCS
570
ZC
-378.8
CDS
-30.1
MODE
570
V
CC
-197.1
V
CC
136.9
Note: Substrate is connected to GND
12-07-0007
2
PT0075-5
07/06/2012
PT8A261/262
PIR Sensor Light Switch Controller
Pad Location of PT8A262DE
1470um
Die No.
CDS
ZC
OSCS
OSCD
RELAY
MODE
V
CC
OP2O
V
CC
NC
OP2N
OP2P
V
EE
RST
OPIP OPIN OPIO
1710um
GND
Pad Coordinate
Pad Name
X Coordinate
Y Coordinate
65.4
-101.6
399.4
232.4
689.2
-687.2
-435.6
-687.2
-687.2
Pad Name
NC
V
EE
RST
OP1P
OP1N
OP1O
OP2P
OP2N
OP2O
X Coordinate
570
-570
303.9
-44.8
-211.8
-570
-570
-570
-570
Y Coordinate
-268.6
232.4
-687.2
689.2
689.2
-435.6
-268.6
-101.6
65.4
GND
570
RELAY
570
OSCD
570
OSCS
570
ZC
-378.8
CDS
-30.1
MODE
570
V
CC
-197.1
V
CC
136.9
Note: Substrate is connected to GND
12-07-0007
3
PT0075-5
07/06/2012
PT8A261/262
PIR Sensor Light Switch Controller
Pin Assignment
Figure 2
PT8A261P/PT8A261W
GND
TRIAC
OSCD
OSCS
ZC
CDS
MODE
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OP2O
OP2N
OP2P
OP1O
OP1N
OP1P
RST
V
EE
PT8A262P/PT8A262W
GND
RELAY
OSCD
OSCS
ZC
CDS
MODE
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OP2O
OP2N
OP2P
OP1O
OP1N
OP1P
RST
V
EE
Top view
Top view
Pin Description
Table 1
P in /Pa d
Na me
261
1
262
1
2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GND
RELAY
TRIAC
OSCD
OSCS
ZC
CDS
MODE
V
CC
V
EE
RST
OP1P
OP1N
OP1O
OP2P
OP2N
OP2O
Ground Ground
O
O
I/O
I/O
I
I
I
Power
O
I
I
I
O
I
I
O
RELAY drive output through an external NPN transistor, active high
TRIAC drive two-pulse output, active negative pulse.
Output timing oscillator I/O, connected to an external RC to adjust output duration.
System oscillator I/O, connected to an external RC to set the system frequency. The system
frequency = 16kHz for normal application.
Schmitt input for AC zero crossing detection.
Connected to a CDS voltage divider for daytime/night auto-detection. Low input to this pin
can disable PIR input. CDS is a schmitt trigger input with 5-second input debounce time.
Mode select, connecting to V
CC
- output always on, connection GND - output always off,
open - auto detection
Power supply
Internal voltage regulator output, 3.6V with respect to ground. Connected to the drain of
PIR sensor
Chip reset input, active low, kept floating or connected an RC network
Non-inverted input of first operational amplifier, connected directly to source of PIR sensor
Inverted input of first operational amplifier
Output of first operational amplifier
Non-inverted input of second operational amplifier.
Inverted input of second operational amplifier
Output of second operational amplifier
Typ e
Descr ip t ion
12-07-0007
4
PT0075-5
07/06/2012
PT8A261/262
PIR Sensor Light Switch Controller
Functional Descriptions
The PT8A261 and PT8A262 are CMOS LSI chips designed for
automatic PIR lamp control. They can operate in 2-wire con-
figuration for triac applications or in 3-wire configuration for
relay applications.
The device consists of operational amplifiers, a comparator,
timer, a zero crossing detector, control circuit, a voltage regu-
lator, a system oscillator, and an output timing oscillator.
The PIR sensor detects infrared power variations caused by
motion of a human body and transfer to a voltage variation. If
the PIR output voltage variation conforms to criteria, the lamp
is turned on for an adjustable duration. The PT8A261 (or 262)
offers three operating modes (ON, AUTO, OFF) which can be
set through a MODE pin. When the device is working in AUTO
mode, the user can override the mode to switch it to TEST
mode or manual ON mode, or return to the AUTO mode by
switching power switch.
Figure 3. System Oscillator
OSCS and OSCD Pins
OSCS is a system oscillator I/O pin connected to an external
RC to generate system frequency of 16kHz.
OSCD is an output timing oscillator I/O pin. It’s connected to
an external RC to obtain the desired turn-on duration by se-
lecting various values of RC or using a variable resistor.F
OSCD
is the frequency of OSCD pin, output timing can be caculated
as the formula: T
D
= 21504/F
OSCD
CDS Input Circuit
CDS is a CMOS schmitt trigger input pin. It is used to distin-
guish between day time and night time. When the input volt-
age of CDS is high the PIR input is enabled, when CDS low the
PIR input disabled. The input disable-to-enable debounce
time is 5 seconds. Connect this pin to V
CC
when not using it.
The CDS input is ignored when the TRIAC or RELAY output
is active.
Figure 4. Output Timing Oscillator
T
D
= 21504/F
OSCD
R
S
560K
OSCS PT8A261/
262
200P
R
D
OSCD
PT8A261/
262
C
S
C
D
Figure 5. CDS Input Circuit
Table 2. CDS Pin Function
C DS
St a t u s
Day Time
Night
PIR
Disabled
Enabled
V
CC
Rp
Schmitt
Driver
CDS
Control
CDS Circuit
PT8A261/262
L OW
HI GH
CDS
Figure 6. CDS Enable Debounce
CDS
< 5s
> 5s
PIREnable
Disable
Enable
12-07-0007
5
PT0075-5
07/06/2012
FPGA/CPLD
