Data Sheet
PT8A263 PIR Alarm Controller
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Features
•
•
General Description
PT8A263 is a fully integrated mixed-signal CMOS
LSI chip designed for the low cost applications of
PIR (passive Infrared) alarm control system. The
analog front-end is based on PTI’s proven PIR
controller IC (PT8A261). The multipurpose alarm IC
can be widely used in a variety of applications ranging
from household security, portable alarm to toys.
PT8A263 is also equipped with op-amps for filtering,
a comparator, timer, low battery detector, control
circuit, voltage regulator and oscillator.
Low standby current
2 stage op-amp for filtering
• On-chip oscillator
• On-chip voltage regulator
• 4 different operation modes selected by SEL1 &
SEL2
• Low battery detector
• Built-in noise rejection circuit
• LED output indicating warm-up period, low battery
and PIR trigger signal
• 2 outputs to drive external devices such as speech
ICs, high pitch piezo buzzer or door bell ICs
Applications
• Low cost security system sensor components
Ordering Information
Part Number
PT8A263P
PT8A263W
PT8A263DE
Package
16 - Pin PDIP
16 - Pin SOP
Die Form
• Motion sensor to drive low cost speech chip for
alarm alert
• Motion detect alarm with high pitch buzzer alert
• Door chime applications with external door bell
ICs
Block Diagram
OP2O
OP2N
OP2P
_
Comparator
+
Voltage
divider
+
_
Regulator
Noise
rejection
circuit
OUT1
Control circuit
OUT2
LED
V
EE
Low Battery
Detector
OSC
System
oscillator
GND
V
CC
RST
OP1O
OP1P
OP1N
Mode
control
circuit
SEL1
SEL2
PT0084(03/03)
1
Ver:4
Data Sheet
PT8A263 PIR Alarm Controller
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Pad Location
1470um
Die No.
SEL1 OUT2 OUT1
OSC
LED
SEL2
V
CC
OP2O
V
CC
NC
OP2N
OP2P
VEE
RST
OPIP OPIN OPIO
1710um
GND
Pad Coordinate
Pad Name
X Coordinate
Y Coordinate
65.4
-101.6
399.4
232.4
689.2
-687.2
-435.6
-687.2
-687.2
Pad Name
NC
V
EE
RST
OP1P
OP1N
OP1O
OP2P
OP2N
OP2O
X Coordinate
570
-570
303.9
-44.8
-211.8
-570
-570
-570
-570
Y Coordinate
-268.6
232.4
-687.2
689.2
689.2
-435.6
-268.6
-101.6
65.4
GND
570
LED
570
OSC
570
OUT1
570
OUT2
-378.8
SEL1
-30.1
SEL2
570
V
CC
-197.1
V
CC
136.9
Note: Substrate is connected to GND
PT0084(03/03)
2
Ver:4
Data Sheet
PT8A263 PIR Alarm Controller
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Pin Assignment
Figure 2
PT8A263
GND
LED
OSC
OUT1
OUT2
SEL1
SEL2
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OP2O
OP2N
OP2P
OP1O
OP1N
OP1P
RST
V
EE
Top view
Pin Description
Table 1
Pin
1
2
3
4, 5
6, 7
8
9
10
11
12
13
14
15
16
Name
GND
LED
OSC
OUT1, OUT2
SEL1, SEL2
V
CC
V
EE
RST
OP1P
OP1N
OP1O
OP2P
OP2N
OP2O
Type
Ground
Ground
O
I
O
I
Power
O
I
I
I
O
I
I
O
LED output:
indicates PIR trigger signal. It is an active high signal with 125Hz pulse in
normal mode.
Input of oscillator:
external resistor or capacitor changeable, resistor pull up, capacitor pull
down, 16kHz for normal application
Outputs to drive external devices
Operating mode selection
Power supply
Internal voltage regulator output:
3.6V with respect to ground. Connected to the drain of
PIR sensor
Chip reset input:
active low,
kept floating or connected an RC network
Non-inverted input of first operational amplifier:
connected directly to source of PIR
sensor
Inverted input of first operational amplifier
Output of first operational amplifier
Non-inverted input of second operational amplifier,
1.8V internally, 2.2uF capacitor pull
down.
Inverted input of second operational amplifier
Output of second operational amplifier
Description
PT0084(03/03)
3
Ver:4
Data Sheet
PT8A263 PIR Alarm Controller
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Functional Description
The PIR sensor detects infrared power variations induced by
the motion of a human body and converts it to voltage varia-
tions. This input voltage is fed into PT8A263 for signal pro-
cessing. Bandpass filtering is first accomplished by a 2-stage
op-amp, followed by the peak and valley voltages compari-
sons. If the input signal is larger than the specified peak volt-
age or smaller than the specified valley voltage for a certain
period of time, this PIR trigger signal will be produced to the
internal noise rejection circuit in which a valid trigger is quali-
fied based on some criteria. The output signals will then be
generated to drive external devices according to different mode
of operations.
V
EE
V
EE
supplies power to the analog front-end circuit with a stabi-
lized voltage that is 3.6V with respect to GND normally.
OSC
OSC is an I/O pin of internal oscillator. System frequency of
16KHz can be generated when connected to an external RC.
Low Battery Detection
Internal low Battery Detector indicates voltage value of V
CC
less than a contain value which is about 3.8V. A Low Battery
alarm indication can be given at LED pin when the division
voltage is less than V
EE
/2. At the same time the system will be
halt. Most of the internal circuits are hung up except oscillator
and LED indication circuit.
RST
RST is used to reset the chip. It is internal pull-high and active
low. The use of CRST can extend the power-on initial time. If
the RST pin is an open circuit (without CRST), the initial time
is the default (40 seconds).
Power On Initial
The PIR signal amplifier requires a warm up period after power-
on. The input should be disabled during this period.
Operational Mode
The operation modes of PT8A263 is shown in the following
table.
Mode of Operation/2
SEL1
1
SEL2
1
Functions
Normal Alarm:
OUT1 = low (active) for 5 seconds after the first trigger. OUT2 goes low for 5 seconds
after the 2nd trigger. LED does not latch trigger status. OUT2 (low active) will not trigger if there is no
PIR signal 12 seconds after the first trigger.
Normal Alarm with Delay:
OUT1 goes low after first triggered, if the second trigger signal comes after
15 seconds, OUT2 keep high, if the second trigger signal comes after 12 seconds but less than 15 seconds,
OUT2 will goes low for 5 seconds. LED is latched on until power down or reset the chip.
Siren Alarm:
Complimentary drive high pitch piezo buzzer. Center frequency = 1kHz (options for
500Hz and 2kHz).
2 stages of alarm: First trigger: Output is 1/4 sec on, 4 sec off. If no 2nd trigger within 12 sec, all
outputs are reset, no sound. 2nd trigger: Output is 1/4 sec on, 2 sec off for 30 sec. After 30 sec, output =
1 sec on, 1/2 sec off, continue for 5 minutes. After that, the chip enters stop mode. LED is latched on
after 2nd trigger, until power down or chip reset.
Door Chime mode:
Once trigger occurs, OUT1 is active (high) for 1 sec, OUT2 is active (high) for
another 1 sec after OUT1 is asserted. LED has no latch function.
0
1
1
0
0
0
PT0084(03/03)
4
Ver:4
Data Sheet
PT8A263 PIR Alarm Controller
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Timing Diagram
PIR Signal Trigger and Output Signals for Door Chime Mode
RST
TRI_EN
40s warm-up
time
Comparator
input
<32ms
>32ms
<2s
>160ms
>288ms
Comparator
output
(1)
Valid trigger
(2)
(3)
SEL2,SEL1
00
00 = Door Chime mode
00
00
OUT1
1s
OUT2
1s
1s
LED
125Hz pulse
Notes:
The PIR trigger signal is qualified to be a valid PIR trigger signal if it conforms to one of the following criteria :
1. More then 3 triggers (each > 32ms) detected within 2s,
2. Two triggers detected within 2s (1 trigger > 160ms and another > 32ms),
3. One trigger (> 288ms) detected.
Output Signals for Normal Alarm Mode
RST
40s warm-up time
trig_en_b
>12s
>5s&<12s
Valid trigger
SEL2,SEL1
11
11
11
11 = Normal Alarm mode
5s
OUT1
5s
5s
OUT2
LED
125Hz pulse
PT0084(03/03)
5
Ver:4
