PWR-82330
SMART POWER 3-PHASE MOTOR DRIVE
DESCRIPTION
The PWR-82330 is a smart Power 3-
phase Motor Drive Hybrid. The PWR-
82330 uses a MOSFET output stage
with a 100 Vdc rating, and can deliver
5 A continuous, 10 A peak current to
the load.
This new Smart Power Motor Drive has
CMOS Schmitt trigger inputs for high
noise immunity. High and low-side
input logic signals are XOR’d in each
phase to prevent simultaneous turn on
of in-line transistors, thus eliminating a
shoot through condition.
The internal logic controls the high and
low-side gate drivers for each phase
and can operate from +5 to +15 V logic
levels. The internal charge pump cir-
cuitry provides the required voltage to
high-side gate drives. This provides
constant output performance for
switching frequencies from dc to 50
kHz.
APPLICATIONS
Packaged in a small case, these
hybrids are an excellent choice for high
performance, high-reliability motor dri-
ves for Military and Aerospace servo-
amps and speed controls.
Among the many applications are
robotics; electro-mechanical valve
assemblies; actuator systems; antenna
and radar positioning; fan and blower
motors for environmental conditioning;
position control of mini-subs, drones,
and RPV’s; and compressor motors for
cryogenic coolers.
The PWR-82330 hybrid is ideal for
harsh military environments where
shock, vibration, and temperature
extremes are evident, such as missile
applications including fin actuators and
I.R. seeker head movement. The PWR-
82330 operates over the -55°C to
+125°C temperature range and is avail-
able with military processing.
FEATURES
•
Small size (2.6" x 1.4" x 0.25")
•
100 Vdc Rating
•
5 A Continuous, 10 A peak
Capability
•
High-Efficiency MOSFET Drive
Stage
•
Direct Drive from Commutation
Logic
•
Six Step Trapezoidal or
Sinusoidal Drive
•
Four Quadrant Operation
•
Military Processing Available
+CAP
48
50
4
GND
-CAP
V+
CHARGE PUMP
V
CC A
V
O A
DRIVE
A
V
SS A
46
5,18,19
6
8
10
V
LPI
V
UA
V
LA
43,44,45
40,41,42
39
14
16
V
UB
V
LB
DIGITAL
CONTROL
AND
PROTECTION
CIRCUITRY
V
CC B
V
O B
36,37,38
DRIVE
B
V
SS B
33,34,35
32
21
23
V
UC
V
LC
V
CC C
V
O C
DRIVE
C
29,30,31
12
V
Sd
V
SS C
26,27,28
FIGURE 1. PWR-82330 BLOCK DIAGRAM
©
1992, 1999 Data Device Corporation
TABLE 1. PWR-82330 ABSOLUTE MAXIMUM RATINGS
(Tc = +25°C Unless Otherwise Specified)
PARAMETER
SUPPLY VOLTAGE
INPUT VOLTAGE
LOGIC POWER-IN VOLTAGE
INPUT LOGIC VOLTAGE
OUTPUT CURRENT
CONTINUOUS
PEAK
OPERATING FREQUENCY
CASE OPERATING TEMPERATURE
CASE STORAGE TEMPERATURE RANGE
SYMBOL
V
CC
V+
V
LPI
V
U
, V
L
, VSd
VALUE
100
18
18
V
LPI
+ 0.5
UNITS
V
V
V
V
l
O
I
P
f
O
T
C
T
CS
5
10
50
-55 to +125
-55 to +150
A
A
kHz
°C
°C
PARAMETER
OUTPUT
Output Current Continuous
Supply Voltage
Output On-Resistance (each FET)
Instant Forward Voltage (intrinsic diode)
Reverse Recovery Time (intrinsic diode)
Reverse Leakage Current
INPUT POWER
Input Voltage (TC=-55°C to +125°C)
Logic Power-in Voltage
V+ Current
Logic Power Input Current
INPUT SIGNALS (See Figure 3)
Positive Trigger Threshold Voltage
Negative Trigger Threshold Voltage
Hysteresis Voltage
Positive Trigger Threshold Voltage
Negative Trigger Threshold Voltage
Hysteresis Voltage
SWITCHING CHARACTERISTICS
( see FIGURE 2)
Upper Drive:
Turn-on Propagation Delay
Turn-off Propagation Delay
Shut-down Propagation Delay (see FIGURE 5)
Turn-on Rise Time
Turn-off Fall Time
Lower Drive:
Turn-on Propagation Delay
Turn-off Propagation Delay
Shut-down Propagation Delay (see FIGURE 5)
Turn-on Rise Time
Turn-off Fall Time
SWITCHING CHARACTERISTICS
( see FIGURE 2)
Upper Drive:
Turn-on Propagation Delay
Turn-off Propagation Delay
Shut-down Propagation Delay (see FIGURE 5)
Turn-on Rise Time
Turn-off Fall Time
TABLE 2. PWR-82330 SPECIFICATIONS
(TC=+25°C Unless Otherwise Specified)
SYMBOL
TEST CONDITIONS
I
O
V
CC
R
ON
V
F
t
rr
I
r
V+
V
LPI
I+
I
LPI
V
P
V
N
V
H
V
P
V
N
V
H
MIN
TYP
MAX
5
100
0.13
1.25
500
250
18
18
150
5
12.9
UNIT
A
V
Ω
V
nsec
μA
V
V
mA
mA
V
V
V
V
V
V
see note 1
Ip=5A (see note 2)
Ip=5A (see note 2)
Id=1A, did/dt=160A/μs
see note 3
12
5
V+ = 15V
V
LPI
= 15 V
Pin Connections
V
LPI
= 15 V
V
LPI
= 15 V
V
LPI
= 15 V
V
LPI
= 5 V
V
LPI
= 5 V
V
LPI
= 5 V
Test 1 Conditions
V
LPI
= 15 V
V+ = 15 V
V
CC
= +28 V
I
p
= 10 A
28
160
15
2.1
1.6
0.9
0.3
10.8
4.3
3.6
td(on)
td(off)
tsd
tr
tf
825
1100
1000
125
200
nsec
nsec
nsec
nsec
nsec
td(on)
td(off)
tsd
tr
tf
Test 2 Conditions
V
LPI
= 5 V
V+ = 15 V
V
CC
= +28 V
I
p
= 10 A
825
1100
1000
200
200
nsec
nsec
nsec
nsec
nsec
td(on)
td(off)
tsd
tr
tf
1150
1400
1050
125
225
nsec
nsec
nsec
nsec
nsec
2
TABLE 2. PWR-82330 SPECIFICATIONS (continued)
(TC= +25°C Unless Otherwise Specified)
PARAMETER
SWITCHING CHARACTERISTICS (continued)
Lower Drive:
Turn-on Propagation Delay
Turn-off Propagation Delay
Shut-down Propagation Delay (see FIGURE 5.)
Turn-on Rise Time
Turn-off Fall Time
DEAD TIME
MINIMUM PULSE WIDTH
THERMAL
Maximum thermal Resistance
Junction Temperature Range
Case Operating Temperature
Case Storage Temperature
WEIGHT
NOTES:
1. For Hi-Rel applications, derating per MIL-S-19500 should be observed. (Derate V
CC
by 70%.)
2. Pulse Width
≤
300
μs,
duty cycle
≤
2%
3. V
CC
= 70 V, V
U
, V
L
, = logic ‘0’
SYMBOL
TEST CONDITIONS
Test 2 Conditions
V
LPI
= 5 V
V+ = 15 V
V
CC
= +28 V
I
p
= 10 A
MIN
TYP
MAX
UNITS
td(on)
td(off)
tsd
tr
tf
tdt
tpw
θjc
Tj
T
CO
T
CS
1150
1400
1050
125
225
400
150
7.5
150
125
150
1.37
(39)
nsec
nsec
nsec
nsec
nsec
nsec
nsec
°C/W
°C
°C
°C
0z
(g)
each transistor
-55
-55
-55
INTRODUCTION
The 3-phase PWR-82330 is a 5 A motor drive hybrid which incor-
porates a 100 Vdc MOSFET output stage for high-speed and high-
efficiency operation. This motor drive is ideal for use in high-perfor-
mance motion control systems, servo amplifiers, and motor speed
control designs. Furthermore, Multi-axis systems requiring multiple
drive stages can benefit from the small size of this power drive.
The PWR-82330 can be driven directly from commutation logic,
DSP, or a custom ASIC that supplies digital signals to control the
upper and lower transistors of each phase. This highly integrat-
ed drive stage has schmitt trigger digital inputs that control the
high and low side of each phase. Digital protection of each
phase eliminates an in-line firing condition, by preventing simul-
taneous turn-on of both the upper and lower transistors. The
logic controls the high and low-side gate drivers. Operation from
5 to 15 V logic levels can be programmed by applying the appro-
priate voltage to pin 6 (V
LPI
). The PWR-82330 has a ground ref-
erenced low-side gate drive. An internal charge pump circuit
supplies the required drive voltage to each of the three high-side
transistors. This provides a continuous high-side gate drive even
during a motor stall. The high and low-side gate drivers control
the N-channel MOSFET output stage. The MOSFETs used in
the PWR-82330 allow output switching up to 50 kHz. The PWR-
82330 does not have an internal short-circuit or overcurrent pro-
tection, which if required, must be added externally to the hybrid.
DIGITALLY CONTROLLED INPUTS
The PWR-82330 uses the Schmitt triggered digital inputs (with
hysteresis) to ensure high noise immunity. The trigger switches
at different points for positive and negative going signals.
Hysteresis voltage (V
H
) is the difference between the positive
going voltage (V
P
) and the negative going voltage (V
N
) (see FIG-
URE 3). The digital inputs have programmable logic levels, which
allows the hybrid to be used with different types of commutation
logic with an input voltage range of 5-15 V, such as TTL or CMOS
logic. Pin 6 is the logic power input (V
LPI
) for the digital circuitry
inside the hybrid.
A 0.01 µF, 50 V ceramic capacitor must be
placed between this pin (6) and GND as close to the hybrid
as possible.
When using 15 V control circuitry, an external +15
Vdc power supply must be connected between pin 6 of the
hybrid, and GND. The commutation / control circuitry can be as
simple as discrete logic with PWM, or as sophisticated as a
microprocessor or custom ASIC, depending on the system
requirements. FIGURE 4 illustrates a typical interface of the
PWR-82330 with a motor and commutation logic in a Servo-Amp
System. (Refer to AN/H-3 application note for more details.)
INPUTS:
50%
t
r
OUTPUTS:
t
f
90%
50%
10%
t
d
(ON)
t
d
(OFF)
(REFERENCE TABLE 2. ALSO)
FIGURE 2. INPUT/OUTPUT TIMING RELATIONSHIPS
3
SHUT-DOWN INPUT (VSd)
Pin 12 (Vsd) provides a digital shut-down input, which allows the
user to completely turn-off both the upper and lower-output tran-
sistors in all 3 phases. Application of a logic ‘1’ to the VSd input
will latch the Digital Control / Protection circuitry thereby turning
off all output transistors. The Digital Control/Protection circuitry
remains latched in the off state and will not respond to signals on
the V
L
or V
U
inputs while the VSd has a logic ‘1’ applied. When
the user or the sense circuitry (as in FIGURE 6) returns the VSd
input to a logic ‘0’, and then the user sets the V
L
and V
U
inputs
to a logic ‘0’ the output of the Digital Control / Protection circuit-
ry will clear the internal latch. When the next rising edge (see
FIGURE 5) occurs on the V
L
or V
U
digital inputs, the outputs
transistors will respond to the corresponding digital input. This
feature can be used with external current limit or temperature
sense circuitry to disable the drive if a fault condition occurs (see
FIGURE 6).
INTERNAL PROTECTION CIRCUITRY
The hybrid contains digital protection circuitry, which prevents in-
line transistors from conducting simultaneously. This, in effect,
would short circuit the power supply and would damage the out-
put stage of the hybrid. The circuitry allows only proper input sig-
nal patterns to cause output conduction. TABLE 3 lists the input/
output timing relationships. If an improper input requested that
the upper and lower transistors of the same phase conduct
together, the output would be a high impedance until removal of
the illegal code from the input of the PWR-82330.
A dead time
of 400 nsec minimum should still be maintained between
1
2
V
v
V
H
V
O
N
v
p
FIGURE 3. HYSTERESIS DEFINITION AND CHARACTERISTICS
+15V
+
+CAP
-CAP
V+
GND
V
LPI
V
UA
V
LA
+28V
CHARGE PUMP
V
CC A
V
O A
DRIVE
A
V
SS A
V
CC B
POSITION
COMMAND
HALL
EFFECT
DEVICES
TANT +
MOTOR
POSITION
LOOP
AND
COMMUTATION
LOGIC
V
UB
V
LB
DIGITAL
CONTROL
AND
PROTECTION
CIRCUITRY
V
O B
DRIVE
B
V
SS B
V
CC C
VUC
V
LC
DRIVE
C
V
O C
V
Sd
PWR-82330
V
SS C
FIGURE 4. TYPICAL INTERFACE WITH A MOTOR AND COMMUTATION LOGIC
4
TABLE 3. INPUT/OUTPUT TRUTH TABLE
INPUTS
OUTPUTS
UPPERS
LOWERS
CONTROL
VUA VUB VUC VLA VLB VLC
VSd
VOA VOB VOC
1
0
0
0
1
0
0
H
L
Z
1
0
0
0
0
1
0
H
Z
L
0
1
0
0
0
1
0
Z
H
L
0
1
0
1
0
0
0
L
H
Z
0
0
1
1
0
0
0
L
Z
H
0
0
1
0
1
0
0
Z
L
H
0
0
1
1
1
0
0
L
L
H
0
1
0
1
0
1
0
L
H
L
0
1
1
1
0
0
0
L
H
H
1
0
0
0
1
1
0
H
L
L
1
0
1
0
1
0
0
H
L
H
1
1
0
0
0
1
0
H
H
L
0
0
0
0
0
0
0
Z
Z
Z
0
0
0
1
1
1
0
L
L
L
1
1
1
0
0
0
0
H
H
H
X
X
X
X
X
X
1
Z
Z
Z
H = High Level, L= Low Level, X=Irrelevant, Z= High Impedance (OFF)
PWR-82330 POWER DISSIPATION (SEE FIGURE 7)
There are three major contributors to power dissipation in the
motor driver: conduction losses, switching losses, and intrinsic
diode losses.
V
CC
= +28 V (Bus Voltage)
Io
A
= 3 A, I
OB
= 7 A (see FIGURE 7)
ton = 20 µs, T = 40 µs (period) (see FIGURE 7)
Ron = 0.13
Ω
(on-resistance, see TABLE 2, Io = 5 A, Tc=+25°C)
ts1 = 325 ns, ts2 = 325 ns (see FIGURE 7)
fo = 25 kHz (switching frequency)
V
F
is an intrinsic diode forward voltage, TABLE 2, Io = 5 A
1. Conduction Losses (PC)
Pc = ( Imotor rms)2 x Ron
the signals at the V
U
and V
L
pins;
this ensures the complete
turn-off of any transistor before turning on its associated in-line
transistor.
I motor rms
=
I
OB
- I
OB
(I
OB
- I
OA
) +
2
(I
OB
- I
OA
)
3
2
ton
T
CHARGE PUMP
The PWR-82330 has an internal charge pump circuit to generate
the drive voltage for the high side N-channel MOSFETs. The
charge pump uses an oscillator to charge an external charge pump
capacitor, Cc, from the Vcc supply. This oscillator will pump the
voltage at pin 48 (+cap) of the hybrid higher than Vcc. The hybrid
high side drivers use this voltage to ensure the proper gate drive.
An external 1 µF, 20% capacitor (Cc) is required between pins 48
and 50. If a polarized capacitor is used, the positive terminal
must be connected to pin 48. The voltage rating of Cc must be
2x the maximum value of V
CC
.
1
V
UA
V
UB
V
UC
V
LA
V
LB
V
LC
V
Sd
V
OA
2
3
4
5
6
7
8
9
10
11
12
13
I motor rms
=
7A - 7A (7A - 3A) +
2
(7A - 3A)
3
2
20us
40us
Pc = (3.63 A)2 x (0.13 W)
Pc = 1.71 Watts
2. Switching Losses (Ps)
Ps = [ Vcc ( I
OA
(ts1) + I
OB
(ts2) ) fo] / 2
Ps = [ 28 V ( 3 A (325 ns) + 7 A (325 ns) ) 25 kHz] / 2
Ps = 1.14 Watts
14
15
16
17
18
19
1
0
1
0
1
0
1
0
1
0
1
0
1
0
H
Z
L
H
Z
L
H
Z
L
V
Sd
1
0
H
V
OA
Z
L
t
Sd
V
OB
V
OC
FIGURE 5. SHUT-DOWN (VSd) TIMING RELATIONSHIPS
5
嵌入式系统
