Da ta Sh ee t, D S 2, D ec em be r 20 01
A B M P r e mi um
A T M B uf f e r M a na ge r
P XF 4 33 6 V e r s i on 1 . 1
W ir ed
Co m mu n ic a ti o n s
N e v e r
s t o p
t h i n k i n g .
Edition 2001-12-17
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
©
Infineon Technologies AG 2001.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address
list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Da ta Sh ee t, D S 2, D ec em be r 20 01
A B M P r e mi um
A T M B uf f e r M a na ge r
P XF 4 33 6 V e r s i on 1 . 1
W ir ed
Co m mu n ic a ti o n s
N e v e r
s t o p
t h i n k i n g .
•
ABM-P Data Sheet
Revision History:
Previous Version:
Page
2001-12-17
DS 1.5, 2001-07-12
DS 2
Subjects (major changes since last revision)
Reworked from preliminary to first finalized status
For questions on technology, delivery and prices please contact the Infineon
Technologies Offices in Germany or the Infineon Technologies Companies and
Representatives worldwide: see our webpage at http://www.infineon.com
Disclaimer:
This data sheet describes a product under development by Infineon Technologies AG (‘Infineon’).
Infineon reserves the right to change features and characteristics of the product or to discontinue this
product without notice. None of the information contained in this document constitutes an express or
implied assurance of availability or functionality. Please contact Infineon for the latest information on
the product.
ABM-P
PXF 4336 V1.1
Table of Contents
1
1.1
1.1.1
1.1.2
1.1.3
1.1.4
1.1.5
1.2
1.3
2
2.1
2.2
2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
2.3.8
2.3.9
2.3.10
2.3.11
2.3.12
2.3.13
2.3.14
2.3.15
3
3.1
3.1.1
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.2.5
3.2.6
3.2.7
3.2.7.1
3.2.7.2
Page
21
22
23
23
23
24
24
25
26
27
27
28
29
29
30
32
33
35
36
38
40
42
43
44
44
44
44
45
46
46
48
49
49
49
49
50
50
55
55
56
56
Overview
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Queueing Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Scheduling Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supervision Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Descriptions
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Diagram with Functional Groupings . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Common System Clock Supply (6 pins) . . . . . . . . . . . . . . . . . . . . . . . .
UTOPIA Receive Interface Upstream (Master/Slave) (32 pins) . . . . . .
UTOPIA Transmit Interface Downstream (Master/Slave) (32 pins) . . . .
UTOPIA Receive Interface Downstream (Master/Slave) (32 pins) . . . .
UTOPIA Transmit Interface Upstream (Master/Slave) (32 pins) . . . . . .
Microprocessor Interface (32 pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cell Storage RAM Upstream (50 pins) . . . . . . . . . . . . . . . . . . . . . . . . .
Cell Storage RAM Downstream (50 pins) . . . . . . . . . . . . . . . . . . . . . . .
Common Up- and Downstream Cell Pointer RAM (42 pins) . . . . . . . . .
JTAG Boundary Scan (5 pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPI Interface (5 pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
QCI Interface (3 pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Production Test (2 pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply (74 VSS, 32 VDD33 and 14 VDD18 pins) . . . . . . . . . . . . . . . . .
Unconnected (13 pins) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Throughput and Speedup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Cell Handler (Upstream/Downstream) . . . . . . . . . . . . . . . . . . . . . . . . . .
Buffer Manager and Queue Scheduler (Overview) . . . . . . . . . . . . . . . .
Enhanced Rate Control Unit Overview . . . . . . . . . . . . . . . . . . . . . . . . .
AAL5 Assistant . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Internal Address Reduction Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Queue Congestion Indication Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clocking System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DPLL Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
Data Sheet
2001-12-17
