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PYX28C64-25L32MB

8K x 8 EEPROM

器件类别:存储    存储   

厂商名称:Pyramid Semiconductor Corporation

厂商官网:http://www.pyramidsemiconductor.com/

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Pyramid Semiconductor Corporation
零件包装代码
QFJ
包装说明
0.450 X 0.550 INCH, CERAMIC, LCC-32
针数
32
Reach Compliance Code
compliant
ECCN代码
3A001.A.2.C
最长访问时间
250 ns
JESD-30 代码
R-CQCC-N32
JESD-609代码
e0
长度
13.97 mm
内存密度
65536 bit
内存集成电路类型
EEPROM
内存宽度
8
功能数量
1
端子数量
32
字数
8192 words
字数代码
8000
工作模式
ASYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-55 °C
组织
8KX8
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
QCCN
封装形状
RECTANGULAR
封装形式
CHIP CARRIER
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
编程电压
5 V
认证状态
Not Qualified
座面最大高度
1.905 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
TIN LEAD
端子形式
NO LEAD
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
11.43 mm
最长写入周期时间 (tWC)
10 ms
Base Number Matches
1
文档预览
PYX28C64
8K x 8 EEPROM
FEATURES
Access Times of 200, 250, 300 and 350 ns
Single 5V±10% Power Supply
Simple Byte and Page Write
Low Power CMOS:
- 60 mA Active Current
- 200 µA Standby Current
Fast Write Cycle Times
Software Data Protection
Fully TTL Compatible Inputs and Outputs
Endurance: 10,000 or 100,000 Cycles
Data Retention: 100 Years
Available in the following Packages:
– 32-Pin Ceramic LCC (450 x 550 mils)
– 28-Pin 600 mil Ceramic DIP
DESCRIPTION
The PYX28C64 is a 5 Volt 8Kx8 EEPROM using floating
gate CMOS Technology. The device supports 64-byte
page write operation. The PYX28C64 features
DATA
and
Toggle Bit Polling as well as a system software scheme
used to indicate early completion of a Write Cycle. The
device also includes user-optional software data protec-
tion. Endurance is 10,000 or 100,000 Cycles and Data
Retention is 100 Years. The device is available in a 32-Pin
LCC package as well as a 28-Pin 600 mil wide Ceramic
DIP.
PIN CONFIGURATIONS
FUNCTIONAL BLOCK DIAGRAM
DIP (C5-1)
1519B
LCC (L6)
Document #
EEPROM101
REV B
Revised July 2007
1
PYX28C64
MAXIMUM RATINGS
(1)
Symbol
V
CC
Parameter
Power Supply Pin with
Respect to GND
Terminal Voltage with
Respect to GND
(up to 6.25V)
Operating Temperature
Value
–0.3 to +6.25
–0.5 to
+6.25
–55 to +125
Unit
V
Symbol
T
BIAS
T
STG
V
°C
P
T
I
OUT
Parameter
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Value
–55 to +125
–65 to +150
1.0
50
Unit
°C
°C
W
mA
V
TERM
T
A
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
(2)
Military
Ambient
Temperature
–55°C to +125°C
GND
0V
V
CC
5.0V ± 10%
CAPACITANCES
(4)
V
CC
= 5.0V, T
A
= 25°C, f = 1.0MHz
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output Capacitance
Conditions Typ. Unit
V
IN
= 0V
V
OUT
= 0V
10
10
pF
pF
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage
(2)
Symbol
V
IH
V
IL
V
HC
V
LC
V
OL
V
OH
I
LI
Parameter
Input High Voltage
Input Low Voltage
CMOS Input High Voltage
CMOS Input Low Voltage
Output Low Voltage
(TTL Load)
Output High Voltage
(TTL Load)
Input Leakage Current
I
OL
= +8 mA, V
CC
= Min.
I
OH
= –4 mA, V
CC
= Min.
V
CC
= Max.
V
IN
= GND to V
CC
V
CC
= Max.,
CE
= V
IH
,
V
OUT
= GND to V
CC
CE
V
IH
,
OE
= V
IL
,
V
CC
= Max,
f = Max., Outputs Open
CE
V
HC
,
V
CC
= Max,
f = 0, Outputs Open
V
IN
V
LC
or V
IN
V
HC
CE
=
OE
=
V
IL
,
WE
= V
IH
,
All I/O's = Open,
Inputs = V
CC
= 5.5V
___
3
mA
–10
+10
µA
2.4
–10
+10
Test Conditions
P5C164
Min
2.0
–0.5
(3)
V
CC
–0.2
–0.5
(3)
Max
V
CC
+0.3
0.8
V
CC
+0.5
0.2
0.4
Unit
V
V
V
V
V
V
µA
I
LO
Output Leakage Current
I
SB
Standby Power Supply
Current (TTL Input Levels)
Standby Power Supply
Current
(CMOS Input Levels)
I
SB1
___
250
µA
I
CC
Supply Current
___
60
mA
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with V
IL
and I
IL
not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
4. This parameter is sampled and not 100% tested.
Document #
EEPROM101
REV B
Page 2 of 11
PYX28C64
AC ELECTRICAL CHARACTERISTICS—READ CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Symbol
t
AVAV
t
AVQV
t
ELQV
t
OLQV
t
ELQX
t
EHQZ
t
OLQX
t
OHQZ
t
AVQX
t
PU
t
PD
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Chip Disable to Output in High Z
Output Enable to Output in Low Z
Output Disable to Output in High Z
Output Hold from Address Change
Chip Enable to Power Up Time
Chip Disable to Power Down Time
-200
Min Max
200
200
200
100
10
80
10
80
0
250
50
-250
Min Max
250
250
250
100
10
80
10
80
0
250
50
-300
Min Max
300
300
300
100
10
80
10
80
0
250
50
-350
Unit
Min Max
350
350
350
100
10
80
10
80
0
250
50
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMING WAVEFORM OF READ CYCLE
Document #
EEPROM101
REV B
Page 3 of 11
PYX28C64
AC CHARACTERISTICS—WRITE CYCLE
(V
CC
= 5V ± 10%, All Temperature Ranges)
(2)
Symbol
t
WHWL1
t
EHEL1
t
AVEL
t
AVWL
t
ELAX
t
WLAX
t
WLEL
t
ELWL
t
WHEH
t
OHEL
t
OHWL
t
WHOL
t
ELEH
t
WLWH
t
DVEH
t
DVWH
t
EHDX
t
WHDX
t
EHEL2
t
WHWL2
t
ELWL
t
EHWH
t
WHOH
t
OHAV
V
H
Parameter
Write Cycle Time
Address Setup Time
Address Hold Time
Write Setup Time
Write Hold Time
OE
Setup Time
OE
Hold Time
WE
Pulse Width
Data Setup Time
Data Hold Time
Byte Load Cycle Time
CE
Setup Time
CE
Hold Time
OE
Hold Time
Erase Time
High Voltage for Chip Clear
-200
Min Max
10
20
150
0
0
20
20
150
50
10
0.2
1
1
1
1
200
150
12
13
2
-250
Min Max
10
20
150
0
0
20
20
150
50
10
0.2
1
1
1
1
200
150
12
13
2
-300
Min Max
10
20
150
0
0
20
20
150
50
10
0.2
1
1
1
1
200
150
12
13
2
-350
Unit
Min Max
10
20
150
0
0
20
20
150
50
10
0.2
1
1
1
1
200
150
12
13
2
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
ms
ns
V
t
OVHWL
Output Setup Time
t
WLWH2
Chip Erase Time
Document #
EEPROM101
REV B
Page 4 of 11
PYX28C64
TIMING WAVEFORM OF BYTE WRITE CYCLE (CE CONTROLLED)
CE
TIMING WAVEFORM OF BYTE WRITE CYCLE (WE CONTROLLED)
WE
Document #
EEPROM101
REV B
Page 5 of 11
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