Datasheet
R8C/36T-A Group
RENESAS MCU
R01DS0055EJ0100
Rev.1.00
Dec 09, 2011
1.
1.1
Overview
Features
The R8C/36T-A Group of single-chip microcontrollers (MCUs) incorporates the R8C CPU core, which provides
sophisticated instructions for a high level of efficiency. With 1 Mbyte of address space, the CPU core is capable of
executing instructions at high speed. In addition, it features a multiplier for high-speed arithmetic processing.
Power consumption is low, and additional power control is possible by selecting the operating mode. The R8C/36T-
A Group is also designed to maximize EMI/EMS performance.
Integration of many peripheral functions, including multifunction timer and serial interface on the same chip,
reduces the number of system components.
The R8C/36T-A Group integrates a touch sensor control unit, which enables detection of the floating capacitance of
the electrostatic capacitive touch electrode.
This group also has on-chip data flash (1 KB × 4 blocks) with background operation (BGO) function.
1.1.1
Applications
Electronic household appliances, office equipment, audio equipment, consumer equipment, etc.
R01DS0055EJ0100 Rev.1.00
Dec 09, 2011
Page 1 of 58
R8C/36T-A Group
1. Overview
1.1.2
Specifications
Tables 1.1 and 1.2 outline Specifications.
Table 1.1
Item
CPU
Specifications (1)
Function
Central
processing unit
Description
R8C CPU core
• Number of fundamental instructions: 89
• Minimum instruction execution time:
50 ns (CPU clock = 20 MHz, VCC = 2.7 V to 5.5 V)
200 ns (CPU clock = 5 MHz, VCC = 1.8 V to 5.5 V)
• Multiplier: 16 bits × 16 bits
32 bits
• Multiply-accumulate instruction: 16 bits × 16 bits + 32 bits
32 bits
• Operating mode: Single-chip mode (address space: 1 Mbyte)
Refer to
Table 1.3 Product List.
ROM, RAM,
data flash
Voltage
Voltage detection • Power-on reset
detection
circuit
• Voltage detection with three check points (the detection levels for voltage
detection 0 and voltage detection 1 can be selected.)
I/O ports
Programmable
• Input only: 1
I/O ports
• CMOS I/O: 59, selectable pull-up resistor
• High current drive ports: 59
Clock
Clock generation • 4 circuits: XIN clock oscillation circuit, XCIN clock oscillation circuit,
circuits
high-speed on-chip oscillator (with frequency adjustment function),
low-speed on-chip oscillator
• Oscillation stop detection: XIN clock oscillation stop detection function
• Frequency divider circuit: Divided by 1, 2, 4, 8, or 16 can be selected
• Low-power mode: Standard operating mode (high-speed clock, low-speed
clock, high-speed on-chip oscillator, low-speed on-chip
oscillator), wait mode, stop mode
Interrupts
• Number of interrupt vectors: 69
• External interrupt inputs: 9 (INT × 5, key input × 4)
• Priority levels: 7
Event link controller (ELC)
• Events output from peripheral functions can be linked to events input to
different peripheral functions.
(30 sources × 10 types of event link operations)
• Events can be handled independently from interrupt requests.
Watchdog timer
• 14 bits × 1
• Selectable reset start function
• Selectable low-speed on-chip oscillator for the watchdog timer
DTC (data transfer controller)
• 1 channel
• Activation sources: 27
• Transfer modes: 2 (normal mode, repeat mode)
Timer
Timers RJ_0
16 bits × 1: 1 circuit integrated on-chip
Timer mode (periodic timer), pulse output mode (output level inverted every
period), event counter mode, pulse width measurement mode, pulse period
measurement mode
Timer RB2_0
16 bits × 1: 1 circuit integrated on-chip
Timer mode (periodic timer), programmable waveform generation mode
(PWM output), programmable one-shot generation mode, programmable wait
one-shot generation mode
Timers RC_0
16 bits (with 4 capture/compare registers) × 1: 1 circuit integrated on-chip
Timer mode (input capture function, output compare function), PWM mode
(output: 3 pins), PWM2 mode (PWM output: 1 pin)
Timer RE2
8 bits × 1
Compare match timer mode, real-time clock mode
Memory
R01DS0055EJ0100 Rev.1.00
Dec 09, 2011
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R8C/36T-A Group
1. Overview
Table 1.2
Specifications (2)
Description
2 channels
Clock synchronous serial I/O mode, clock asynchronous serial I/O mode
1 channel
Clock synchronous serial I/O mode, clock asynchronous serial I/O mode, I
2
C
mode (I
2
C-bus), multiprocessor communication mode
1 channel (also used for the I
2
C bus)
1 channel (also used for the SSU)
Hardware LIN
1 channel (timer RJ_0, UART0_0, or UART0_1 used)
Resolution: 10 bits × 12 channels, sample and hold function, sweep mode
2 circuits
System CH × 4, electrostatic capacitive touch detection × 28
CRC-CCITT (X
16
+ X
12
+ X
5
+ 1), CRC-16 (X
16
+ X
15
+ X
2
+ 1) compliant
• Program/erase voltage: VCC = 2.7 V to 5.5 V
• Program/erase endurance:10,000 times (data flash)
1,000 times (program ROM)
• Program security: ROM code protect, ID code check
• Debug functions: On-chip debug, on-board flash rewrite function
• BGO (background operation) function (data flash)
CPU clock = 20 MHz (VCC = 2.7 V to 5.5 V)
CPU clock = 5 MHz (VCC = 1.8 V to 5.5 V)
Typ. 6.5 mA (VCC = 5.0 V, f(XIN) = 20 MHz)
Typ. 3.5 mA (VCC = 3.0 V, f(XIN) = 10 MHz)
Typ. 4.0
A
(VCC = 3.0 V, wait mode f(XCIN) = 32 kHz)
Typ. 2.2
A
(VCC = 3.0 V, stop mode)
-20C to 85C (N version)
-40C to 85C (D version)
(1)
64-pin LQFP
Package code: PLQP0064KB-A (previous code: 64P6Q-A)
Package code: PLQP0064GA-A (previous code: 64P6U-A)
Item
Function
Serial interface UART0_0 and
UART0_1
UART2
Clock
Synchronous
serial
interface
(SSU)
SSU_0
(I
2
C bus)
I
2
C_0
HW-LIN_0
LIN
module
A/D converter
Comparator B
Touch Sensor control unit (TSCU)
CRC calculator
Flash memory
Operating frequency/
Power supply voltage
Current consumption
Operating ambient temperature
Package
Note:
1. Specify the D version if it is to be used.
R01DS0055EJ0100 Rev.1.00
Dec 09, 2011
Page 3 of 58
R8C/36T-A Group
1. Overview
1.2
Product List
Table 1.3 lists product information. Figure 1.1 shows the Product Part Number Structure.
Table 1.3
Product List
Part No.
R5F21368SNFP
R5F2136ASNFP
R5F2136CSNFP
R5F21368SNFA
R5F2136ASNFA
R5F2136CSNFA
R5F21368SDFP
R5F2136ASDFP
R5F2136CSDFP
R5F21368SDFA
R5F2136ASDFA
R5F2136CSDFA
Internal ROM Capacity
Program ROM
Data Flash
64 Kbytes
1 Kbyte × 4
96 Kbytes
128 Kbytes
64 Kbytes
96 Kbytes
128 Kbytes
64 Kbytes
96 Kbytes
128 Kbytes
64 Kbytes
96 Kbytes
128 Kbytes
Internal RAM
Capacity
6 Kbytes
8 Kbytes
10 Kbytes
6 Kbytes
8 Kbytes
10 Kbytes
6 Kbytes
8 Kbytes
10 Kbytes
6 Kbytes
8 Kbytes
10 Kbytes
Current of Dec 2011
Package Type
Remarks
PLQP0064KB-A N version
PLQP0064GA-A
PLQP0064KB-A D version
PLQP0064GA-A
Part No . R 5 F 21 36 C S N FP
Package type:
FP: PLQP0064KB-A
(0.5 mm pin pitch, 10
10 mm square body)
FA: PLQP0064GA-A
(0.8 mm pin pitch, 14
14 mm square body)
Classification
N: Operating ambient temperature -20°C to 85°C
D: Operating ambient temperature -40°C to 85°C
ROM capacity
8: 64 KB
A: 96 KB
C: 128 KB
R8C/36T-A Group
R8C/3xT-A Series
Memory type
F: Flash memory
Renesas MCU
Renesas semiconductor
Figure 1.1
Product Part Number Structure
R01DS0055EJ0100 Rev.1.00
Dec 09, 2011
Page 4 of 58
R8C/36T-A Group
1. Overview
1.3
Block Diagram
Figure 1.2 shows the Block Diagram.
8
8
8
8
5
1
7
8
I/O ports
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Port P6
System clock generation circuit
Peripheral functions
A/D converter
(10 bits
12 channels)
Timers
Timer RJ
(16 bits
1)
Timer
RB2 (16 bits
1)
Timer
RC (16 bits
1)
Timer
RE2 (8 bits
1)
XIN-XOUT
XCIN-XCOUT
High-speed on-chip oscillator
Low-speed on-chip oscillator
Low-speed on-chip oscillator
(for watchdog timer)
UART0
(8 bits
2 channels)
Voltage detection circuit
DTC
UART2
(8 bits
1 channel)
Comparator B
Synchronous serial
communication unit (SSU/I
2
C)
(8 bits
1 channel)
TSCU
(28 channels)
LIN module
(1 channel)
Event link controller
Watchdog timer
(14 bits)
CRC calculator
R8C CPU core
R0H
R1H
R2
R3
A0
A1
FB
R0L
R1L
SB
USP
ISP
INTB
PC
FLG
Memory
ROM
(1)
RAM
(2)
Multiplier
Port P8
7
Notes:
1. ROM size varies with the product.
2. RAM size varies with the product.
Figure 1.2
Block Diagram
R01DS0055EJ0100 Rev.1.00
Dec 09, 2011
Page 5 of 58
