Numonyx™ Embedded Flash Memory
(J3 v. D)
32, 64, 128, and 256 Mbit
Datasheet
Product Features
Architecture
— High-density symmetrical 128-Kbyte blocks
— 256 Mbit (256 blocks)
— 128 Mbit (128 blocks)
— 64 Mbit (64 blocks)
— 32 Mbit (32 blocks)
Performance
— 75 ns Initial Access Speed (128/64/32
-Mbit densities)
— 95 ns Initial Access Speed (256 Mbit only)
— 25 ns 8-word and 4-word Asynchronous
page-mode reads
— 32-Byte Write buffer
— 4 µs per Byte Effective programming time
System Voltage and Power
— V
CC
= 2.7 V to 3.6 V
— V
CCQ
= 2.7 V to 3.6 V
Packaging
— 56-Lead TSOP package (32, 64, 128 Mbit
only)
— 64-Ball Numonyx Easy BGA package (32,
42, 128 and 256 Mbit)
Security
— Enhanced security options for code
protection
— 128-bit Protection Register
— 64-bit Unique device identifier
— 64-bit User-programmable OTP cells
— Absolute protection with V
PEN
= GND
— Individual block locking
— Block erase/program lockout during power
transitions
Software
— Program and erase suspend support
— Flash Data Integrator (FDI), Common Flash
Interface (CFI) Compatible
Quality and Reliability
— Operating temperature:
-40 °C to +85 °C
— 100K Minimum erase cycles per block
— 0.13 µm ETOX™ VIII Process
308551-05
November 2007
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND
CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A
PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx
products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.
Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented
subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or
otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting
Numonyx's website at
http://www.numonyx.com.
Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2007, Numonyx B.V., All Rights Reserved.
Datasheet
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Numonyx™ Embedded Flash Memory (J3 v. D)
Contents
1.0
Introduction
.............................................................................................................. 6
1.1
Nomenclature ..................................................................................................... 6
1.2
Acronyms........................................................................................................... 6
1.3
Conventions ....................................................................................................... 7
Functional Overview
.................................................................................................. 8
2.1
Block Diagram .................................................................................................. 10
2.2
Memory Map..................................................................................................... 11
Package Information
............................................................................................... 12
3.1
56-Lead TSOP Package (32, 64, 128 Mbit) ............................................................ 12
3.2
Easy BGA Package (32, 64, 128 and 256 Mbit) ...................................................... 13
Ballouts and Signal Descriptions..............................................................................
15
4.1
Easy BGA Ballout (32/64/128 Mbit) ..................................................................... 15
4.2
56-Lead TSOP Package Pinout (32/64/128 Mbit).................................................... 17
4.3
Signal Descriptions ............................................................................................ 17
Maximum Ratings and Operating Conditions............................................................
19
5.1
Absolute Maximum Ratings................................................................................. 19
5.2
Operating Conditions ......................................................................................... 19
5.3
Power Up/Down ................................................................................................ 19
5.3.1 Power-Up/Down Characteristics................................................................ 20
5.3.2 Power Supply Decoupling ........................................................................ 20
5.4
Reset............................................................................................................... 20
Electrical Characteristics
......................................................................................... 21
6.1
DC Current Specifications ................................................................................... 21
6.2
DC Voltage specifications.................................................................................... 22
6.3
Capacitance...................................................................................................... 22
AC Characteristics
................................................................................................... 23
7.1
Read Specifications............................................................................................ 23
7.2
Write Specifications ........................................................................................... 27
7.3
Program, Erase, Block-Lock Specifications ............................................................ 29
7.4
Reset Specifications........................................................................................... 29
7.5
AC Test Conditions ............................................................................................ 30
Bus Interface...........................................................................................................
31
8.1
Bus Reads ........................................................................................................ 32
8.1.1 Asynchronous Page Mode Read ................................................................ 32
8.1.2 Output Disable ....................................................................................... 33
8.2
Bus Writes........................................................................................................ 33
8.3
Standby ........................................................................................................... 34
8.3.1 Reset/Power-Down ................................................................................. 34
8.4
Device Commands............................................................................................. 34
Flash Operations
..................................................................................................... 36
9.1
Status Register ................................................................................................. 36
9.1.1 Clearing the Status Register .................................................................... 37
9.2
Read Operations ............................................................................................... 37
9.2.1 Read Array ............................................................................................ 37
9.2.2 Read Status Register .............................................................................. 38
9.2.3 Read Device Information ......................................................................... 38
9.2.4 CFI Query ............................................................................................. 38
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
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Numonyx™ Embedded Flash Memory (J3 v. D)
9.3
9.4
9.5
9.6
9.7
Programming Operations ....................................................................................38
9.3.1 Single-Word/Byte Programming................................................................39
9.3.2 Buffered Programming ............................................................................39
Block Erase Operations .......................................................................................40
Suspend and Resume .........................................................................................41
Status Signal (STS)............................................................................................42
Security and Protection.......................................................................................43
9.7.1 Normal Block Locking ..............................................................................43
9.7.2 Configurable Block Locking.......................................................................44
9.7.3 OTP Protection Registers..........................................................................44
9.7.4 Reading the OTP Protection Register..........................................................44
9.7.5 Programming the OTP Protection Register ..................................................44
9.7.6 Locking the OTP Protection Register ..........................................................45
9.7.7 VPP/ VPEN Protection ..............................................................................46
10.0 Device Command Codes
...........................................................................................47
11.0 Device ID Codes.......................................................................................................48
12.0 Flow Charts..............................................................................................................49
13.0 Common Flash Interface
..........................................................................................58
13.1 Query Structure Output ......................................................................................58
13.2 Query Structure Overview...................................................................................59
13.3 Block Status Register .........................................................................................60
13.4 CFI Query Identification String ............................................................................60
13.5 System Interface Information ..............................................................................61
13.6 Device Geometry Definition .................................................................................61
13.7 Primary-Vendor Specific Extended Query Table ......................................................62
A
B
Additional Information.............................................................................................66
Ordering Information
...............................................................................................67
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Numonyx™ Embedded Flash Memory (J3 v. D)
Revision History
Date
July 2005
Revision
001
Description
Initial release
Changed Marketing name from 28FxxxJ3 to J3 v. D.
Updated the following:
•
Table 18, “Command Bus Operations” on page 35
•
Section 9.2.2, “Read Status Register” on page 38
•
Section 9.3.2, “Buffered Programming” on page 39
•
Table 24, “Valid Commands During Suspend” on page 41
Added
Table 25, “STS Configuration Register” on page 42
.
Section 5.3.1, “Power-Up/Down Characteristics” on page 20
was modified.
September 2005
002
February 2006
003
Notes on
Table 8, “DC Voltage Characteristics” on page 22
were updated
Table 10, “Read Operations” on page 23
was updated with R16 value
Table 12, “Configuration Performance” on page 29
was updated
Note 1 of
Table 26, “STS Configuration Coding Definitions” on page 43
was updated.
Added 256-Mbit; Updated format.
Applied Numonyx branding.
February 2007
November 2007
004
05
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