Intel
®
Wireless Flash Memory
(W18/W30 SCSP)
32WQ and 64WQ Family with Asynchronous RAM
Datasheet
Product Features
■
■
■
■
■
Device Architecture
— Flash Density: 32-Mbit, 64-Mbit
— Async PSRAM Density: 8-, 16-, 32-
Mbit; Async SRAM Density: 4-, 8-, 16-
Mbit
— Top, Bottom or Dual flash parameter
configuration
Device Voltage
— Flash V
CC
= 1.8 V; Flash V
CCQ
= 1.8 V
or 3.0 V
— RAM V
CC
= 3.0 V; RAM V
CCQ
= 1.8 V
or 3.0 V
Device Packaging
— 88 balls (8 x 10 active ball matrix);
Area: 8x10 mm; Height: 1.2 mm to 1.4
mm
PSRAM Performance
— 70 ns initial access, 25 ns async page
reads at 1.8 V I/O
— 70 ns initial access async PSRAM at
1.8V I/O
— 88 ns initial access, 30 ns async page
reads at 1.8 V I/O
— 85 ns initial access, 35 ns async page
reads at 3.0 V I/O
— 70 ns initial access, 25 ns async page
reads at 3.0 V I/O
SRAM Performance
— 70 ns initial access at 1.8 V or 3.0 V I/O
■
■
■
■
Flash Performance
— 65 ns initial access at 1.8 V I/O
— 70 ns initial access at 3.0 V I/O
— 25 ns async page at 1.8 V or 3.0 V I/O
— 14 ns sync reads (t
CHQV
) at 1.8 V I/O
— 20 ns sync reads (t
CHQV
) at 3.0 V I/O
— Enhanced Factory Programming:
3.10 µs/Word (Typ)
Flash Architecture
— Read-While-Write/Erase
— Asymmetrical blocking structure
— 4-KWord parameter blocks (Top or
Bottom); 32-KWord main blocks
— 4-Mbit partition size
— 128-bit One-Time Programmable (OTP)
Protection Register
— Zero-latency block locking
— Absolute write protection with block
lock using F-VPP and F-WP#
Flash Software
— Intel
®
Flash Data Integrator (FDI) and
Common Flash Interface (CFI)
Quality and Reliability
— Extended Temperature: –25 °C to +85 °C
— Minimum 100K flash block erase cycle
— 90 nm ETOX™ IX flash technology
— 130 nm ETOX™ VIII flash technology
The Intel
®
Wireless Flash Memory (W18/W30 SCSP) family offers various flash plus static
RAM combinations in a common package footprint. The flash memory features 1.8 V low-
power operations with flexible, multi-partition, dual-operation Read-While-Write / Read-While-
Erase, asynchronous, and synchronous reads. This SCSP device integrates up to two flash die,
one PSRAM die, and one SRAM die in a low-profile package compatible with other SCSP
families with QUAD+ ballout.
Order Number: 251407, Revision: 010
18-Oct-2005
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Le ga l Lin es an d Discla ime rs
Intel may make changes to specifications and product descriptions at any time, without notice.
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the
presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by
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*Other names and brands may be claimed as the property of others.
Copyright © 2005, Intel Corporation. All Rights Reserved.
18-Oct-2005
2
Intel® Wireless Flash Memory (W18/W30 SCSP)
Order Number: 251407, Revision: 010
Datasheet
32WQ and 64WQ Family—Intel® Wireless Flash Memory (W18/W30 SCSP)
1.0
Introduction....................................................................................................................................6
1.1
1.2
Nomenclature ....................................................................................................................... 6
Conventions.......................................................................................................................... 6
2.0
Functional Overview
.....................................................................................................................8
2.1
2.2
Block Diagram ...................................................................................................................... 8
Flash Memory Map and Partitioning ..................................................................................... 9
3.0
4.0
Package Information
...................................................................................................................11
Ballout and Signal Description
..................................................................................................13
4.1
4.2
Signal Ballout......................................................................................................................13
Signal Descriptions .............................................................................................................14
5.0
Maximum Ratings and Operating Conditions...........................................................................16
5.1
5.2
5.3
Absolute Maximum Ratings ................................................................................................ 16
Operating Conditions .......................................................................................................... 17
Capacitance........................................................................................................................ 17
6.0
Electrical Specifications
.............................................................................................................18
6.1
DC Characteristics.............................................................................................................. 18
7.0
AC Characteristics
......................................................................................................................21
7.1
7.2
7.3
7.4
Flash AC Characteristics ....................................................................................................21
SRAM AC Characteristics...................................................................................................21
PSRAM AC Characteristics ................................................................................................ 24
Device AC Test Conditions................................................................................................. 29
8.0
9.0
Flash Power Consumption
.........................................................................................................30
Device Operation
......................................................................................................................... 31
9.1
9.2
Bus Operations ...................................................................................................................31
Flash Command Definitions................................................................................................ 34
10.0 Flash Read Operations
............................................................................................................... 35
11.0 Flash Program Operations
.........................................................................................................36
12.0 Flash Erase Operations
.............................................................................................................. 37
13.0 Flash Security Modes..................................................................................................................
38
14.0 Flash Read Configuration Register
........................................................................................... 39
15.0 SRAM Operations
........................................................................................................................ 40
15.1
15.2
Power-up Sequence and Initialization ................................................................................ 40
Data Retention Mode.......................................................................................................... 40
16.0 PSRAM Operations......................................................................................................................42
16.1
16.2
16.3
Power-Up Sequence and Initialization................................................................................ 42
16.1.1 16Mbit PSRAM Power-Up Sequence (Non-Page Mode).......................................42
Standby Mode/ Deep Power-Down Mode .......................................................................... 43
PSRAM Special Read and Write Constraints .....................................................................43
Datasheet
Intel® Wireless Flash Memory (W18/W30 SCSP)
Order Number: 251407, Revision: 010
18-Oct-2005
3
Intel® Wireless Flash Memory (W18/W30 SCSP)—32WQ and 64WQ Family
Appendix A Write State Machine
........................................................................................................ 45
Appendix B Common Flash Interface.................................................................................................
46
Appendix C Flash Flowcharts
.............................................................................................................47
Appendix D Additional Information
.................................................................................................... 48
Appendix E Ordering Information
....................................................................................................... 49
18-Oct-2005
4
Intel® Wireless Flash Memory (W18/W30 SCSP)
Order Number: 251407, Revision: 010
Datasheet
32WQ and 64WQ Family—Intel® Wireless Flash Memory (W18/W30 SCSP)
Revision History
Date
June 2003
September
2003
May 2004
Revision
-001
-002
-006
Initial release.
Changed PSRAM Read values.
Added new Transient Equivalent Testing Load Circuit figure.
General text edits.
Reformatted the datasheet and moved sections around according to the new layout.
Added 90 nm product information.
Added line items to
Table 21 “32WQ and 64WQ W18/W30 SCSP Ordering Information (Flash
Only)” on page 50.
Added DC and AC specs for the new line items and edits to related sections.
Added line items to
Table 21 “32WQ and 64WQ W18/W30 SCSP Ordering Information (Flash
Only)” on page 50
Added 32WQ product information.
June 2005
October 2005
-009
-010
Added line items to
Table 21 “32WQ and 64WQ W18/W30 SCSP Ordering Information (Flash
Only)” on page 50
Removed Power-up sequence from Section 16; Added 70ns PSRAM (non-page mode)
specification Updated Ordering Information
Description
August 2004
-007
January 2005
-008
Datasheet
Intel® Wireless Flash Memory (W18/W30 SCSP)
Order Number: 251407, Revision: 010
18-Oct-2005
5
测试/测量
