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RD74LVC1G79WPE

Single Positive Edge-triggered D-type Flip Flop

器件类别:逻辑    逻辑   

厂商名称:Renesas(瑞萨电子)

厂商官网:https://www.renesas.com/

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器件参数
参数名称
属性值
厂商名称
Renesas(瑞萨电子)
零件包装代码
BGA
包装说明
VFBGA,
针数
5
Reach Compliance Code
compli
系列
LVC/LCX/Z
JESD-30 代码
R-PBGA-B5
长度
1.1 mm
逻辑集成电路类型
D FLIP-FLOP
位数
1
功能数量
1
端子数量
5
最高工作温度
85 °C
最低工作温度
-40 °C
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
VFBGA
封装形状
RECTANGULAR
封装形式
GRID ARRAY, VERY THIN PROFILE, FINE PITCH
传播延迟(tpd)
9.9 ns
认证状态
Not Qualified
座面最大高度
0.4 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
1.65 V
标称供电电压 (Vsup)
1.8 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
BALL
端子节距
0.4 mm
端子位置
BOTTOM
触发器类型
POSITIVE EDGE
宽度
0.7 mm
最小 fmax
160 MHz
文档预览
RD74LVC1G79
Single Positive Edge-triggered D-type Flip Flop
REJ03D0695–0100
Rev.1.00
Feb 23, 2006
Description
The RD74LVC1G79 has D-type flip flop in a 5-pin package. The input data is transferred to the output at the rising
edge of clock pulse CLK. Low voltage and high-speed operation is suitable for the battery powered products (e.g.,
notebook computers), and the low power consumption extends the battery life.
Features
The basic gate function is lined up as Renesas uni logic series.
Supply voltage range: 1.65 to 5.5 V
Operating temperature range: –40 to +85°C
All inputs: V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs: V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Output current:
±4 mA (@V
CC
= 1.65 V)
±8 mA (@V
CC
= 2.3 V)
±24 mA (@V
CC
= 3.0 V)
±32 mA (@V
CC
= 4.5 V)
Ordering Information
Part Name
RD74LVC1G79WPE
Package Type
WCSP-5 pin
Package Code
(Previous Code)
SXBG0005LB–A
(TBS-5CV)
Package
Abbreviation
WP
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Article Indication
Marking
Year code
Month code
EFYM
Rev.1.00 Feb 23, 2006 page 1 of 6
RD74LVC1G79
Function Table
Inputs
CLK
L
H:
L:
X:
↑:
Q
0
:
High level
Low level
Immaterial
Low to high transition
Level of Q before the indicated steady input conditions was established.
D
H
L
X
Output Q
H
L
Q
0
Pin Arrangement
0.7 mm
Height 0.4 mm
0.4 mm pitch
0.17 mm 5–Ball (WP) GND
3
4
Q
CLK
2
1.1 mm
Pin#1 INDEX
D
1
5
V
CC
(Bottom view)
(Top view)
Logic Diagram
CLK
C
C
C
TG
C
C
C
Q
C
D
TG
TG
TG
C
C
C
Rev.1.00 Feb 23, 2006 page 2 of 8
RD74LVC1G79
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range
*1
*1, 2
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
θ
ja
Tstg
Ratings
–0.5 to 6.5
–0.5 to 6.5
–0.5 to V
CC
+0.5
–0.5 to 6.5
–50
–50
±50
±100
200
–65 to 150
Unit
V
V
V
mA
mA
mA
mA
°C/W
°C
WP
Test Conditions
Output voltage range
Input clamp current
Output clamp current
Output: H or L
V
CC
: OFF
V
I
< 0
V
O
< 0
V
O
= 0 to V
CC
Continuous output current
Continuous current through
V
CC
or GND
Package Thermal impedance
Storage temperature
Notes:
The absolute maximum ratings are values, which must not individually be exceeded, and furthermore no two
of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
ngs
observed.
2. This value is limited to 5.5 V maximum.
Recommended Operating Conditions
Item
Supply voltage range
Input voltage range
Output voltage range
Output current
Symbol
V
CC
V
I
V
O
I
OL
Min
1.65
0
0
–40
Max
5.5
5.5
V
CC
4
8
16
24
32
–4
–8
–16
–24
–32
85
Unit
V
V
V
mA
Conditions
V
CC
= 1.65 V
V
CC
= 2.3 V
V
CC
= 3.0 V
V
CC
= 4.5 V
V
CC
= 1.65 V
V
CC
= 2.3 V
V
CC
= 3.0 V
V
CC
= 4.5 V
I
OH
mA
Operating free-air temperature
T
a
°C
Note: Unused or floating inputs must be held high or low.
Rev.1.00 Feb 23, 2006 page 3 of 8
RD74LVC1G79
Electrical Characteristics
Ta = –40 to 85°C
Item
Input voltage
Symbol
V
IH
V
CC
(V)
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
V
IL
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
4.5 to 5.5
Output voltage
V
OH
1.65 to 5.5
1.65
2.3
3.0
4.5
V
OL
Min to Max
1.65
2.3
3.0
4.5
Input current
Quiescent
supply current
I
IN
I
CC
∆I
CC
Output leakage
current
Input capacitance
I
OFF
C
IN
0 to 5.5
5.5
3 to 5.5
0
3.3
Min
V
CC
×0.65
1.7
2.0
V
CC
×0.7
V
CC
–0.1
1.2
1.9
2.4
2.3
3.8
Typ
3.5
Max
V
CC
×0.35
0.7
0.8
V
CC
×0.3
0.1
0.45
0.3
0.4
0.55
0.55
±5
10
500
±10
µA
pF
µA
µA
V
I
OH
= –100
µA
I
OH
= –4 mA
I
OH
= –8 mA
I
OH
= –16 mA
I
OH
= –24 mA
I
OH
= –32 mA
I
OL
= 100
µA
I
OL
= 4 mA
I
OL
= 8 mA
I
OL
= 16 mA
I
OL
= 24 mA
I
OL
= 32 mA
V
IN
= 5.5 V or GND
V
IN
= V
CC
or GND,
I
O
= 0
One input at V
CC
–0.6 V,
Other input at V
CC
or GND
V
IN
or V
O
= 0 to 5.5 V
V
IN
= V
CC
or GND
Unit
V
Test condition
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions.
Rev.1.00 Feb 23, 2006 page 4 of 8
RD74LVC1G79
Switching Characteristics
V
CC
= 1.8±0.15 V
Item
Maximum clock frequency
Propagation delay time
Setup time
Hold time
Pulse width
Symbol
f
max
t
PLH,
t
PHL
t
su
t
h
t
w
Min
160
4.4
2.2
0.3
2.5
Typ
Max
9.9
Unit
MHz
ns
ns
ns
ns
CLK “H” or “L”
Test conditions
C
L
= 30 pF
C
L
= 30 pF
CLK
D
Q
FROM
(Input)
TO
(Output)
V
CC
= 2.5±0.2 V
Item
Maximum clock frequency
Propagation delay time
Setup time
Hold time
Pulse width
Symbol
f
max
t
PLH,
t
PHL
t
su
t
h
t
w
Min
160
2.3
1.4
0.4
2.5
Typ
Max
7.0
Unit
MHz
ns
ns
ns
ns
CLK “H” or “L”
Test conditions
C
L
= 30 pF
C
L
= 30 pF
CLK
D
Q
FROM
(Input)
TO
(Output)
V
CC
= 3.3±0.3 V
Item
Maximum clock frequency
Propagation delay time
Setup time
Hold time
Pulse width
Symbol
f
max
t
PLH,
t
PHL
t
su
t
h
t
w
Min
160
2.0
1.3
1.0
2.5
Typ
Max
5.0
Unit
MHz
ns
ns
ns
ns
CLK “H” or “L”
Test conditions
C
L
= 50 pF
C
L
= 50 pF
CLK
D
Q
FROM
(Input)
TO
(Output)
V
CC
= 5.0±0.5 V
Item
Maximum clock frequency
Propagation delay time
Setup time
Hold time
Pulse width
Symbol
f
max
t
PLH,
t
PHL
t
su
t
h
t
w
Min
160
1.3
1.2
0.5
2.5
Typ
Max
4.5
Unit
MHz
ns
ns
ns
ns
CLK “H” or “L”
Test conditions
C
L
= 50 pF
C
L
= 50 pF
CLK
D
Q
FROM
(Input)
TO
(Output)
Operating Characteristics
Item
Power dissipation capacitance
Symbol
C
PD
V
CC
(V)
1.8
2.5
3.3
5.0
Min
Ta = 25°C
Typ
20
21
22
26
Max
Unit
pF
Test Conditions
f = 10 MHz
Rev.1.00 Feb 23, 2006 page 5 of 8
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参数对比
与RD74LVC1G79WPE相近的元器件有:RD74LVC1G79。描述及对比如下:
型号 RD74LVC1G79WPE RD74LVC1G79
描述 Single Positive Edge-triggered D-type Flip Flop Single Positive Edge-triggered D-type Flip Flop
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