EWM-900-FDTC
Designed for Voice and Data Applications
1000 foot operating range is possible
-109 dBm Sensitivity (12dB SINAD)
19.2K Baud Data Rate
56 Channels
Full-Duplex Operation
The EWM-900-FDTC is ideal for unlicensed voice and data applica-
tions. The transceiver module requires no external RF components
except for the antenna. It generates virtually no emissions, making
FCC and ETSI approvals easy.
The transceiver operates in full-duplex. It can transmit and receive
data and/or voice simultaneously. The receiver section employs a
direct-conversion, zero IF architecture, eliminating image frequency
interference.
The manufacturing-friendly DIP style package and low-cost make the
EWM-900-FDTC suitable for high volume applications.
APPLICATIONS
Automated Meter Reading
Wireless Headsets
On-Site Paging
Asset Tracking
Wireless Alarm and Security Systems
Long Range RFID
Automated Resource Management
KEY FEATURES
Low-Cost
56 channels
3V operation
Small-size: 1.22’ x .82”
No external parts are required
Simple serial programming interface
RSSI
Low-Cost
902-928MHz
Full-Duplex
Audio/Data
Transceiver
Figure 1. Mechanical Drawing
Figure 2. Pin-Out Diagram
Preliminary
Rev Date 7/25/01
1
EWM-900-FDTC
Absolute Maximum Ratings
Rating
Power Supply and All Input Pins
Storage Temperature
Soldering Temperature (10 sec)
Value
-0.3 to +12
-50 to +100
350
Units
VDC
°C
°C
Electrical Characteristics
C haracteristic
P ower S upply:
Operati ng Voltage
S leep C urrent
RX C urrent
RX C urrent
TX C urrent
Recei ver:
A udi o S ensi ti vi ty
D ata S ensi ti vi ty
Strong si gnal S INA D
Input IP 3
Input P 1D B
A djacent channel rejecti on
TX carri er suppressi on
RX LO feedthrough
A udi o output level
D ata hi gh voltage
D ata low voltage
RS S I voltage range
RS S I gai n
RS S I dynami c range
Transmi tter:
Output power
2nd Harmoni c P ower
3rd Harmoni c P ower
4th Harmoni c P ower
Modulati on bandwi dth
D ata i nput hi gh voltage
D ata i nput low voltage
P eak devi ati on
0.3
V cc-.7
0
25
0
-50
-60
-70
3
V cc
0.7
dB m
dB m
dB m
dB m
kHz
V dc
V dc
kHz p-p
note
note
note
note
4
4
4
4
V cc-.7
0
0.1
-32
65
-109
-100
44
-1
-18
60
45
-65
600
V cc
.7
2.1
dB m
dB m
dB
dB m
dB m
dB
dB
dB m
mV p-p
V dc
V dc
V dc
mv/dB
dB
note 1
note 2
note 3
V cc
Isleep
Irx1
Irx2
Itx
2.7
3.0
3.3
5
31
35
25
V dc
uA
mA
mA
mA
S ymbol
Min
Typ
Max
U nits
N otes
LNA off
LNA on
2
Rev Date 7/25/01
Preliminary
EWM-900-FDTC
Notes:
1).
2).
3).
4).
12dB SINAD, 1kHz modulation tone, 25kHz p-p frequency deviation
19.2kBit/second, 10
-5
BER, 25kHz p-p deviation
-85dBm input level, 1kHz tone, 25 kHz p-p deviation
50 ohm load
Pin Description
Pin Number Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
GND
ANT
GND
GND
GND
GND
AUDIO
LNAEN
GND
C LK
DAT
LE
RSSI
RXD
TXD/AUDIN
Description
Transceiver ground. Connect to ground plane
50 ohm antenna input
Transceiver ground. Connect to ground plane
Transceiver ground. Connect to ground plane
Transceiver ground. Connect to ground plane
Transceiver ground. Connect to ground plane
Receive audio output.
LNA control input. The LNA is on when this pin is
high and off when this pin is low. Do not let this pin
float.
Transceiver ground. Connect to ground plane
Serial programming interface clock.
Serial programming interface data.
Serial programming interface latch enable.
Receive signal strength indicator
Receive data output
Transmit data/audio input
Power supply. Vcc should be bypassed with a
.01uF ceramic capacitor and filtered with a 4.7uF
tantalum capacitor. Noise on the power supply will
degrade receiver sensitivity.
Rev Date 7/25/01
3
16
VC C
Preliminary
EWM-900-FDTC
4
Rev Date 7/25/01
Preliminary
Figure 3: Block Diagram
EWM-900-FDTC
General Description
The EWM-900-FDTC is a complete, fully-integrated
FM/FSK transceiver module capable of full-duplex
transmission and reception of voice and data. The
transceiver operates on one of 56 channels in the 902-
928MHz unlicensed band.
No external RF components (except for the antenna)
are required.
The transceiver is configured via a 3-wire serial
programming interface comprised of LE, DAT, and
CLK. Parameters that can be set using this interface
include transmit channel, receive channel, transmit
enable, and receive enable.
The unique zero-IF receiver architecture allows for a
simple, low-cost solution that does not exhibit the
image frequency interference problems of traditional
super-het designs.
After the LNA, the incoming carrier is directly converted
to baseband (zero-IF) using a pair of quadrature
mixers. Special DC offset correction circuitry is
employed to ensure proper operation at zero-IF. After
the mixers, the receive chain is split into a quadrature
pair (I-chain and Q-chain).
Following the quadrature mixers, a pair of variable-
gain-amplifiers and low-pass-filters are used to amplify
and filter the low-level input signal. Because the
receiver uses a zero-IF architecture, these filters can
be realized on-chip using only resistors and capacitors,
reducing the size and cost of the transceiver.
The gain of the quadrature down-conversion mixers
and variable-gain-amplifiers is automatically controlled
by an internal AGC circuit. This is done to maintain
linearity in the receive chain.
The RSSI circuit derives the RSSI voltage from the Q
receive chain.
Demodulation is achieved by up-converting the
baseband to 140kHz and digitizing the resultant
frequency spectrum. A special P/D circuit is used to
demodulate the carrier and generate an analog
waveform using a 9-bit D/A converter. In strong signal
conditions, this will result in a 44dB SINAD.
The analog output is low-pass filtered to remove IF
noise. The audio output is the output of the LPF. The
data slicer converts the analog waveform at the audio
output to a digital waveform for digital applications.
The transceiver includes on-board frequency
synthesizers for the transmitter and the receiver. These
are programmed through the serial programming
interface discussed later in this document.
The transmitter synthesizer includes a modulation input
that can be driven with digital or analog information.
There is a 150hz high-pass filter on this input.
Therefore, DC voltage levels cannot be sent.
The output of the transmitter synthesizer is connected
to a power amplifier that boosts the output power to
+3dBm typical. After the losses through the duplexer,
the output transmit power is 0dBm typical.
Theory of Operation
A block diagram of the EWM-900-FDTC transceiver is
shown in figure 3.
The antenna input pin is connected directly to the SAW
duplexer. The purpose of the duplexer is to separate
the receive and transmit frequency bands, effectively
combining them while isolating the transmit and receive
circuitry. Table 3 shows the frequency plan for -BS
(base station) and -HS (handset) versions of the
module. It should be noted that -BS modules can only
talk to -HS modules and visa-versa because of the
complimentary frequency plan.
The receive port of the duplexer is connected to a low-
noise-amplifier. The purpose of the amplifier is to
compensate for the signal loss through the duplexer
and to improve the noise figure of the receiver. The
LNA is used when the signal level is low and should
be turned off for strong signals. In strong signal
conditions, the LNA is turned off to improve the linearity
of the receiver.
Preliminary
Rev Date 7/25/01
5
stm32/stm8
