SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
Frequency Range:
Frequency Stability:
32 MHz to 125 MHz
±25 or ±50 ppm over all conditions: operating temperature,
voltage change, load change, calibration tolerance, with V
C
= 2.5V @ 5V, VC = 1.65V @ 3.3V
@ 40°C: ±10 ppm max for 5 years or ±12 ppm max for 10 years
3.3 & 5V, HCMOS
S1310 / S1510 Series
Aging:
Temperature Range:
Operating:
Storage:
Supply Voltage:
Recommended Operating:
ACTUAL SIZE
0 to +70°C, -40 to +85°C
-55 to +125°C
5 V ±5% or 3.3V ±10%
Description
A voltage controlled crystal oscillator
with a wide range of performance op-
tions available up to 125 MHz. This
economic part is designed for phase-
locked loop circuits commonly encoun-
tered in telecom, LAN and wireless data,
and in video processing applications.
The HCMOS output can drive both high
speed CMOS and TTL loads. The de-
vices are packaged in either standard 14-
pin or 8-pin DIP compatible all metal,
resistance welded packages for com-
mercial or industrial temperature range
applications.
Applications & Features
•
Wide frequency range up to 125 MHz
•
HCMOS compatible
˜
Full and half size standard DIP pack-
ages
˜
Tri-state version available, see part
numbering guide for options
Output Waveform
CMOS
T
r
1 Level
80%V
DD
50%V
DD
20%V
DD
0 Level
GND
SYMMETRY
T
f
V
DD
Supply Current:
32 to 70 MHz:
70+ to 125 MHz:
Output Drive:
Symmetry:
50mA max, 35mA max @ 3.3V
65mA max, 35mA max @ 3.3V
Rise & Fall Times:
Logic 0:
Logic 1:
Load:
Jitter:
Pull Characteristics:
Input Impedance:
Frequency Response (-3dB):
Pullability:
Control Voltage:
Transfer Function:
Linearity:
Center Control Voltage:
Mechanical:
Shock:
Solderability:
Terminal Strength:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
Environmental:
Gross Leak Test:
Fine Leak Test:
Thermal Shock:
Moisture Resistance:
3.3V: 45/55% max @ 50% V
DD
for 0 to 70°C,
3.3V: 40/60% max @ 50% V
DD
for -40 to +85°C
5.0V: 45/55% max @ 50% V
DD or
40/60% max @ 1.4V TTL level
4ns max: 20% to 80% V
DD
1.5ns max: 0.5V to 2.5V @ 5V TTL only
0.5V max @ 5V or 20% V
DD
max @ 3.3V
2.5V min @ 5V or 80% V
DD
min @ 3.3V
5V: 5TTL or 50pF, 32 to 50 MHz
5V: 5TTL or 30pF 50+ to 125 MHz
3.3V: 30pF up to 80 MHz, 95Ω AC up to 125 MHz
20ps max RMS period jitter
50KΩ min
50 kHz min
±25, ±50, ±75, ±100 ppm APR*
0.5 to 4.5 V @ 5V or 0.3 to 3.0V @ 3.3V
Frequency increases when Control Voltage increases
5% or 10% max
2.5V @ 5V, 1.65V @ 3.3V
MIL-STD-883,
MIL-STD-883,
MIL-STD-202,
MIL-STD-883,
MIL-STD-202,
MIL-STD-202,
Method 2002, Condition B
Method 2003
Method 211, Conditions A and C
Method 2007, Condition A
Method 215
Method 210, Condition A, B or C
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
MIL-STD-883,
Method
Method
Method
Method
1014, Condition C
1014, Condition A2
1011, Condition A
1004
* APR = (VCXO Pull relative to specified Output Frequency)
–
(VCXO Frequency Stability)
DS-162
REV D
5.2.1
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
Package Details
FULL SIZE PACKAGE
21.0 max
.825
5.08
max
.200
0.91
.036
3.3 & 5V, HCMOS
S1310 / S1510 Series
Part Numbering Guide
S T
SaRonix
T
= Tri-State
optional: full size 3.3 or 5V
standard: 1/2 size 5V
not available: 1/2 size 3.3V
Blank
= Non Tri-State
Series
131 = 3.3V, HCMOS/TTL VCXO
151 = 5V, HCMOS/TTL VCXO
Model
0 = Full size package
9 = Half size package
Stability Tolerance
A = ±25 ppm, 0 to 70°C
B = ±50 ppm, 0 to 70°C
E = ±50 ppm, -40 to +85°C
151 0 A A B J - 60.0000
Frequency (MHz)
Lead Style
Blank = Thru-Hole
J = Gull Wing
Pullability (minimum APR)
A = ±50 ppm
B = ±100 ppm
G = ±25 ppm
H = ±75 ppm
4.85±.25
.191±.01
3.94±.25
.155±.010
15.24±.13
.600±.005
.46±.05
.018±.002
Linearity
A = 5%
B = 10%
Pin 3
Pin 1
12.2±.13
.480±.005
Pin 7
4.57±.13
.18±.005
13.0
.510
max
Pin 14
(4) Glass
Insulators
Pin 12
Pin 8
7.62±.13
.300±.005
Tri-State Logic Table
Pin 3 Input
Logic 1 or NC
Logic 0 or GND
Pin 8 Output
Oscillation
High Impedance
Required Input Levels on Pin 3:
Logic 1 = 3.0 V min
Logic 0 = 0.3V max
Pin Function:
Pin 1: Control Voltage
Pin 3: Tri-State control
(Tri-State version only)
Pin 7: GND / Case (V
SS
)
Pin 8: Output
Pin 12: N/C
(Tri-State version only)
Pin 14: VDC (V
DD
)
Standard Marking Format
Includes Date Code, Frequency & Model
SARONIX
VCXO
Test Circuits
TEST
POINT
Pin 14 (8)
V
DD
POWER
SUPPLY
VM
Pin 1 (1)
*
5.08
max
.200
Denotes Pin 1
HALF SIZE PACKAGE
13.0
max
.510
10.87
max
.428
0.91
max
.036
mA
M
Pin 8 (5)
OUT
GND
Pin 7 (4)
C
L
= 30pF or 50pF
(Note A)
OSCILLATOR
CONTROL VOLTAGE
.46±.08
.018±.003
Pin 1
Control Voltage
1.5
.059
7.62±.20
.300±.008
6.86
.270
Pin 4
GND Case (V
SS
)
NOTE A: C
L
includes probe and fixture capacitance (50pF max 32 to 50 MHz, 30pF max 50+ to 125 MHz)
*
( ) Indicates pin numbers for half size package
Figure 1
– 30pF or 50pF load Test Circuit
13.0
.510
max
120°
120°
120°
7.62±.20
.300±.008
mA
M
Pin 14 (8)
Pin 5
Output
TEST
POINT
Pin 8 (5)
V
DD
OUT
C
L
= 15pF
(Note A)
Pin 7 (4)
R
L
= 780Ω
Pin 8
V
DD
1.5
.059
6.0
.236
Standard Marking Format
Includes Date Code, Frequency & Model
POWER
SUPPLY
VM
Pin 1 (1)
*
OSCILLATOR
N/C GND
MMDB7000
or Equiv
SARONIX
CONTROL VOLTAGE
NOTE A: CL includes probe and fixture capacitance
Denotes Pin 1
Scale: None (Dimensions in
mm
)
inches
*
(
) Indicates pin numbers for half size package
Figure 2
– TTL load Test Circuit
All specifications are subject to change without notice.
DS-162
REV D
5.2.2
SaRonix
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
嵌入式系统
