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S29CD016G0JDEE014

Flash, 512KX32, 67ns, DIE-76

器件类别:存储    存储   

厂商名称:SPANSION

厂商官网:http://www.spansion.com/

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器件参数
参数名称
属性值
厂商名称
SPANSION
零件包装代码
DIE
包装说明
DIE-76
针数
76
Reach Compliance Code
unknown
ECCN代码
EAR99
最长访问时间
67 ns
其他特性
SYNCHRONOUS BURST MODE OPERATION ALSO POSSIBLE
启动块
BOTTOM/TOP
JESD-30 代码
R-XUUC-N76
内存密度
16777216 bit
内存集成电路类型
FLASH
内存宽度
32
功能数量
1
端子数量
76
字数
524288 words
字数代码
512000
工作模式
ASYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-40 °C
组织
512KX32
封装主体材料
UNSPECIFIED
封装代码
DIE
封装形状
RECTANGULAR
封装形式
UNCASED CHIP
并行/串行
PARALLEL
编程电压
2.7 V
认证状态
Not Qualified
最大供电电压 (Vsup)
2.75 V
最小供电电压 (Vsup)
2.5 V
标称供电电压 (Vsup)
2.6 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子形式
NO LEAD
端子位置
UPPER
类型
NOR TYPE
文档预览
S29CD016G Known Good Die
16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only
Burst Mode, Dual Boot, Simultaneous Read/Write
Flash Memory
Data Sheet Supplement
Distinctive Characteristics
Architecture Advantages
Simultaneous Read/Write operations
— Data can be continuously read from the 75% bank
while executing erase/program functions in the 25%
bank
— Zero latency between read and write operations
— Two bank architecture: 75%/25%
Versatile I/O™ control
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the V
IO
pin
— 1.65 V to 2.75 V compatible I/O signals
— 3.6 V tolerant I/O signals
User-Defined x32 Data Bus
Dual Boot Block
— Top and bottom boot in the same device
Software Features
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector (requires only V
CC
levels)
Flexible sector architecture
— Eight 8 Kbytes, thirty 64 Kbytes, and eight 8 Kbytes
sectors
Password Sector Protection
Manufactured on 0.17 µm process technology
SecSi (Secured Silicon) Sector (256 Bytes)
Factory locked and identifiable:
16 bytes for secure,
random factory Electronic Serial Number; remainder
may be customer data programmed by Spansion
Customer lockable:
Can be read, programmed or
erased just like other sectors. Once locked, data
cannot be changed
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector using a user-definable 64-bit password
Supports Common Flash Interface (CFI)
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Programmable Burst interface
— Interface to any high performance processor
— Modes of Burst Read Operation:
Linear Burst:
4 double words and 8 double words
with wrap around
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
Single power supply operation
— Optimized for 2.5 to 2.75 Volt read, erase, and
program operations
Hardware Features
Program Suspend/Resume & Erase Suspend/
Resume
— Suspends program or erase operations to allow
reading, programming, or erasing in same bank
Compatibility with JEDEC standards (JC42.4)
— Software compatible with single-power supply Flash
— Backward-compatible with Spansion Am29LV and
Am29F, and Fujitsu MBM29LV and MBM29F flash
memories
Hardware Reset (RESET#), Ready/Busy#
(RY/BY#), and Write Protect (WP#) inputs
ACC input
— Accelerates programming time for higher throughput
during system production
Performance Characteristics
High performance read access
— Initial/random access times as fast as 64 ns
— Burst access time as fast as 10 ns
Quality and reliability levels equivalent to
standard packaged components
Ultra low power consumption
— Burst Mode Read: 90 mA @ 56 MHz max
— Program/Erase: 50 mA max
— Standby mode: CMOS: 150 µA max
1 million write cycles per sector typical
20 year data retention typical
Publication Number
S29CD016G_KGD
Revision
A
Amendment
0
Issue Date
January 17, 2005
S u p p l e m e n t
Table of Contents
General Description . . . . . . . . . . . . . . . . . . . . . . . . 3
S29CD016G Features .............................................................................3
Electrical Specifications ......................................................................... 4
Product Selector Guide. . . . . . . . . . . . . . . . . . . . . . 5
Die Photograph . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Die Pad Locations . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pad Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pads Relative To Die Center ................................................ 6
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 7
Packaging Information . . . . . . . . . . . . . . . . . . . . . . 8
Surftape Packaging .................................................................................. 8
Gel-Pak and Waffle Pack Packaging .................................................. 8
Product Test Flow . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Spansion KGD Product Test Flow.......................................... 9
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . 10
Maximum Negative Overshoot Waveform ............................. 10
Maximum Positive Overshoot Waveform............................... 10
Physical Specifications . . . . . . . . . . . . . . . . . . . . . . 11
Manufacturing Information . . . . . . . . . . . . . . . . . . 11
Special Handling Instructions . . . . . . . . . . . . . . . . 11
Processing ................................................................................................. 11
Storage ....................................................................................................... 11
DC characteristics
for KGD Devices at 145°C . . . . . . . . . . . . . . . . . . . 12
CMOS Compatible ............................................................................... 12
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 12
Erase/Program Operation – KGD Devices at 145°C ................. 12
Alternate CE# Controlled Erase/Program Operation – KGD De-
vices at 145°C .......................................................................................... 12
Terms and Conditions of Sale for Spansion Non-Vol-
atile Memory Die . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision A (January 17, 2005) ..............................................................15
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2
S29CD016G Known Good Die
S29CD016G_KGDA0 January 17, 2005
S u p p l e m e n t
General Description
The S29CD016G in Known Good Die (KGD) form is an 16 Mbit, 2.5 volt-only Flash
memory. Spansion defines KGD as standard product in die form, tested for func-
tionality and speed. Spansion KGD products have the same reliability and quality
as Spansion products in packaged form.
S29CD016G Features
The S29CD016G is a 16 Megabit, 2.5 Volt-only single power supply burst mode
flash memory device. The device is configured for 524,288 double words. The de-
vice can also be programmed in standard EPROM programmers.
To eliminate bus contention, each device has separate chip enable (CE#), write
enable (WE#) and output enable (OE#) controls. Additional control inputs are re-
quired for synchronous burst operations: Load Burst Address Valid (ADV#), and
Clock (CLK).
Each device requires only a
single 2.5 or 2.6 Volt power supply
(2.5 V to 2.75
V) for both read and write functions. A 12.0-volt V
PP
is not required for program
or erase operations, although an acceleration pin is available if faster program-
ming performance is required.
The device is entirely command set compatible with the
JEDEC single-power-
supply Flash standard.
The
Unlock Bypass
mode facilitates faster programming times by requiring only
two write cycles to program data instead of four.
The
Simultaneous Read/Write architecture
provides simultaneous operation
by dividing the memory space into two banks. The device can begin programming
or erasing in the small bank, and then simultaneously read from the large bank,
with zero latency.
The device provides a 256-byte
SecSi™ (Secured Silicon) Sector
with an one-
time-programmable (OTP) mechanism.
In addition, the device features several levels of sector protection, which can dis-
able both the program and erase operations in certain sectors or sector groups:
Persistent Sector Protection
is a command sector protection method that re-
places the old 12 V controlled protection method;
Password Sector Protection
is a highly sophisticated protection method that requires a password before
changes to certain sectors or sector groups are permitted;
WP# Hardware Pro-
tection
prevents program or erase in the two outermost 8 Kbytes sectors of the
larger bank.
The device defaults to the Persistent Sector Protection mode. The customer must
then choose if the Standard or Password Protection method is most desirable. The
WP# Hardware Protection feature is always available, independent of the other
protection method chosen.
The
Versatile I/O™ (V
CCQ
)
feature allows the output voltage generated on the
device to be determined based on the V
IO
level. This feature allows this device to
operate in the 1.8 V I/O environment, driving and receiving signals to and from
other 1.8 V devices on the same bus. In addition, inputs and I/Os that are driven
externally are capable of handling 3.6 V.
The host system can detect whether a program or erase operation is complete by
observing the RY/BY# pin, by reading the DQ7 (Data# Polling), or DQ6 (toggle)
January 17, 2005 S29CD016G_KGD_A0
S29CD016G Known Good Die
3
S u p p l e m e n t
status bits.
After a program or erase cycle has been completed, the device is
ready to read array data or accept another command.
The
sector erase architecture
allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low V
CC
detector that automat-
ically inhibits write operations during power transitions. The
password and
software sector protection
feature disables both program and erase opera-
tions in any combination of sectors of memory. This can be achieved in-system
at V
CC
level.
The
Program/Erase Suspend/Erase Resume
feature enables the user to put
erase on hold for any period of time to read data from, or program data to, any
sector that is not selected for erasure. True background erase can thus be
achieved.
The
hardware RESET# pin
terminates any operation in progress and resets the
internal state machine to reading array data.
The device offers two power-saving features. When addresses have been stable
for a specified amount of time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby mode.
Power consump-
tion is greatly reduced in both these modes.
AMD’s Flash technology combines years of Flash memory manufacturing experi-
ence to produce the highest levels of quality, reliability and cost effectiveness.
The device electrically erases all bits within a sector simultaneously via
Fowler-Nordheim tunneling. The data is programmed using hot electron injection.
Electrical Specifications
Refer to the S29CD016G data sheet, publication number 24960, for full electrical
specifications on the S29CD016G in KGD form.
4
S29CD016G Known Good Die
S29CD016G_KGDA0 January 17, 2005
S u p p l e m e n t
Product Selector Guide
Part Number
Standard Voltage Range: V
CC
= 2.5 – 2.75 V
Speed Option (Clock Rate)
Max Initial/Asynchronous Access Time, ns (t
ACC
)
Max Burst Access Delay (ns)
Max Clock Rate (MHz)
Max CE# Access, ns (t
CE
)
Max OE# Access, ns (t
OE
)
S29CD016G KGD
Synchronous/Burst or Asynchronous
56 MHz
64
10
56
69
20
40 MHz
67
17
40
71
28
Die Photograph
Die Pad Locations
6
5
4
3
2
1
76 75 74
73
72 71 70
7
8
9
10
11
12
13
14
15
16
69
68
67
66
65
64
63
62
61
60
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Spansion logo location
59
58
57
56
55
54
53
52
51
50
49
48
47
31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46
January 17, 2005 S29CD016G_KGD_A0
S29CD016G Known Good Die
5
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