10 CH PLL
S5T8803A
INTRODUCTION
The S5T8803A is designed to select 10 channels of a cordless phone,
whose frequency band is 46/49MHz.
It has a reference frequency generator, programmable divider for
Transmit and Receive section, and phase detector.
16−DIP−300A
FEATURES
•
•
•
•
•
Able to select 10 Channels: S5T8803A
(both transmit/receive)
Include oscillation circuit with external x-tal (10.24MHz)
5KHz output for guard tone
Unlock detector
(phase difference more than 6.25us)
Standby function for power saving
16−SOP−225
ORDERING INFORMATION
Device
S5T8803A01-D0B0
S5T8803A01-S0B0
Package
16−DIP−300A
16−SOP−225
Operating Temperature
−30°C
to +75°C
1
S5T8803A
10 CH PLL
BLOCK DIAGRAM
V
DD
V
SS
15
12
+
V
DD
OSCI
16
1
11
PHASE
DETECTOR (Tx)
4
REFERENCE
DIVIDER
F1
OSCO
PDT
PHASE
DETECTOR (Rx)
13
PDR
TIF
9
PROGRAMMABLE
DIVIDER (Tx)
PROGRAMMABLE
DIVIDER (Rx)
14
+
RIF
DECODER
UNLOCK
DETECTOR
10
LDT
3
SB
5
D0
6
D1
7
D2
8
2
D3 MODE
PIN CONFIGURATION
OSCO
1
2
3
4
S5T8803A
5
6
7
8
16
15
14
13
12
11
10
9
OSCI
MODE
V
DD
SB
RIF
F1
PDR
D0
V
SS
PDT
D1
D2
LDT
D3
TIF
2
10 CH PLL
S5T8803A
PIN DESCRIPTION
Pin No
1
2
Symbol
OSCO
MODE
Description
This output generates the reference frequency when it is connected to Pin 16 with the
external OSC, whose frequency is 10.24MHz.
Base/Remote Unit Selection Pin.
“High”:
Base Unit
“Low”
: Remote Unit
Standby pin. This input controls Tx PLL for reducing the power dissipation
“High”:
Normal operation
“Low”:
Standby
5KHz output
Channel selection pins
The Combinations of these inputs select one channel among the 10 channels
Input to programmable divider of Tx. AC coupling with VCO
In case of a larger signal, It needs DC−coupling. Minimum input voltage is 0.1 Vrms
Unlocked signal out pin (see output characteristics)
Phase detector output for Tx.
PDT detects the phase error from Tx PLL and its output is connected to the external
low pass filter
This pin is the negative supply of the IC. It is usually grounded
Phase detector output for Rx. PDR detects the phase error from Rx PLL and its output
is connected to the external low pass filter
Input of programmable divider for Rx. AC coupling with VCO
In case of a larger signal (standard CMOS logic), it needs DC coupling.
Minimum input voltage is 0.1Vrms
This pin is the positive supply of the IC
Its reference is V
SS
, and normally + 3.0V ~ + 5.5V more positive than V
SS
X-TAL OSC connection pin
This input generates the reference frequency when it is connected to pin 1 with the
external OSC
3
SB
4
5, 6
7, 8
9
10
11
F1
D0, D1
D2, D3
TIF
LDT
PDT
12
13
14
VSS
PDR
RIF
15
16
V
DD
OSCI
ABSOLUTE MAXIMUM RATINGS
Characteristic
Supply voltage
Input Voltage
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
DD
V
I
P
D
T
OPR
T
STG
Value
−0.5
~
+6.0
−0.3
~ V
DD
+ 0.5
350
−30
~ + 75
−40
~ + 125
Unit
V
V
mW
°C
°C
3
S5T8803A
10 CH PLL
ELECTRICAL CHARACTERISTICS
(Ta = 25°C, V
DD
= 5 V, unless otherwise specified)
Characteristic
Supply Voltage
Input Voltage
Symbol
V
DD
V
IH1
V
IL1
V
IH2
V
IL2
f
I1
Input Frequency
f
l2
f
I3
V
I(AMP)1
Input Amplitude
V
I(AMP)2
V
I(AMP)3
Input Current
I
IH
I
IL
Output Voltage
V
OH1
V
OL1
V
OH2
V
OL2
Output OFF Leakage
Current
Standby Current
I
LKG1
I
LKG2
I
SB1
I
SB2
Operating Current
I
DD1
I
DD2
D0 - D3, SB
D0 - D3, SB
MODE
MODE
V
TIF
= 0.15Vrms
V
RIF
= 0.15Vrms
OSC
IN
= 0.3Vrms
f
TIF
= 52MHz
f
RIF
= 42MHz
OSC
IN
= 11MHz
V
IN
= V
DD
V
IN
= V
SS
PDT, RDR: I
O
= 0.5mA
PDT, RDR : I
O
= 0.5mA
LDT: I
O
= 1mA
F1: I
O
= 1mA
PDT, PDR : V
O
= V
DD
/V
SS
LDT: V
O
= V
SS
V
DD
= 3V (Note 2)
V
DD
= 3V (Note 2)
V
DD
= 3V (Note 1)
V
DD
= 5V (Note 1)
Test Conditions
−
Min.
3
0.7 V
DD
−
0.9 V
DD
−
10
30
5
0.1
0.1
0.3
−
−
V
DD
-1.0
−
V
DD
-1.0
−
−
−
−
3.5
−
−
Typ.
−
−
−
−
−
−
−
10.24
−
−
−
−
−
−
−
−
−
0.01
−
1.0
4.0
2.0
6.0
Max.
5.5
V
DD
0.3V
DD
V
DD
0.1V
DD
52
42
11
0.3V
DD
0.3V
DD
0.3V
DD
40
40
−
1.0
−
1.0
1.0
5.0
2.0
−
3.0
7.0
Unit
V
V
V
V
V
MHz
MHz
MHz
Vrms
Vrms
Vrms
µA
µA
V
V
V
V
µA
µA
mA
mA
mA
mA
NOTES:
1.
OSC IN: 10.24MHz X-tal Connection
TIF: 27MHz 150 mVrms
RlF: 42MHz 150 mVrrns
MODE: V
DD
, SB = V
DD
, others are opened
2.
OSC IN: 10.24MHz X-tal Connection
TlF: 27MHz 150rnVrms
RIF: 42MHz 150mVrms
MODE: V
DD
, SB = V
SS
, others are opened
Capacitor more than 2000pF should be connected between V
DD
& V
SS
4
10 CH PLL
S5T8803A
OUTPUT CHARACTERISTICS
LOCK
t
PD
t
PD
t
PD
: Phase Difference ( 6.25µs )
V
DD
V
SS
V
DD
V
SS
Reference
Divider
Programmable
Divider
LDT
2) UNLOCK
Reference Divider
Programmable
Divider
LDT
6.4ms
Floating
V
DD
V
SS
V
DD
V
SS
V
DD
Floating
Figure 1.
5
微控制器 MCU
