S71WS-J Based MCPs
Stacked Multi-Chip Product (MCP)
128/64 Megabit (8M/4M x 16-bit) CMOS 1.8 Volt-only,
Simultaneous Read/Write, Burst Mode Flash Memory
with CosmoRAM
Data Sheet
PRELIMINARY
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Publication Number
S71WS-J_04
Revision
A
Amendment
2
Issue Date
August 19, 2005
P r e l i m i n a r y
Notice On Data Sheet Designations
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S71WS-J Based MCPs
S71WS-J_04_A2 August 19, 2005
S71WS-J Based MCPs
Stacked Multi-Chip Product (MCP)
128/64 Megabit (8M/4M x 16-bit) CMOS 1.8 Volt-only,
Simultaneous Read/Write, Burst Mode Flash Memory
with CosmoRAM
Data Sheet
PRELIMINARY
Distinctive Characteristics
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General Description
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RI
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Flash Memory Density
256Mb
128Mb
64Mb
0E
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0E
0E
6:6-&
6:6-&
6:6-%
6:6-$
6:6-%
6:6-$
Publication Number
S71WS-J_04
Revision
A
Amendment
2
Issue Date
August 19, 2005
P r e l i m i n a r y
Product Selector Guide
Device-Model#
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6:6-%<
6:6-$$<
6:6-%$<
6:6-&$<
6:6-&7<
0E
0E
0E
Flash Density
pSRAM Density
0E
Flash Speed
(MHz)
pSRAM
Speed
(MHz/ns)
Supplier
&RVPR 5$0
&RVPR 5$0
0E
&RVPR 5$0
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&RVPR 5$0
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Package
Availability Status
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S71WS-J Based MCPs
S71WS-J_04_A2 August 19, 2005
P r e l i m i n a r y
S71WS-J Based MCPs
Notice On Data Sheet Designations . . . . . . . . . . . ii
Advance Information .......................................................................................ii
Preliminary ..........................................................................................................ii
Combination .......................................................................................................ii
Full Production (No Designation on Document) ...................................ii
MCP Features ........................................................................................................ 1
Persistent Protection Bit Lock ....................................................................... 38
Standby Mode ...................................................................................................... 39
Automatic Sleep Mode ..................................................................................... 39
RESET#: Hardware Reset Input ................................................................ 39
Output Disable Mode ...................................................................................40
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Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 2
MCP Block Diagram .............................................................................................6
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7
Lookahead Connection Diagram . . . . . . . . . . . . 10
Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 11
Ordering Information . . . . . . . . . . . . . . . . . . . . . . 12
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . . 14
TLA084—84-ball Fine-Pitch Ball Grid Array (FBGA)
8 x 11.6 mm Package ........................................................................................... 14
FTA084—84-ball Fine-Pitch Ball Grid Array
(FBGA) 8 x 11.6 mm Package ............................................................................15
TLC080—80-ball Fine-Pitch Ball Grid Array
(FBGA) 7 x 9 mm Package ............................................................................... 16
TSC080 - Fine-Pitch Ball Grid Array (FBGA) 7 x 9 mm Package .........17
Secured Silicon Sector Protection Bit ...................................................... 43
Hardware Data Protection ......................................................................... 43
Write Protect (WP#) .......................................................................................44
Low V
CC
Write Inhibit .................................................................................44
Write Pulse “Glitch” Protection ...............................................................44
Logical Inhibit ...................................................................................................44
Power-Up Write Inhibit ...............................................................................44
Common Flash Memory Interface (CFI) . . . . . . . 45
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Command Definitions . . . . . . . . . . . . . . . . . . . . . . 62
S29WS128/064J
General Description . . . . . . . . . . . . . . . . . . . . . . . .20
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 22
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Block Diagram of Simultaneous
Operation Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Input/Output Descriptions . . . . . . . . . . . . . . . . . . .24
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 25
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Reading Array Data ........................................................................................... 62
Set Configuration Register Command Sequence ..................................... 62
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Read Mode Setting ......................................................................................... 63
Programmable Wait State Configuration ............................................... 63
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Standard wait-state Handshaking Option ...............................................64
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Read Mode Configuration ...........................................................................64
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VersatileIO™ (V
IO
) Control .............................................................................25
Requirements for Asynchronous Read Operation (Non-Burst) ..........25
Requirements for Synchronous (Burst) Read Operation ...................... 26
8-, 16-, and 32-Word Linear Burst with Wrap Around ......................27
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Burst Active Clock Edge Configuration .................................................. 65
RDY Configuration ........................................................................................ 65
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Configuration Register ......................................................................................27
Handshaking ..........................................................................................................27
Simultaneous Read/Write Operations with Zero Latency ................... 28
Writing Commands/Command Sequences ................................................ 28
Accelerated Program Operation .................................................................. 28
Autoselect Mode ................................................................................................ 29
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Reset Command .................................................................................................66
Autoselect Command Sequence .................................................................... 67
Enter/Exit Secured Silicon Sector Command Sequence ......................... 67
Program Command Sequence ........................................................................68
Unlock Bypass Command Sequence ........................................................68
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Chip Erase Command Sequence ...................................................................69
Sector Erase Command Sequence ................................................................70
Erase Suspend/Erase Resume Commands ................................................... 71
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Sector/Sector Block Protection and Unprotection ................................. 30
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Sector Protection ...........................................................................................34
Persistent Sector Protection ...........................................................................34
Persistent Protection Bit (PPB) ..................................................................35
Persistent Protection Bit Lock (PPB Lock) .............................................35
Dynamic Protection Bit (DYB) ...................................................................35
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Persistent Sector Protection Mode Locking Bit ........................................37
Password Protection Mode .............................................................................37
Password and Password Mode Locking Bit ................................................37
64-bit Password ...................................................................................................38
Password Program Command ....................................................................... 72
Password Verify Command ............................................................................. 73
Password Protection Mode Locking Bit Program Command .............. 73
Persistent Sector Protection Mode Locking Bit
Program Command ........................................................................................... 73
Secured Silicon Sector Protection Bit Program Command .................. 73
PPB Lock Bit Set Command ............................................................................ 74
DPB Write/Erase/Status Command ............................................................. 74
Password Unlock Command .......................................................................... 74
PPB Program Command .................................................................................. 75
All PPB Erase Command .................................................................................. 75
PPB Status Command ....................................................................................... 75
PPB Lock Bit Status Command ...................................................................... 75
Command Definitions ....................................................................................... 76
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August 19, 2005 S71WS-J_04_A2
S71WS-J Based MCPs
3
