128/256 Mb (8/16 M x 16 bit) DDR DRAM on Split Bus
Data Sheet
(Advance Information)
Features
Power supply voltage of 1.7 V to 1.95 V
Burst Speeds
– Flash = 66 MHz, 80 MHz
– DRAM = 133 MHz
Packages
– 11.0 x 10.0 mm, 133-ball MCP
– 8.0 x 8.0 mm, 133-ball MCP
– 12.0 x 12.0 mm, 128-ball PoP
Operating Temperature of –25°C to +85°C
General Description
This document contains information on the S72NS-P MCP stacked products. Refer to the S29NS-P data sheet (S29NS-P_00)
for full electrical specifications of the Flash memory component.
The S72NS Series is a product line of stacked products (MCPs and PoPs), and consists of:
NS family multiplexed Flash memory die
DDR DRAM
The products covered by this document are listed in the tables below.
DRAM Density
Flash Density
128 Mb
256 Mb
512 Mb
128 Mb
S72NS128PD0
S72NS256PD0
S72NS512PD0
S72NS512PE0
256 Mb
For detailed specifications, please refer to the individual data sheets.
Density
128
DRAM5
SDRAM_07
Manufacturer
DRAM1
Publication Number
SDRAM_03
Density
256
Manufacturer
DRAM1
DRAM5
Publication Number
TBD
SDRAM_11
Publication Number
S72NS-P_00
Revision 01
Issue Date
September 6, 2006
This document contains information on one or more products under development at Spansion Inc. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion Inc. reserves the right to change or discontinue work on this proposed product without notice.
D a t a
S h e e t
( A d va n c e
I n fo r m a t i o n )
1.
Product Selector Guide
Device OPN
S72NS128PD0AJBGG
S72NS128PD0AJBGC
128 Mb
S72NS128PD0AJBLG
S72NS128PD0AJBLC
S72NS128PD0KJFGG
S72NS128PD0KJFGC
128 Mb
S72NS128PD0KJFLG
S72NS128PD0KJFLC
S72NS256PD0AJBGG
S72NS256PD0AJBGC
256 Mb
S72NS256PD0AJBLG
S72NS256PD0AJBLC
S72NS256PD0KJFGG
S72NS256PD0KJFGC
256 Mb
S72NS256PD0KJFLG
S72NS256PD0KJFLC
S72NS512PD0AJGGG
S72NS512PD0AJGGC
512 Mb
S72NS512PD0AJGLG
S72NS512PD0AJGLC
S72NS512PD0KJFGG
S72NS512PD0KJFGC
512 Mb
S72NS512PD0KJFLG
S72NS512PD0KJFLC
S72NS512PE0AJGGG
S72NS512PE0AJGGC
512 Mb
S72NS512PE0AJGLG
S72NS512PE0AJGLC
S72NS512PE0KJFGG
S72NS512PE0KJFGC
512 Mb
S72NS512PE0KJFLG
S72NS512PE0KJFLC
256 Mb
66
DRAM5
80
256 Mb
66
DRAM5
80
66
DRAM1
80
133
12.0 x 12.0mm 128-ball PoP
128 Mb
66
DRAM5
80
66
DRAM1
80
133
11.0 x 10.0mm 133-ball MCP
128 Mb
66
DRAM5
80
66
DRAM1
80
133
12.0 x 12.0mm 128-ball PoP
128 Mb
66
DRAM5
80
66
DRAM1
80
133
11.0 x 10.0mm 133-ball MCP
128 Mb
66
DRAM5
80
66
DRAM1
80
133
12.0 x 12.0mm 128-ball PoP
128 Mb
66
DRAM5
80
66
DRAM1
80
133
8.0 x 8.0mm133-ball MCP
128 Mb
66
DRAM5
80
66
DRAM1
80
133
12.0 x 12.0mm 128-ball PoP
Flash
Density
DDR DRAM
Density
Flash Speed
(MHz)
66
DRAM1
80
133
8.0 x 8.0mm133-ball MCP
DDR DRAM
Speed (MHz)
Supplier
Package
2
S72NS-P Based MCPs/PoPs
S72NS-P_00_01 September 6, 2006
D a t a
S h e e t
( A d va n c e
In fo r m a t i o n )
2. Product Block Diagram
F-RST#
F-ACC
F-WP#
F-CE#
F-OE#
F-WE#
AVD#
F-V
SS
F2-CE#
RST#
ACC
WP#
CE#
OE#
WE#
AVD#
V
SS
A15-A0
DQ15-DQ0
ADQ15-ADQ0
MUX
Flash
Memory
NS-P
CLK
RDY
F-CLK
F-RDY
Amax - A16
V
CC
V
CCQ
Amax - A16
F-V
CC
F-V
CCQ
D-RAS#
D-CAS#
D-BA0
D-BA1
D-CKE
D-WE#
D-CE#
D-Amax - D-A0
D-V
CC
D-V
CCQ
RAS#
CAS#
BA0
BA1
CKE
WE#
CE#
CLK
CLK#
DQS0
DQS1
D-CLK
D-CLK#
D-LDQS
D-UDQS
D-LDQM
D-UDQM
D-TEST
D-DQ15 - D-DQ0
D-V
SS
D-V
SSQ
DDR
DRAM
Memory
LDQM
UDQM
TEST
DQ15-DQ0
V
SS
V
SSQ
V
CC
V
CCQ
Notes:
1. Amax indicates highest address bit for memory component:
a. Amax = A24 for NS512P, A23 for NS256P, A22 for NS128P