INTEGRATED CIRCUITS
SA7016
1.3GHz low voltage fractional-N
synthesizer
Product specification
Supersedes data of 1999 Apr 20
1999 Nov 04
Philips
Semiconductors
Philips Semiconductors
Product specification
1.3GHz low voltage fractional-N synthesizer
SA7016
GENERAL DESCRIPTION
The SA7016 BICMOS device integrates programmable dividers,
charge pumps and a phase comparator to implement a
phase-locked loop. The device is designed to operate from 3 NiCd
cells, in pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at VCO input frequencies up to 1.3 GHz.
The synthesizer has fully programmable main and reference
dividers. All divider ratios are supplied via a 3-wire serial
programming bus.
Separate power and ground pins are provided to the analog and
digital circuits. The ground leads should be externally short-circuited
to prevent large currents flowing across the die and thus causing
damage. V
DDCP
must be greater than or equal to V
DD
.
The charge pump current (gain) is set by an external resistance at
the R
SET
pin
.
Only passive loop filters could be used; the charge
pump operates within a wide voltage compliance range to provide a
wider tuning range.
LOCK
TEST
V
DD
GND
RFin+
RFin–
GND
CP
PHP
1
2
3
4
5
6
7
8
16 PON
15 STROBE
14 DATA
13 CLOCK
12 REFin+
11 REFin–
10 R
SET
9
V
DDCP
SR01505
Figure 1. Pin Configuration
FEATURES
•
Low phase noise
•
Low power
•
Fully programmable main divider
•
Internal fractional spurious compensation
•
Hardware and software power down
•
Split supply for V
DD
and V
DDCP
QUICK REFERENCE DATA
SYMBOL
V
DD
V
DDCP
I
DDCP
+I
DD
I
DDCP
+I
DD
f
VCO
f
REF
f
PC
T
amb
Supply voltage
Analog supply voltage
Total supply current
Total supply current in power-down mode
Input frequency
Crystal reference input frequency
Maximum phase comparator frequency
Operating ambient temperature
PARAMETER
APPLICATIONS
•
350–1300 MHz wireless equipment
•
Cellular phones
•
Portable battery-powered radio equipment.
CONDITIONS
MIN.
2.7
TYP.
–
–
6.2
1
–
–
MAX.
5.5
5.5
7.3
–
1300
40
4
UNIT
V
V
mA
µA
MHz
MHz
MHz
°C
V
DDCP
≥
V
DD
2.7
–
–
350
5
–
–40
–
+85
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
SA7016DH
TSSOP16
DESCRIPTION
Plastic thin shrink small outline package; 16 leads; body width 4.4 mm
VERSION
SOT403–1
1999 Nov 04
2
853–2160 22634
Philips Semiconductors
Product specification
1.3GHz low voltage fractional-N synthesizer
SA7016
GND
4
13
CLOCK
DATA
14
2–BIT SHIFT
REGISTER
22–BIT SHIFT
REGISTER
PUMP
CURRENT
SETTING
PUMP
BIAS
10
R
SET
STROBE
15
ADDRESS DECODER
CONTROL
LATCH
9
LOAD SIGNALS
LATCH
5
RFin+
RFin–
6
MAIN DIVIDER
PHASE
DETECTOR
8
V
DDCP
COMP
PHP
AMP
7
LATCH
12
REF
in+
REF
in–
11
16
TEST
2
3
V
DD
PON
REFERENCE
DIVIDER
GND
CP
1
LOCK
SR01506
Figure 2. Block Diagram
PINNING
SYMBOL
LOCK
TEST
V
DD
GND
RFin+
RFin–
GND
CP
PHP
V
DDCP
R
SET
REFin–
REFin+
CLOCK
DATA
STROBE
PON
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DESCRIPTION
Lock detect output
Test (should be either grounded or
connected to V
DD)
Digital supply
Digital ground
RF input to main divider
RF input to main divider
Charge pump ground
Main normal chargepump
Charge pump supply voltage
External resistor from this pin to ground
sets the chargepump current
Reference input
Reference input
Programming bus clock input
Programming bus data input
Programming bus enable input
Power down control
1999 Nov 04
3
Philips Semiconductors
Product specification
1.3GHz low voltage fractional-N synthesizer
SA7016
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
DD
V
DDCP
∆V
DDCP
–V
DD
V
n
V
1
∆V
GND
T
stg
T
amb
T
j
Digital supply voltage
Analog supply voltage
Difference in voltage between V
DDCP and
V
DD
(V
DDCP
≥
V
DD
)
Voltage at pins 1, 2, 5, 6, 11 to 16
Voltage at pin 8, 9
Difference in voltage between GND
CP
and GND (these pins should
be connected together)
Storage temperature
Operating ambient temperature
Maximum junction temperature
PARAMETER
–0.3
–0.3
–0.3
–0.3
–0.3
–0.3
–55
–40
MIN.
+5.5
+5.5
+2.8
V
DD
+ 0.3
V
DDCP
+ 0.3
+0.3
+125
+85
150
MAX.
V
V
V
V
V
V
_C
_C
_C
UNIT
Handling
Inputs and outputs are protected against electrostatic discharge in
normal handling. However, to be totally safe, it is desirable to take
normal precautions appropriate to handling MOS devices.
THERMAL CHARACTERISTICS
SYMBOL
R
th j–a
PARAMETER
Thermal resistance from junction to ambient in free air
VALUE
120
UNIT
K/W
1999 Nov 04
4
Philips Semiconductors
Product specification
1.3GHz low voltage fractional-N synthesizer
SA7016
CHARACTERISTICS
V
DDCP
= V
DD
= +3.0V, T
amb
= +25°C; unless otherwise specified.
SYMBOL
Supply; pins 3, 9
V
DD
V
DDCP
I
DDTotal
I
Standby
Digital supply voltage
Analog supply voltage
Synthesizer operational total supply current
Total supply current in power-down mode
V
DDCP
= V
DD
V
DD
= +3.0V
logic levels 0 or V
DD
2.7
2.7
–
–
–
–
6.2
1
5.5
5.5
7.3
TBD
V
V
mA
µA
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
RFin main divider input; pins 5, 6
f
VCO
V
RFin(rms)
VCO input frequency
AC-coupled input signal level
R
in
(external) = R
s
= 50Ω;
single-ended drive;
max. limit is indicative
@ 500 to 1300 MHz
f
VCO
= 1.2 GHz
f
VCO
= 1.2 GHz
350
–18
–
–
1300
0
MHz
dBm
Z
IRFin
C
IRFin
N
main
f
PCmax
Input impedance (real part)
Typical pin input capacitance
Main divider ratio
Maximum loop comparison frequency
–
–
512
625
1.0
–
–
–
–
65535
4
Ω
pF
indicative, not tested
–
MHz
Reference divider input; pins 11, 12
f
REFin
VRFin
Z
REFin
C
REFin
R
REF
Input frequency range from TCXO
AC-coupled input signal level
Input impedance (real part)
Typical pin input capacitance
Reference division ratio
single-ended drive;
max. limit is indicative
f
REF
= 20 MHz
f
REF
= 20 MHz
5
360
–
–
4
–
–
10
1.0
–
40
1300
–
–
1023
MHz
mV
PP
kΩ
pF
Charge pump current setting resistor input; pin 10
R
SET
V
SET
External resistor from pin to ground
Regulated voltage at pin
R
SET
=7.5 kΩ
6
–
7.5
1.25
15
–
kΩ
V
Charge pump outputs (including fractional compensation pump); pin 8; R
SET
=7.5kΩ, FC=80
I
CP
I
MATCH
I
ZOUT
I
LPH
V
PH
Charge pump current ratio to I
SET1
Sink-to-source current matching
Output current variation versus V
PH2
Charge pump off leakage current
Charge pump voltage compliance
Current gain I
PH
/I
SET
V
PH
=1/2 V
DDCP
.
V
PH
in compliance range
V
PH
=1/2 V
CC
–15
–10
–10
–10
0.7
–
+15
+10
+10
+10
V
DDCP
–0.8
%
%
%
nA
V
1999 Nov 04
5
