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SAA6752HS/V104

IC SPECIALTY CONSUMER CIRCUIT, PQFP208, 28 X 28 MM, 3.40 MM HEIGHT, MS-029, SOT-316-1, PLASTIC, SQFP-208, Consumer IC:Other

器件类别:其他集成电路(IC)    消费电路   

厂商名称:NXP(恩智浦)

厂商官网:https://www.nxp.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
NXP(恩智浦)
零件包装代码
QFP
包装说明
FQFP, QFP208,1.2SQ,20
针数
208
Reach Compliance Code
unknown
商用集成电路类型
CONSUMER CIRCUIT
JESD-30 代码
S-PQFP-G208
长度
28 mm
湿度敏感等级
3
功能数量
1
端子数量
208
最高工作温度
70 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
FQFP
封装等效代码
QFP208,1.2SQ,20
封装形状
SQUARE
封装形式
FLATPACK, FINE PITCH
电源
2.5,3.3 V
认证状态
Not Qualified
座面最大高度
4.1 mm
最大供电电压 (Vsup)
2.7 V
最小供电电压 (Vsup)
2.3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子形式
GULL WING
端子节距
0.5 mm
端子位置
QUAD
宽度
28 mm
文档预览
INTEGRATED CIRCUITS
DATA SHEET
SAA6752HS
MPEG-2 video and
MPEG-audio/AC-3 audio encoder
with multiplexer
Product specification
Supersedes data of 2002 Dec 09
2004 Jan 26
Philips Semiconductors
Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
CONTENTS
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
2
2.1
2.2
3
4
5
6
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
FEATURES
Video input and preprocessing
Video compression
Audio input
Audio compression
Stream multiplexer
Output interface
Control domain
Other features
GENERAL DESCRIPTION
General
Application fields
QUICK REFERENCE DATA
ORDERING INFORMATION
BLOCK DIAGRAM
PINNING
FUNCTIONAL DESCRIPTION
System operation
Digital video input
Video compression
Digital audio input
Audio compression
SDRAM interface
Multiplexer
MPEG stream output port
Clock generation
Power control and reset
I
2
C-bus interface
Exception handling
15
16
17
18
8
8.1
8.2
9
10
11
12
13
14
14.1
14.2
14.3
14.4
14.5
SAA6752HS
BOUNDARY SCAN TEST
Initialization of boundary scan circuit
Device identification codes
I
2
C-BUS CONTROL AND STATUS
REGISTERS
LIMITING VALUES
THERMAL CHARACTERISTICS
CHARACTERISTICS
PACKAGE OUTLINE
SOLDERING
Introduction to soldering surface mount
packages
Reflow soldering
Wave soldering
Manual soldering
Suitability of surface mount IC packages for
wave and reflow soldering methods
DATA SHEET STATUS
DEFINITIONS
DISCLAIMERS
PURCHASE OF PHILIPS I
2
C COMPONENTS
2004 Jan 26
2
Philips Semiconductors
Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
1
1.1
FEATURES
Video input and preprocessing
SAA6752HS
Digital YUV input according to
“ITU-R BT.656”
(8 bits at
27 MHz) and
“ITU-R BT.601”
Support of enhanced
“ITU-R BT.656”
input format
containing decoded VBI data readable via I
2
C-bus;
Closed Caption (CC), Wide Screen Signalling (WSS)
and copyright information with Copy Generation
Management System (CGMS)
Processing of non-broadcast video signals from analog
VCR according to IEC 756
Two video clock input pins for switching two digital video
sources
“ITU-R BT.601”
format conversion to 1/2D1, 2/3D1 and
Standard Interchange Format (SIF)
4 : 2 : 2 to 4 : 2 : 0 colour format conversion
Decimation filtering for all format conversions
Adaptive median filter and motion compensated filter for
input noise reduction.
1.2
Video compression
1.3
Audio input
Audio inputs: I
2
S format or EIAJ format (16, 18 or
20 bits), master or slave mode at 32, 44.1 and 48 kHz
Two digital I
2
S input ports for selection between two
digital audio sources
Audio clock generation: 256f
s
or 384f
s
(where
f
s
= 48 kHz) locked to video frame rate (if video is
present and locking is enabled)
Sample rate conversion to 48 kHz (locked to video
frame rate if enabled) for slave mode operation in all
modes except Digital Versatile Disc (DVD) compliant
bypass.
1.4
Audio compression
Real-time MPEG-2 encoding compliant to Main Profile
at Main Level (MP@ML) for 625 and 525 interlaced line
systems
Supported resolutions: D1, 2/3D1, 1/2D1 and SIF
IPB frame, IP frame and I frame only encoding
supported at all modes
Supported bit rates: up to 25 Mbit/s I-only encoding;
up to 15 Mbit/s IP-only or IBP encoding.
Variable video bit rate mode for constant picture quality
and constant bit rate mode to gain optimum picture
quality from a fixed channel transfer rate
Access to bit rate control parameters whilst encoding to
support external real-time control algorithms (e.g.
constrained variable bit rate control)
Programmable Group Of Pictures (GOP) structure
Innovative motion estimation with wide search range
Adaptive quantization
Motion compensated noise filter.
Dolby
®(1)
Digital Consumer Encoding (DDCE) also
known as AC-3
(2)
2 channel audio encoding at
256 kbit/s or 384 kbit/s (only for SAA6752HS/V103)
MPEG-1 layer 2 audio encoding at 256 kbit/s or
384 kbit/s
Input data bypass for Linear Pulse Code Modulation
(LPCM) and compressed audio data [MPEG-1,
MPEG-2, Dolby
®
Digital (DD) and Digital Theatre
System (DTS)] according to IEC 61937
Preamble Pc, Preamble Pd and bit stream information
captured for identification of modes during bypass of
compressed audio data for MPEG-1, MPEG-2, DD and
DTS according to IEC 61937
Audio mute via I
2
C-bus control for all modes except
DVD-compliant bypass.
(1) Dolby is a registered trademark of Dolby Laboratories
Licensing Corporation.
(2) AC-3 is a registered trademark of Dolby Laboratories
Licensing Corporation.
2004 Jan 26
3
Philips Semiconductors
Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
1.5
Stream multiplexer
2
2.1
GENERAL DESCRIPTION
General
SAA6752HS
Multiplexing of video and audio streams according to the
MPEG-2 systems standard (“ISO
13818-1”)
Generation and output of MPEG-2 Transport Streams
(TS), MPEG-2 Program Streams (PS), Packetized
Elementary Streams (PES) and Elementary Streams
(ES) compliant to the DVD, D-VHS and DVB standards
MPEG time stamp (PTS/DTS/SCR/PCR) generation
and insertion (synchronization)
Insertion of metadata
Optional generation of empty time slots for subsequent
insertion of application specific data packets
Optional insertion of user data in the GOP header and in
the picture header
Optional automatic insertion of Closed Caption data
according to DVD or ATSC standard
Optional generation of transport streams with variable
bit rate.
1.6
Output interface
Philips Semiconductors’ second generation real time
MPEG-2 encoder, the SAA6752HS, is a highly integrated
single-chip audio and video encoding solution with flexible
multiplexing functionality. With our expertise in two critical
areas for consumer video encoding, noise filtering and
motion estimation, we have pushed the boundaries for
video quality even further, providing enhanced quality for
low bit rates and enabling increased recording times for a
given storage capacity. The SAA6752HS will also enable
a key driver for new consumer digital recording
applications and system cost reduction. By integrating all
audio encoding and multiplexing functionality we will be
moving from a three chip to a one chip system, with cost
efficient design and process technology, thus providing a
truly low cost, high quality encoding system.
The SAA6752HS/V104 is intended for customers whose
application does not require the DDCE function.
The SAA6752HS gives significant advantages to
customers developing digital recording applications:
Fast time-to-market and low development
resources.
By adding a simple external video input
processor IC, an audio analog-to-digital converter, and
an external SDRAM, analog video and audio sources
are compressed into high quality MPEG-2 video and
MPEG-1 layer 2 or AC-3 audio streams, multiplexed into
a single program or transport stream for simple
connection to various storage media or broadcast
media. Hence, making design effort for our customers a
minimum, as well as removing the need for in-depth
experience in MPEG encoding.
Low system host resources.
All video and audio
encoding algorithms and software are run on an internal
MIPS
®(1)
processor. The SAA6752HS only requires a
small amount of communication from the system host
processor to set up and control required encoding
parameters via the I
2
C-bus.
Parallel interface 8-bit master/slave output
3-state output port
Glueless interfacing with IEEE 1394 chip sets (for
example, PDI 1394 L11)
Data Expansion Bus Interface (DEBI) interface.
1.7
Control domain
All control done via I
2
C-bus
I
2
C-bus slave transceiver up to 400 kbit/s
I
2
C-bus slave address select pin
Host interrupt flag pin.
1.8
Other features
Single external clock or single crystal 27 MHz
Separate 27 MHz system clock output
Interface voltage 3.3 V
TTL compatible digital outputs
Power supply voltage 3.3 and 2.5 V
Boundary Scan Test (BST) supported
Power-down mode
Single SDRAM system memory (16 Mbit@16 bit or
64 Mbit@16 bit).
(1) MIPS is a registered trademark of MIPS Technologies.
2004 Jan 26
4
Philips Semiconductors
Product specification
MPEG-2 video and MPEG-audio/AC-3
audio encoder with multiplexer
2.2
2.2.1
Application fields
DVD
BASED OPTICAL DISC RECORDERS
(DVD+RW,
DVD-RW, DVD-RAM)
2.2.3
SAA6752HS
D
IGITAL
VCR (DVHS)
RECORDING
Emerging optical disc based recording systems target to
replace the existing consumer recording (VCR) and
playback (DVD and VCD) products. The first generation
recordable DVD based products will want to maximise
recording times for the 4.7 Gbyte storage capacity. For
these systems the SAA6752HS is critical, with its superior
noise filtering and motion estimation, in enabling high
quality at low bit rates.
Playback compatibility with existing DVD decoding
solutions will also be important, which is why the
SAA6752HS provides Dolby
®
digital consumer (AC-3)
audio encoding to allow playback through existing players
implementing DDCE (AC-3) decoding dominant in current
DVD platforms.
The DVD stream is based on MPEG Program Stream
(PS). The SAA6752HS directly outputs MPEG PS
compliant to the DVD standard.
2.2.2
HDD
BASED TIME SHIFT RECORDING
A DVHS player records streams based on MPEG
Transport Streams (TS) packed in logical tape tracks. The
SAA6752HS output streams are compliant with DVHS
standard requirements.
2.2.4
V
IDEO EDITING
/
TRANSMISSION
/
SURVEILLANCE
/
CONFERENCING
The SAA6752HS can operate as a stand-alone device in
all the above applications. The SAA6752HS full features
and flexibility allows customers to tailor functionality and
performance to specific application requirements. All
required control settings such as GOP size and bit rate
modes can be selected via the I
2
C-bus.
Hard Disc Drive (HDD) based time-shift systems enable
Personalized TV (PTV) functionality, providing consumers
with new powers of control over what and when to watch
broadcast content. With the audio and video content
recorded digitally, identification, search and retrieval
becomes a ‘no brainer’ task as compared to traditional
VCR functionality. Combine this with electronic program
guides and intelligent control, and the PTV can also
analyse the viewers watching habits to search for
programs likely to be of interest and automatically
recorded in anticipation of the viewers preferences.
Since HDD recorders are closed systems, the recording
format stream can be proprietary. The SAA6752HS
flexible multiplexing formats support a number of recording
stream formats for HDD including MPEG Transport
Stream (TS) or MPEG Packetized Elementary Stream
(PES).
2004 Jan 26
5
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参数对比
与SAA6752HS/V104相近的元器件有:SAA6752HS/V104,557、SAA6752HS/V103,557、SAA6752HS/V103。描述及对比如下:
型号 SAA6752HS/V104 SAA6752HS/V104,557 SAA6752HS/V103,557 SAA6752HS/V103
描述 IC SPECIALTY CONSUMER CIRCUIT, PQFP208, 28 X 28 MM, 3.40 MM HEIGHT, MS-029, SOT-316-1, PLASTIC, SQFP-208, Consumer IC:Other IC AUD/VID ENCODER MPEG 208-SQFP IC AUD/VID ENCODER MPEG 208-SQFP IC SPECIALTY CONSUMER CIRCUIT, PQFP208, 28 X 28 MM, 3.40 MM HEIGHT, MS-029, SOT-316-1, PLASTIC, SQFP-208, Consumer IC:Other
零件包装代码 QFP QFP QFP QFP
包装说明 FQFP, QFP208,1.2SQ,20 FQFP, FQFP, 28 X 28 MM, 3.40 MM HEIGHT, MS-029, SOT-316-1, PLASTIC, SQFP-208
针数 208 208 208 208
Reach Compliance Code unknown unknown unknown unknown
商用集成电路类型 CONSUMER CIRCUIT CONSUMER CIRCUIT CONSUMER CIRCUIT CONSUMER CIRCUIT
JESD-30 代码 S-PQFP-G208 S-PQFP-G208 S-PQFP-G208 S-PQFP-G208
长度 28 mm 28 mm 28 mm 28 mm
功能数量 1 1 1 1
端子数量 208 208 208 208
最高工作温度 70 °C 70 °C 70 °C 70 °C
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 FQFP FQFP FQFP FQFP
封装形状 SQUARE SQUARE SQUARE SQUARE
封装形式 FLATPACK, FINE PITCH FLATPACK, FINE PITCH FLATPACK, FINE PITCH FLATPACK, FINE PITCH
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 4.1 mm 4.1 mm 4.1 mm 4.1 mm
最大供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V
最小供电电压 (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V
表面贴装 YES YES YES YES
温度等级 COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
端子形式 GULL WING GULL WING GULL WING GULL WING
端子节距 0.5 mm 0.5 mm 0.5 mm 0.5 mm
端子位置 QUAD QUAD QUAD QUAD
宽度 28 mm 28 mm 28 mm 28 mm
厂商名称 NXP(恩智浦) - NXP(恩智浦) NXP(恩智浦)
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