Philips Semiconductors Linear Products
Product specification
8-Bit
µp-compatible
D/A converter
NE/SE5018/5019
DESCRIPTION
The NE/SE5018/19 is a complete 8-bit digital-to-analog converter
subsystem on one monolithic chip. The data inputs have input
latches which are controlled by a latch enable pin. The data and
latch enable inputs are ultra-low loading for easy interfacing with all
logic systems. The latches appear transparent when the LE input is
in the low state. When LE goes high, the input data present at the
moment of transition is latched and retained until LE again goes low.
This feature allows easy compatibility with most microprocessors.
The chip also comprises a stable voltage reference (5V nominal)
and high slew rate buffer amplifier. The voltage reference may be
externally trimmed with a potentiometer for easy adjustment of
full-scale while maintaining a low temperature coefficient.
The output of the buffer amplifier may be offset so as to provide
bipolar as well as unipolar operation.
PIN CONFIGURATIONS
F, N Packages
DIGITAL GND 1
DB0(LSB) 2
DB1 3
DB2 4
DB3 5
DB4 6
DB5 7
DB6 8
DB7(MSB) 9
LE 10
NC 11
22 ANALOG GND
21 AMP COMP
20 SUM MODE
19 V
CC+
18 V
OUT
17 V
CC–
16 DAC COMP
15 BIPOLAR
OFFSET R
14 V
REF
IN
13 V
OUT
REF
12 V
REF
ADJ
D Package
1
FEATURES
•
8-bit resolution
•
Input latches
•
Low-loading data inputs
•
On-chip voltage reference
•
Output buffer amplifier
•
Accurate to
±
LSB (0.19%)
•
Monotonic to 8 bits
•
Amplifier and reference both short-circuit protected
•
Compatible with 8085, 6800 and many other
µPs
APPLICATIONS
DIGITAL GND 1
DB0(LSB) 2
DB1 3
DB2 4
DB3 5
DB4 6
DB5 7
DB6 8
DB7(MSB) 9
NC 10
LE 11
V
REF
ADJ 12
NOTE:
1. SOL and non-standard pinout
24 ANALOG GND
23 AMP COMP
22 SUM MODE
21 V
CC+
20 V
OUT
19 NC
18 V
CC–
17 DAC COMP
16 BIPOLAR
OFFSET
15 NC
14 V
REF
IN
13 V
REF
OUT
•
Precision 8-bit D/A converters
•
A/D converters
•
Programmable power supplies
•
Test equipment
•
Measuring instruments
•
Analog-digital multiplication
ORDERING INFORMATION
DESCRIPTION
22-Pin Ceramic Dual In-Line Package (CERDIP)
22-Pin Ceramic Dual In-Line Package (CERDIP)
22-Pin Plastic Dual In-Line Package (DIP)
22-Pin Plastic Dual In-Line Package (DIP)
24-Pin Small Outline Large (SOL) Package
TEMPERATURE RANGE
0 to +70°C
-55°C to +125°C
0 to +70°C
-55°C to +125°C
0 to +70°C
ORDER CODE
NE5018/5019F
SE5018/5019F
NE5018/5019N
SE5018/5019N
NE5018/5019D
DWG #
0585B
0585B
0409B
0409B
0173D
August 31, 1994
751
853-0845 13721
Philips Semiconductors Linear Products
Product specification
8-Bit
µp-compatible
D/A converter
NE/SE5018/5019
BLOCK DIAGRAM
(19)
V
CC+
V
REF
(13) OUT
V
REF
(12) ADJ
5k
5k
15k
(10)
LE
(1)
(9) (8) (7) (6) (5) (4) (3) (2) DIGITAL
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
GND
MSB
LSB
LATCHES AND
SWITCH DRIVERS
(20) SUM
NODE
(18)
(21)
V
OUT
+
–
5k
DAC CURRENT
OUTPUT
+
–
INT
V
REF
AMP
COMP
(22) ANALOG
GND
DAC SWITCHES
(14)
V
REF
IN
5k
(15) BIPOLAR
OFFSET
5k
+
–
DAC
(16) COMP
V
CC–
(17)
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
CC
+
V
CC
-
V
IN
V
REF IN
V
REF
ADJ
V
SUM
I
REF SC
I
OUTSC
P
D
Positive supply voltage
Negative supply voltage
Logic input voltage
Voltage at V
REF
input
Voltage at V
REF
adjust
Voltage at sum node
Short-circuit current to ground at V
REF OUT
Short-circuit current to ground or either supply at V
OUT
Maximum power dissipation, T
A
=25°C (still-air)
1
F package
N package
D package
T
A
Operating temperature range
SE5018
NE5018
T
STG
T
SOLD
Storage temperature range
Lead soldering temperature
(10 seconds)
NOTES:
1. Derate above 25°C at the following rates:
F package at 13.9mW/°C
N package at 17.5mW/°C
D package at 12.8mW/°C
300
°C
-55 to +125
0 to +70
-65 to +150
°C
°C
°C
1740
2190
1600
mW
mW
mW
PARAMETER
RATING
18
-18
0 to 18
12
0 to V
REF
12
Continuous
Continuous
UNIT
V
V
V
V
V
V
August 31, 1994
752
Philips Semiconductors Linear Products
Product specification
8-Bit
µp-compatible
D/A converter
NE/SE5018/5019
DC ELECTRICAL CHARACTERISTICS
V
CC
+=+15V, V
CC
-=-15V, SE5018. -55°C≤T
A
≤125°C,
NE5018. 0°C≤T
A
≤70°C,
unless otherwise specified.
1
Typical values are specified at 25°C.
SYMBOL
PARAMETER
Resolution
Monotonicity
Relative accuracy
V
CC
+
V
CC
-
V
IN(1)
V
IN(0)
I
IN(1)
I
IN(0)
V
FS
Positive supply voltage
Negative supply voltage
Logic “1” input voltage
Logic “0” input voltage
Logic “1” input current
Logic “0” input current
Full-scale output
Pin 1=0V
Pin 1=0V
Pin 1=0V, 2V<V
IN
<18V
Pin 1=0V, -5V<V
IN
<0.8V
Unipolar mode,
V
REF
=5.000V,
all bits high, T
A
=25°C
+V
FS
Full-scale output
Bipolar mode, V
REF
=5.000V
all bits high, T
A
=25°C
Bipolar mode,
V
REF
=5.000V,
all bits low, T
A
=25°C
V
ZS
Zero-scale Output
Unipolar mode,
V
REF
=5.000V
all bits low, T
A
=25°C
I
OS
PSR+
(OUT)
PSR-
(OUT)
TC
FS
TC
ZS
I
REF
I
REFSC
PSR+
(REF)
PSR-
(REF)
V
REF
TC
REF
Z
IN
I
CC
+
I
CC
-
P
D
Output short circuit current
Output power supply
rejection (+)
Output power supply
rejection (-)
Full-scale temperature
coefficient
Zero-scale temperature coefficient
Reference output current
Reference short circuit current
Reference power supply rejection
(+)
Reference power supply rejection
(-)
Reference voltage
Reference voltage temperature co-
efficient
DAC V
REF IN
input impedance
Positive supply current
Negative supply current
Power dissipation
T
A
=25°C
V
REF OUT
=0V
V-=-15V, 13.5V≤V+≤16.5V,
I
REF
=1.0mA
V+=-15V, -13.5V≤V-≤16.5V,
I
REF
=1.0mA T
A
=25°C
I
REF
=1.0mA
I
REF
=1.0mA, T
A
=25°C
V
CC
+=15V
V
CC
-=-15V
I
REF
=1.0mA, V
CC
=±15V
4.15
4.9
15
0.003
0.003
5.0
60
5.0
7
-10
255
5.85
14
-15
435
4.15
T
A
=25°C
V
OUT
=0V
V-=-15V, 13.5V≤V+≤16.5V,
external V
REF IN
=5.000V
V+=-15V, -13.5V≤V-≤-16.5V,
0.001
external V
REF IN
=5.000V
V
REF IN
=5.000V
20
5
3
30
0.01
0.01
5.25
4.9
15
0.003
0.003
5.0
60
5.0
7
-10
255
5.85
14
-15
435
20
5
3
30
0.01
0.01
5.25
0.01
0.001
0.01
15
0.001
40
0.01
15
0.001
40
0.01
mA
%FS
%VS
%FS
%VS
ppm/°C
ppm/°C
mA
mA
%VR/%VS
%VR/%VS
V
ppm/°C
kΩ
mA
mA
mW
-30
+30
-30
+30
mV
-5.25
-4.75
-5.25
-4.75
V
4.75
5.25
4.75
5.25
V
9.50
0.1
-2.0
11.4
-11.4
2.0
0.8
10
-10
10.5
9.50
0.1
-2.0
15
-15
TEST CONDITIONS
NE/SE5018
Min
8
8
Typ
8
8
Max
8
8
±0.19
11.4
-11.4
2.0
0.8
10
-10
10.5
15
-15
Min
8
8
NE/SE5019
Typ
8
8
Max
8
8
±0.1
UNIT
Bits
Bits
%FS
V
V
V
V
µA
µA
V
-V
FS
Negative full scale
NOTES:
1. Refer to Figure 1.
August 31, 1994
753
Philips Semiconductors Linear Products
Product specification
8-Bit
µp-compatible
D/A converter
NE/SE5018/5019
AC ELECTRICAL CHARACTERISTICS
1
V
CC
=
±15V,
T
A
= 25°C
SYMBOL
t
SLH
t
SHL
t
PLH
t
PHL
t
PLSB
t
PLH
t
PHL
t
S
t
H
t
PW
PARAMETER
Settling time
Settling time
Propagation delay
Propagation delay
Propagation delay
Propagation delay
Propagation delay
Setup time
Hold time
Latch enable pulse width
TO
±1/2LSB
±1/2LSB
Output
Output
Output
Output
Output
LE
Input
FROM
Input
Input
Input
Input
Input
LE
LE
Input
LE
TEST CONDITIONS
All bits low-to-high
2
All bits high-to-low
3
All bits switched low-to-high
2
All bits switched high-to-low
3
1 LSB change
2, 3
Low-to-high transition
4
High-to-low transition
5
1, 6
1, 6
1, 6
NE/SE5018/19
Min
Typ
1.8
2.3
300
150
150
300
150
100
50
150
Max
UNIT
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. Refer to Figure 2.
2. See Figure 5.
3. See Figure 6.
4. See Figure 7.
5. See Figure 8.
6. See Figure 9.
7. For reference currents>3mA, use of an external buffer is required.
LE
MSB
LSB
V
CC+
0.47µF
LE
MSB
LSB
V
CC+
0.47µF
5.000V
98 76 543 2
10
14 V
REF
IN
13 V
REF
OUT
12
5018
19
DIG GND 1
ANA GND 22
OUTPUT
V
OUT
18
SUM 20
15
AMP 21
COMP
1N914
100pF
22pF
2k
98 76 543 2
10
14
13
12
5018
19
DIG GND 1
ANA GND 22
OUTPUT
V
OUT
18
SUM 20
15
AMP 21
COMP
1N914
100pF
22pF
2k
DAC
COMP
16
17
DAC
COMP
16
17
0.01µF
V
CC–
0.1µF
0.01µF
V
CC–
0.1µF
Figure 1. DC Parametric Test Configuration
V
CC+
Figure 2. AC Parametric Test Configuration
LSB
LE
MSB
0.47µF
98 76 543 2
10
14 V
REF
IN
10k
10T
80k
DAC
COMP
16
17
13 V
REF
OUT
12 V
REF
ADJ
5018
19
DIG GND 1
ANA GND 22
OUTPUT
V
OUT
18
SUM 20
15
AMP 21
COMP
1N914
100pF
22pF
2k
FULL SCALE
ADJUST
0.01µF
V
CC–
0.1µF
V
CC+
1M
20k
10T
V
CC–
ZERO SCALE
ADJUST
Figure 3. Full-/Zero-Scale Adjust — Unipolar Output (0–10V)
August 31, 1994
754
Philips Semiconductors Linear Products
Product specification
8-Bit
µp-compatible
D/A converter
NE/SE5018/5019
LE
MSB
LSB
V
CC+
0.47µF
98 76 543 2
10
14 V
REF
IN
10k
10T
80k
DAC
COMP
BIP OFFSET
17
16
15
13 V
REF
OUT
12 V
REF
ADJ
5018
19
DIG GND 1
ANA GND 22
OUTPUT
V
OUT
18
SUM 20
AMP 21
COMP
1N914
100pF
22pF
2k
0.01µF
V
CC–
0.1µF
V
CC+
1M
20k
10T
V
CC–
ZERO SCALE
ADJUST
Figure 4. Bipolar Output Operation (–5 to +5V)
DATA
DATA
t
SLH
10V
t
PLH
OUTPUT
1LSB
10V
0V
LE = LOW
OUTPUT
0V
DATA
DATA
t
SHL
10V
t
PHL
LE
OUTPUT
t
PHL
0V
LE = LOW
OUTPUT
0V
1LSB
10V
Figure 6. Settling Time and Propagation Delay,
High-to-Low Data
Figure 8. Propagation Delay, Latch Enable to Output
August 31, 1994
755
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
Figure 5. Settling Time and Propagation Delay,
Low-to-High Data
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
LE
t
PLH
Figure 7. Propagation Delay, Latch Enable to Output
t
PHL
