Crystal oscillator
CRYSTAL OSCILLATOR
PROGRAMMABLE
OUTPUT : CMOS
CE, LB, CA
Product Number (please contact us)
SG - 8002
series
•Frequency
range
•Supply
voltage
•Function
:
1 MHz to 125 MHz
:
3.0 V / 3.3 V / 5.0 V
:
Output enable(OE) or Standby(
ST
)
•Short
mass production lead time by PLL technology.
•SG-Writer
available to purchase,
please contact Epson or local sales representative.
Specifications (characteristics)
Item
Symbol
Specifications
*2
PT
/
ST
PH
/
SH
PC
/
SC
1 MHz to 125 MHz
-
1 MHz to 80 MHz
-
-
1 MHz to 125 MHz
-
-
1 MHz to 66.7 MHz
-
-
4.5 V to 5.5 V
2.7 V to 3.6 V
-55
°C
to +125 °
C
(SG-8002CA / JA / DC / DB)
-55
°C
to +100 °
C
(SG-8002JC)
-40
°C
to +125 °
C
(SG-8002CE / LB)
-20
°C
to +70 ° / -40
°C
to +85 °
C
C
B:
±50 ×
10
-6
, C:
±100 ×
10
-6
M:
±100 ×
10
-6
M:
±100 ×
10
-6
-
L:±50 × 10
-6
L:±50 × 10
-6
40 mA Max.
(SG-8002CE)
30 mA Max.
-
28 mA Max.
(SG-8002LB)
45 mA Max.
(SG-8002CA / JC / JA / DC / DB)
Conditions / Remarks
V
CC
= 4.5 V to 5.5 V (except SG-8002LB)
V
CC
= 4.5 V to 5.5 V (SG-8002LB only)
V
CC
= 3.0 V to 3.6 V
V
CC
= 2.7 V to 3.6 V
Output frequency range
Supply voltage
Storage temperature
Operating temperature*1
Frequency tolerance
f
0
V
CC
T_stg
T_use
f_tol
Storage as single product.
-20
°C
to +70
°C
-40
°C
to +85
°C
(except SG-8002JC) *3
-40
°C
to +85
°C
(SG-8002LB only) *3
No load condition, Max. frequency
Current consumption
I
CC
Output disable current
Stand-by current
I_dis
I_std
-
30 mA Max.
25 mA Max.
50 µA Max.
-
16 mA Max.
16 mA Max.
OE=GND (PT.PH,PC) (except SG-8002LB)
OE=GND (PH,PC) (SG-8002LB only)
ST
=GND (ST,SH,SC)
TTL load: 1.4 V, Max. load condition
(except SG-8002LB)
CMOS load:50 % V
CC
level, Max. load condition
(except SG-8002LB)
50 % V
CC
, L_CMOS=15 pF,
≤80
MHz (SG-8002LB)
50 % V
CC
, L_CMOS=15 pF, V
CC
=3.0 V to 3.6 V,
≤125
MHz
(SG-8002LB)
50 % V
CC
, L_CMOS=15 pF, V
CC
=2.7 V to 3.6 V,
≤66.7
MHz
(SG-8002LB)
40 % to 60 %
-
40 % to 60 %
40 % to 60 %
-
-
-
Symmetry
*1
SYM
-
-
-
40 % to 60 %
40 % to 60 %
Output voltage
Output load condition
(TTL) *1
V
OH
V
OL
5 TTL Max.
L_TTL
5 TTL Max.
45 % to 55 %
V
CC
-0.4 V Min.
0.4 V Max.
-
-
15 pF Max.
Output load condition
(CMOS) *1
L_CMOS
-
15 pF Max.
25 pF Max
15 pF Max.
70 % V
CC
Min.
20 % V
CC
Max.
-
15 pF Max.
Input voltage
Rise / Fall time
*1
Start-up time
Frequency aging
*1
V
IH
V
IL
tr/ tf
t_str
f_aging
*1
I
OH
=-16 mA (PT,ST,PH,SH ) , -8 mA (PC,SC)
I
OL
=16 mA (PT,ST,PH,SH) , 8 mA (PC,SC)
Max. frequency and Max. Supply voltage
(SG-8002CE / CA / JA / DC / DB)
f
0
≤
90 MHz and Max. Supply voltage
(SG-8002JC )
Max. frequency and Max. Supply voltage
(SG-8002CE / JC)
Max. frequency and Max. Supply voltage
(SG-8002LB)
Max. frequency and Max. Supply voltage
(SG-8002CA / JA / DC / DB)
OE terminal or
ST
terminal
TTL load: 0.4 V to 2.4 V level (except SG-8002LB)
CMOS load: 20 % V
CC
to 80 % V
CC
level
Time at minimum supply voltage to be 0 s
+25
°C,
V
CC
=5.0 V/ 3.3 V (PC,SC) First year
2.0 V Min.
0.8 V Max.
4 ns Max.
-
3 ns Max.
10 ms Max.
±5 × 10
-6
/ year Max.
Please refer to “Outline specifications” page for information regarding; operating temperature, available frequencies, symmetry, output load condi-
tions and rise/fall time.
*2
Please refer to “Jitter specifications and characteristics chart” page for PLL-PLL connection & Jitter specification.
*3
Please refer to “Outline specifications” for availability of tolerance “M” and ”L”. A “Frequency checking” program on the Seiko Epson website
is also available.
Crystal oscillator
External dimensions and Recommended footprint
SG-8002CE
3.2±0.2
#4
#3
#3
(Unit:mm)
Ceramic SON 4pin 3.2x2.5x1.05 mm
2.2
#4
#4
C (ex.0.01 µF)
1.4
2.5±0.2
SC181A
#1
#2
0.7 0.9
E125.0C
#3
1.2
0.9
1.05±0.15
1.9
#2
#1
#1
2.4
#2
Resist
SG-8002LB
5.0
±0.2
SOJ 4pin 5.0x3.2x1.2 mm
#3
3.2
±0.2
The metal case inside of the molding com-
pound may be exposed on the top or bottom
of this product.
This purely cosmetic and does not have any
effect on quality, reliabil
i
ty or electrical specs.
2.2
#4
1.6
1.2 Max.
#1
#2
0 .1
2.54
1 .0
2.54
0mi n.
( 0.35)
2.5
( 0.35 )
SG-8002CA
#4
#3
Ceramic SON 4pin 7.0x5.0x1.4 mm
#3
5.0
±0.2
1.4
#4
1.8
C
(ex. 0.01
µF)
2.6
E 125.000
PHC935C
#1
7.0
±0.2
2.0
#2
#2
5.08
#1
Resist
5.08
5.08
SG-8002JC
10. 5 Max.
#4
#3
SOJ 4pin 10.5x5.8x2.7 mm
1.4
-0.15
+0.1
Package and pin compatible with SG-636.
1.3
E125.0000 C
2PH
#1
9357B
#2
The metal case inside of the molding com-
pound may be exposed on the top or bottom
of this product.
This purely cosmetic and does not have any
effect on quality, reliabil
i
ty or electrical specs.
4.6
5.0
5.8 Max.
2.7 Max.
0.51
5.08
0.05Min.
(1.0)
3.6
(1.0)
5.08
Note.
OE Pin (PT, PH, PC)
OE Pin = "H" or "open": Specified frequency output.
OE Pin = "L": Output is high impedance.
Pin map
Pin Connection
1
2
3
4
OE or
ST
GND
OUT
V
CC
ST
Pin (ST, SH, SC)
ST
Pin = "H" or "open": Specified frequency output.
ST
Pin = "L": Output is low level (weak pull - down), oscillation
stops.
To maintain stable operation, provide a
0.01uF to 0.1uF by-pass capacitor at a loca-
tion as near as possible to the power source
terminal of the crystal product (between V
CC
-
GND).
2.1
4.2
1.5
FCC21A
2.8
E 125.0B
Crystal
Crystal oscillator
External dimensions and Recommended footprint (Continued)
SG-8002JA
14.0 Max.
#4
#3
1.3
(Unit:mm)
SOJ 4pin 14.0x9.8x4.7 mm
Package and pin compatible with SG-615.
9.8 Max.
8.65
EPSON
100.0000 C
2PH
#1
#2
4.7 Max.
0.25
8.8
9357B
5.08
0.51
5.08
7.62
0.25Min.
SG-8002DC
#8
#5
DIP half size
SG-8002DB
#14
DIP full size
#8
EPSON
100.0000 C
2PH 9357B
#1
EPSON 9357B
#1
13.7 Max.
#4
2.54 Min. 5.3 Max.
7.62
19.8 Max.
#7
6.36
6.6
16.0000 C 2PH
2.54 Min. 5.3 Max.
3.0
7.62
0.51
7.62
0.2Min.
0.25
90°~105°
0.51
15.24
0.2 Min.
0.25
90°~105°
Note.
OE Pin (PT, PH, PC)
OE Pin = "H" or "open": Specified frequency output.
OE Pin = "L": Output is high impedance.
ST
Pin (ST, SH, SC)
ST
Pin = "H" or "open": Specified frequency output.
ST
Pin = "L": Output is low level (weak pull - down), oscillation
stops.
Pin map
Pin Connection
1
OE or
ST
2
GND
3
OUT
4
V
CC
Pin map: SG-8002DC
Pin
Connection
1
OE or
ST
4
GND
5
OUT
8
V
CC
Pin map: SG-8002DB
Pin
Connection
1
OE or
ST
7
GND
8
OUT
14
V
CC
To maintain stable operation, provide a 0.01uF to 0.1uF by-pass capacitor
at a location as near as possible to the power source terminal of the crys-
tal product (between Vcc - GND).
Products number
(Please contact us for each product.)
SG-8002CE:
SG-8002LB:
SG-8002CA:
Q3321CExxxxxx00
Q3323LBxxxxxx00
Q3309CAx0xxxx00
SG-8002JC:
SG-8002JA:
SG-8002DC:
SG-8002DB:
Q3307JCx2xxxx00
Q3306JAx2xxxx00
Q3204DCx2xxxx00
Q3203DBx2xxxx00
Crystal oscillator
SG-8002 Series
Model
Supply
volt-
age
Outline of specifications
Output load
condition
5TTL+15pF
15 pF
25 pF
25 pF
15 pF
15 pF
25pF
15 pF
(f0≤125 MHz)
(f0≤100 MHz)
(f0
≤27
MHz)
40 % to 60 %
45 % to 55 %
45 % to 55 %
40 % to 60 %
45 % to 55 %
45 % to 55 %
40 % to 60 %
45 % to 55 %
Operating
temperature
-20 ° to +70 °
C
C
Symmetry
(1.4 V, L_TTL=5 TTL+15 pF, f0≤125 MHz)
(1.4 V, L_TTL=5 TTL+15 pF, f0≤66.7 MHz)
(1.4 V, L_TTL=5 TTL+ 15 pF, f0≤27.0 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤66.7 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤27.0 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤40 MHz)
2.0 ns Max.
4.0 ns Max.
3.0 ns Max.
Output rise time /
Output fall time
(0.8 V to 2.0 V,L_TTL=Max.)
(0.4 V to 2.4 V,L_TTL=Max.)
(20 % VCC to 80 % VCC,L_CMOS=Max.)
PT/ST
SG-8002CE
PH/SH
C
C
4.5 V to -40 ° to +85 °
5.5 V
-20 ° to +70 °
C
C
-40 ° to +85 °
C
C
to
to
to
to
to
-40 ° to +85 °
C
C
-40 ° to +85 °
C
C
SG-8002LB
3.0 V
3.6 V
PC/SC
2.7 V
3.6 V
4.5 V
PH/SH 5.5 V
3.0 V
3.6 V
PC/SC 2.7 V
3.6 V
3.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS=Max.)
40 % to 60 % (50 % VCC, L_CMOS=15 pF, f0≤66.7 MHz)
-40 ° to +85 °
C
C
(f0≤50 MHz)
40 % to 60 %
45 % to 55 %
40 % to 60 %
45 % to 55 %
(50 % VCC, L_CMOS=15 pF, f0≤80 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤50 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤40 MHz)
3.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS=Max.)
3.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS=Max.)
40 % to 60 % (50 % VCC, L_CMOS=15 pF, f0≤66.7 MHz)
-20 ° to +70 °
C
C
40 % to 60 %
5TTL+15pF (f0≤125 MHz)
↑
25 pF
(f0≤66.7 MHz)
45 % to 55 %
5 TTL+15 pF (f0≤40 MHz) 40 % to 60 %
15 pF
(f0≤55 MHz)
45 % to 55 %
40 % to 60 %
25 pF
(f0≤125 MHz)
↑
50 pF
(f0≤66.7 MHz)
45 % to 55 %
15 pF
(f0≤55 MHz)
40 % to 60 %
25 pF
(f0≤40 MHz)
45 % to 55 %
15 pF
40 % to 60 %
30 pF
(f0≤40 MHz)
45 % to 55 %
15 pF
(1.4 V, L_TTL=5 TTL+15 pF, f0≤125 MHz)
(1.4 V, L_CMOS=25 pF, f0≤66.7 MHz)
(1.4 V, L_TTL=5 TTL+15 pF, f0≤66.7 MHz)
(1.4 V, L_CMOS=15 pF, f0≤55.0 MHz)
(1.4 V, L_TTL=5 TTL+15 pF, f0≤40.0 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=50 pF, f0≤66.7 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤66.7 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤55.0 MHz)
(50 % VCC, L_MOS=25 pF, f0≤40.0 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=30 pF, f0≤40 MHz)
PT/ST
SG-8002CA
SG-8002JA
SG-8002DB
SG-8002DC
PH/SH
-40 ° to +85 °
C
C
3.0 V to
3.6 V
C
C
PC/SC 2.7 V to -40 ° to +85 °
3.6 V
PT/ST
4.5 V to
-20 ° to +70 °
C
C
5.5 V
SG-8002JC
PH/SH
3.0 V to
3.6 V
-20 ° to +70 °
C
C
PC/SC
2.7 V to
3.6 V
4.5 V to
5.5 V
-40 ° to +85 °
C
C
-20 ° to +70 °
C
C
2.0 ns Max.
4.0 ns Max.
(0.8 V to 2.0 V,L_CMOS or L_TTL=Max.)
(0.4 V to 2.4 V,L_CMOS or L_TTL=Max.)
3.0 ns Max.
4.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS≤25pF)
(20 % VCC to 80 % VCC,L_CMOS=Max.)
40 % to 60 % (50 % VCC, L_CMOS=15 pF, f0≤66.7 MHz)
(1.4 V,L_CMOS=15 pF, f0≤125 MHz)
(1.4 V,L_TTL=5 TTL+15 pF, f0≤90.0 MHz)
(1.4 V,L_CMOS=25 pF, f0≤66.7 MHz)
(1.4 V,L_TTL=5 TTL+15 pF, f0≤66.7 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤90 MHz)
(50 % VCC, L_CMOS=50 pF, f0≤50 MHz)
(50 % VCC, L_CMOS=25 pF, f0≤66.7 MHz)
(50 % VCC, L_CMOS=15 pF, f0≤125 MHz)
(50 % VCC, L_CMOS=30 pF, f0≤40 MHz)
3.0 ns Max.
4.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS≤15pF)
(20 % VCC to 80 % VCC,L_CMOS=Max.)
40 % to 60 %
5TTL+15 pF (f0≤90 MHz)
↑
15 pF
(f0≤125 MHz)
↑
25 pF
(f0≤66.7 MHz)
45 % to 55 %
40 % to 60 %
15 pF
(f0≤125 MHz)
↑
25 pF
(f0≤90 MHz)
↑
50 pF
(f0≤66.7 MHz)
45 % to 55 %
15 pF
40 % to 60 %
30 pF
(f0≤40 MHz)
45 % to 55 %
15 pF
2.0 ns Max.
4.0 ns Max.
(0.8 V to 2.0 V,L_CMOS or L_TTL=Max.)
(0.4 V to 2.4 V,L_CMOS or L_TTL=Max.)
3.0 ns Max.
4.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS≤25pF)
(20 % VCC to 80 % VCC,L_CMOS=Max.)
40 % to 60 % (50 % VCC, L_CMOS=15 pF, f0≤66.7 MHz)
3.0 ns Max.
4.0 ns Max.
(20 % VCC to 80 % VCC,L_CMOS≤15pF)
(20 % VCC to 80 % VCC,L_CMOS=Max.)
Product Name
(Standard form)
SG-8002 CE 125.000000MHz S C C
Supply voltage
Frequency tolerance
/
Operating temperature
Model
Package type
Frequency
Function (P: Output enable, S:Standby)
Supply voltage
Frequency tolerance
/
Operating temperature
*As per table below.
T,H
C
5.0 V Typ.
3.0 / 3.3 V Typ.
B
C
L
M
±50 × 10
-6
/ -20 to +70°
C
±100 × 10
-6
/ -20 to +70°
C
±50 × 10
-6
/ -40 to +85°
C
±100 × 10
-6
/ -40 to +85°
C
►
TABLE OF FREQUENCY RANGE*
Model(
)
Function, Supply voltage(
PT/ ST
PH/ SH
PC/SC
PH/ SH
SG-8002LB
PC/ SC
SG-8002CA
SG-8002JA
SG-8002DB
SG-8002DC
SG-8002JC
PT/ ST
PH/ SH
PC/ SC
PT/ ST
PH/ SH
PC/ SC
)
Supply voltage(
4.5 V to 5.5 V
3.0 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
3.0 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
3.0 V to 3.6 V
2.7 V to 3.6 V
4.5 V to 5.5 V
3.0 V to 3.6 V
2.7 V to 3.6 V
)
Frequency(
)
SG-8002CE
1.0 MHz to 125 MHz
1.0 MHz to 27 MHz
1.0 MHz to 125 MHz
1.0 MHz to 66.7 MHz
1.0 MHz to 80 MHz
1.0 MHz to 27 MHz
1.0 MHz to 125 MHz
1.0 MHz to 66.7 MHz
1.0 MHz to 125 MHz
1.0 MHz to 55 MHz
1.0 MHz to 125 MHz
1.0 MHz to 66.7 MHz
1.0 MHz to 125 MHz
1.0 MHz to 125 MHz
1.0 MHz to 66.7 MHz
Frequency tolerance / Operating Temperature(
B,C
M
B,C,M
B,C
M,L
B,C,M,L
B,C
M
B,C,M
B,C
B,C
)
Crystal
Crystal oscillator
SG-8002 series
Jitter specifications and characteristics chart
■
PLL-PLL connection
The SG-8002 series contains a PLL circuit and there are a few cases where the jitter value may be increased when this product
is connected to another PLL oscillator (cascading connection). We do not recommend this series for analog video clock use and
telecommunication synchronization. Please check in advance if the SG-8002 series jitter is acceptable to your application.
(Jitter specification of the SG-8002 series is max.250 ps/CL=15 pF)
Jitter Specifications
Model
PT
/
PH
ST
/
SH
SC
/
PC
Supply
Voltage
5.0 V
±0.5
V
Jitter Item
Cycle to cycle
Peak to peak
Specifications
150 ps Max.
200 ps Max.
200 ps Max.
250 ps Max.
200 ps Max.
250 ps Max.
Remarks
33 MHz
≤
f
0
≤
125 MHz, L_CMOS=15 pF
1.0 MHz
≤
f
0
< 33 MHz, L_CMOS=15 pF
33 MHz
≤
f
0
≤
125 MHz, L_CMOS=15 pF
1.0 MHz
≤
f
0
< 33 MHz, L_CMOS=15 pF
1.0 MHz
≤
f
0
≤
125 MHz, L_CMOS=15 pF
1.0 MHz
≤
f
0
≤
125 MHz, L_CMOS=15 pF
3.3 V
±0.3
V
Cycle to cycle
Peak to peak
■
Remarks on noise management for power supply line
It is not recommended to insert filters or other devices in the power supply line as a counter measure for EMI noise reduction.
This may cause high-frequency impedance of the power supply line and negatively affect stable oscillation.
When using this measure please evaluate the circuitry and device behavior in the circuit to verify and effects on oscillation.
Start up time (0 % V
CC
to 90 % V
CC
) of power source should be more than 150
µs.
■
SG-8002 series Characteristics chart
50
40
I
CC
(mA)
30
20
10
0
50
40
I
_dis
(mA)
30
20
10
0
50
40
Symmetry (%)
I
_std
(µA)
30
20
10
2.5
3.0 3.5 4.0 4.5 5.0
V
CC
(V)
5.5 6.0
20
40 60 80 100 120 140
Frequency(MHz)
Stand-by Current
60
55
50
45
40
0
20
40 60 80 100 120 140
Frequency(MHz)
20
40 60 80 100 120 140
Frequency(MHz)
Current consumption
(V
CC
=5.0V)
60
Symmetry (%)
55
50
45
40
0
20
40 60 80 100 120 140
Frequency(MHz)
50 pF
Symmetry 5.0 V CMOS Level
25 pF
3.0
Output Rise time (CMOS Level)
2.5
Rise time (ns)
15 pF
3.0 V
3.3 V
3.6 V
2.7 V
4.5 V
5.0 V
5.5 V
2.0
1.5
1.0
10 15 20 25 30 35 40 45
50 55
Disable Current
(V
CC
=5.0V)
60
Symmetry (%)
55
Symmetry 3.3 V CMOS Level
3.0
30 pF
Load capacitance (pF)
Output Fall time (CMOS Level)
3.0 V
3.3 V
3.6 V
4.5 V
5.0 V
5.5 V
50
15 pF
Fall Time (ns)
2.5
45
40
0
20
40 60 80 100 120 140
Frequency(MHz)
2.0
2.7 V
1.5
Symmetry 5.0V TTL Level
1.0
10 15 20 25 30 35 40 45
50 55
Load capacitance (pF)
25 pF
15 pF
2.0
Rise Time (ns)
1.5
1.0
Output Rise time (TTL Level)
4.5 V
5.0 V
5.5 V
10
2.0
Fall Time (ns)
Additional Value (mA)
Output load vs. Additional Current consumption
20
V
CC
=5.0 V
18
25 pF
16
14
50 pF
12
15 pF
10
30 pF
8
6
4
2
Voltage coefficient [
V
CC
vs I_dis,I_std ]
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
2.5
I_dis(Va)=Times(Va)×I_dis(5.0V)
I_std(Va)=Times(Va)×I_std(5.0V)
15
20
25
Load capacitance (pF)
Output Fall time (TTL Level)
30
Times
1.5
4.5 V
5.0 V
5.5 V
1.0
0
20
40 60 80 100 120 140
Frequency(MHz)
3.0
3.5
4.0
4.5
5.0
5.5
6.0
V
CC
(V)
10
20
25
15
Load capacitance (pF)
30
