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SHM-4860/883

Sample and Hold Circuit, 1 Func, Sample, 0.16us Acquisition Time, CDIP24, CERAMIC, DDIP-24

器件类别:模拟混合信号IC    放大器电路   

厂商名称:C&D

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
C&D
零件包装代码
DIP
包装说明
DIP,
针数
24
Reach Compliance Code
unknown
ECCN代码
EAR99
最长采集时间
0.2 µs
标称采集时间
0.16 µs
放大器类型
SAMPLE AND HOLD CIRCUIT
最小模拟输入电压
10.25 V
JESD-30 代码
R-CDIP-T24
负供电电压上限
-18 V
标称负供电电压 (Vsup)
-15 V
功能数量
1
端子数量
24
最高工作温度
125 °C
最低工作温度
-55 °C
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
采样并保持/跟踪并保持
SAMPLE
座面最大高度
5.969 mm
供电电压上限
18 V
标称供电电压 (Vsup)
15 V
表面贴装
NO
温度等级
MILITARY
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
15.24 mm
文档预览
SHM-4860
Industry-Standard, High-Speed
±0.01% Sample-Hold Amplifiers
FEATURES
200ns Maximum acquisition time
±0.01% Accuracy
100ns Maximum sample-hold settling time
74dB Feedthrough attenuation
±50ps Aperture uncertainty
Industry standard
®
®
INNOVATION and EXCELLENCE
GENERAL DESCRIPTION
DATEL’s SHM-4860 is a high-speed, highly accurate sample-
hold amplifier designed for precision, high-speed analog signal
processing applications. Manufactured using modern, high-
quality hybrid technology, the SHM-4860 features excellent
dynamic specifications including a maximum acquisition time of
only 200ns for a 10V step to ±0.01%. Sample-to-hold settling
time, to ±0.01% accuracy, is 100ns maximum with an aperture
uncertainty of ±50ps.
The SHM-4860 is a complete sample-hold circuit, containing a
precision MOS hold capacitor and a MOSFET switching
configuration which results in faster switching and better
feedthrough attenuation. Additionally, a FET-input amplifier
design allows faster acquisition and settling times while
maintaining a considerably lower droop rate.
INPUT/OUTPUT CONNECTIONS
PIN
1
2
3
4
5
6
7
8
9
10
11
12
FUNCTION
OUTPUT
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
+5V SUPPLY
GROUND
HOLD COMMAND
HOLD COMMAND
PIN
24
23
22
21
20
19
18
17
16
15
14
13
FUNCTION
+15V SUPPLY
GROUND
–15V SUPPLY
GROUND
N.C.
N.C.
N.C.
N.C.
N.C.
GROUND
N.C.
INPUT
1kW
1kW
INPUT 13
C
H
1 OUTPUT
+
9 +5V SUPPLY
24 +15V SUPPLY
SWITCH
DRIVER
22 –15V SUPPLY
HOLD COMMAND 11
HOLD COMMAND 12
10
15
21
SYSTEM GROUND
23
INTERNAL
SUPPLY BYPASS
CAPACITORS
Figure 1. Functional Block Diagram
DATEL, Inc.,
11 Cabot Boulevard, Mansfield, MA 02048-1194 (U.S.A.) Tel: 508-339-3000 Fax: 508-339-6356 • For immediate assistance 800-233-2765
®
®
SHM-4860
ABSOLUTE MAXIMUM RATINGS
±15V Supply Voltages, Pins 24, 22
+5V Supply Voltage, Pin 9
Analog Input, Pin 13
Digital Inputs, Pins 11, 12
Output Current
±18V
–0.5V to +7V
±18V
–0.5V to +7V
±65mA
PHYSICAL/ENVIRONMENTAL
Operating Temperature Ranges
SHM-4860MC
SHM-4860MM, 883
Storage Temperature Range
Package Type
Footnotes:
ANALOG INPUT/OUTPUT
Input/Output Voltage Range
Input Impedance
Output Current
Output Impedance
Maximum Capacitive Load
DIGITAL INPUT
Input Logic Level
Logic "1"
Logic "0"
Loading
Logic "1"
Logic "0"
+2.0
0
+5.0
+0.8
+40
–1.6
V
V
µA
mA
MIN.
±10.25
TYP.
±11.25
1
0.1
250
MAX.
±40
UNITS
V
kΩ
mA
kΩ
pF
Input signal should not exceed the supply voltage.
The SHM-4860’s output is current limited at approximately ±65mA. The device
can withstand a sustained short to ground. However, shorts from the output to
either supply will cause permanent damage. For normal operation, the load
current should not exceed ±40mA.
Full Scale (FS) = 10V. Full Scale Range (FSR) = 20V.
Sample-to-Hold Offset Error (Pedestal) is constant regardless of input/output
level.
Units are ppm of FSR/°C.
0 to +70°C (ambient)
–55 to +125°C (case)
–65 to +150°C
24-pin ceramic DDIP
FUNCTIONAL SPECIFICATIONS
(Typical at +25°C with ±15V and +5V supplies unless otherwise noted.)
TRANSFER CHARACTERISTICS
Gain
Gain Accuracy
Gain Linearity Error
Sample-Mode Offset Voltage
Sample-to-Hold Offset Error
(Pedestal)
Gain Tempco
(Drift)
Sample-Mode Offset Drift
Sample-to-Hold Offset Drift
DYNAMIC CHARACTERISTICS
Acquisition Time
10V to ±0.01%FS
10V to ±0.1%FS
10V to ±1%FS
1V to ±1%FS
Sample-to-Hold Settling Time
10V to ±0.01%FS
10V to ±0.1%FS
Sample-to-Hold Transient
Aperture Delay Time
Aperture Uncertainty
(Jitter)
Output Slew Rate
Small Signal Bandwidth
(–3dB)
Droop:
+25°C
+70°C
+125°C
Feedthrough Attenuation
Overload Recovery Time
Positive
Negative
POWER REQUIREMENTS
Voltage Range:
±15V Supplies
+5V Supply
Power Supply Rejection Ratio
Quiescent Current Drain
+15V Supply
–15V Supply
+5V Supply
Power Consumption
±3
±5
±0.5
+21
–22
+17
730
+25
–25
+25
875
%
%
mV/V
mA
mA
mA
mW
160
100
90
75
60
40
180
6
±50
±300
16
±0.5
±15
±1.2
74
200
700
200
170
100
±5
ns
ns
ns
ns
ns
ns
mV p-p
ns
ps
µV/µs
MHz
µV/µs
µV/µs
mV/µs
dB
ns
ns
–1
±0.05
±0.005
±0.5
±2.5
±0.5
±3
±4
±0.1
±0.01
±5
±20
±5
±15
V/V
%
%FS
mV
mV
ppm/°C
TECHNICAL NOTES
1. All ground pins (10, 15, 21, 23) should be tied together and
connected to system analog ground as close to the package
as possible. It is recommended to use a ground plane
under the device and solder all four ground pins directly to
it. Care must be taken to ensure that no ground potentials
can exist between Pin 10 and the other ground pins.
2. Although the power supply pins (9, 22, 24) are internally
bypassed to ground with 0.01µF ceramic capacitors,
additional external 0.1µF to 1µF tantalum bypass
capacitors may be required in critical applications.
3. A logic "0" on the HOLD COMMAND input (Pin 11), or a
logic "1" on the HOLD COMMAND input (Pin 12), will put
the device in the sample mode. In this mode, the device
acts as an inverting unity-gain amplifier, and its output will
track its input. A logic "1" on Pin 11 (logic "0" on Pin 12)
will put the device in the hold mode, and the output will be
held constant at the last input level present when the hold
command was given.
If the HOLD COMMAND input (Pin 11) is used to control the
device, Pin 12 must be tied to digital ground. If HOLD
COMMAND input (Pin 12) is used to control the device, Pin
11 must be tied to +5V.
4. The maximum capacitive load to avoid oscillation is typically
250pF. Recommended resistive load is 500Ω, although
values as low as 250Ω may be used. Acquisition and
sample-to-hold settling times are relatively unaffected by
resistive loads down to 250Ω and capacitive loads up to
50pF. However, higher capacitances will affect both
acquisition and settling time.
Sample-and-Hold Amplifiers
®
®
SHM-4860
MECHANICAL DIMENSIONS
INCHES (mm)
1.31 MAX.
(33.27)
24-PIN DDIP
Dimension Tolerances
(unless otherwise indicated):
2 place decimal (.XX) ±0.010 (±0.254)
3 place decimal (.XXX) ±0.005 (±0.127)
0.80 MAX.
(20.32)
Lead Material:
Kovar alloy
Lead Finish:
50 microinches (minimum) gold plating
over 100 microinches (nominal) nickel plating
24
13
1
12
0.100 TYP.
(2.540)
1.100
(27.940)
0.235 MAX.
(5.969)
0.200 MAX.
(5.080)
0.010
–0.001
(0.254)
0.190 MAX.
(4.826)
0.018 ±0.002
(0.457)
0.100
(2.540)
0.040
(1.016)
+0.002
SEATING
PLANE
0.025
(0.635)
0.600 ±0.010
(15.240)
0.100
(2.540)
ORDERING INFORMATION
MODEL NUMBER
SHM-4860MC
SHM-4860MM
SHM-4860/883
OPERATING TEMP. RANGE
0 to +70°C
–55 to +125°C
–55 to +125°C
Contact DATEL for 883 product specifications.
DS-0088A 1996
DATEL, Inc. 11 Cabot Boulevard, Mansfield, MA 02048-1151
Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356
Internet: www.datel.com Email: sales@datel.com
DATEL (UK) LTD. Tadley, England Tel: (01256)-880444
DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01
DATEL GmbH München, Germany Tel: 89-544334-0
DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-6354-2025
DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained
herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark.
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参数对比
与SHM-4860/883相近的元器件有:SHM-4860MM、SHM-4860MC。描述及对比如下:
型号 SHM-4860/883 SHM-4860MM SHM-4860MC
描述 Sample and Hold Circuit, 1 Func, Sample, 0.16us Acquisition Time, CDIP24, CERAMIC, DDIP-24 Sample and Hold Circuit, 1 Func, Sample, 0.16us Acquisition Time, FET, CDIP24, DDIP-24 Sample and Hold Circuit, 1 Func, Sample, 0.16us Acquisition Time, FET, CDIP24, DDIP-24
是否无铅 含铅 含铅 含铅
是否Rohs认证 不符合 不符合 不符合
厂商名称 C&D C&D C&D
零件包装代码 DIP DIP DIP
包装说明 DIP, DIP, DIP,
针数 24 24 24
Reach Compliance Code unknown unknown unknown
ECCN代码 EAR99 EAR99 EAR99
最长采集时间 0.2 µs 0.2 µs 0.2 µs
标称采集时间 0.16 µs 0.16 µs 0.16 µs
放大器类型 SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT SAMPLE AND HOLD CIRCUIT
最小模拟输入电压 10.25 V -11.5 V -11.5 V
JESD-30 代码 R-CDIP-T24 R-CDIP-T24 R-CDIP-T24
负供电电压上限 -18 V -18 V -18 V
标称负供电电压 (Vsup) -15 V -15 V -15 V
功能数量 1 1 1
端子数量 24 24 24
最高工作温度 125 °C 125 °C 70 °C
最低工作温度 -55 °C -55 °C -
封装主体材料 CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DIP DIP DIP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 IN-LINE IN-LINE IN-LINE
峰值回流温度(摄氏度) NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
认证状态 Not Qualified Not Qualified Not Qualified
采样并保持/跟踪并保持 SAMPLE SAMPLE SAMPLE
座面最大高度 5.969 mm 5.969 mm 5.969 mm
供电电压上限 18 V 18 V 18 V
标称供电电压 (Vsup) 15 V 15 V 15 V
表面贴装 NO NO NO
温度等级 MILITARY MILITARY COMMERCIAL
端子形式 THROUGH-HOLE THROUGH-HOLE THROUGH-HOLE
端子节距 2.54 mm 2.54 mm 2.54 mm
端子位置 DUAL DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
宽度 15.24 mm 15.24 mm 15.24 mm
最大模拟输入电压 - 11.5 V 11.5 V
最大下降率 - 5 V/s 5 V/s
技术 - FET FET
Base Number Matches - 1 1
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