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SI1013-C-GM2

IC RF TXRX+MCU ISM<1GHZ 42-VFLGA

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:Silicon Laboratories Inc

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
Reach Compliance Code
compliant
Is Samacsys
N
具有ADC
YES
地址总线宽度
位大小
8
最大时钟频率
25 MHz
DMA 通道
NO
外部数据总线宽度
长度
7 mm
I/O 线路数量
15
端子数量
42
PWM 通道
YES
封装代码
HLGA
封装形状
RECTANGULAR
封装形式
GRID ARRAY, HEAT SINK/SLUG
ROM(单词)
8192
速度
25 MHz
最大供电电压
3.6 V
最小供电电压
1.8 V
标称供电电压
1.9 V
表面贴装
YES
技术
CMOS
端子形式
BUTT
端子节距
0.5 mm
端子位置
BOTTOM
宽度
5 mm
uPs/uCs/外围集成电路类型
MICROCONTROLLER
Base Number Matches
1
文档预览
Si1010/1/2/3/4/5
Ultra Low Power, 64/32 kB, 10-Bit ADC
MCU with Integrated 240–960 MHz EZRadioPRO
®
Transceiver
Ultra Low Power: 0.9 to 3.6 V Operation
-
Typical sleep mode current < 0.1 µA; retains state and
-
-
-
-
EZRadioPRO
®
Transceiver
-
-
-
-
-
Frequency range = 240–960 MHz
Sensitivity = –121 dBm
FSK, GFSK, and OOK modulation
Max output power = +20 dBm (Si1010/1), +13 dBm
(Si1012/3/4/5)
RF power consumption
-
18.5 mA receive
-
18 mA @ +1 dBm transmit
-
30 mA @ +13 dBm transmit
-
85 mA @ +20 dBm transmit (Si1010/1)
Data rate = 0.123 to 256 kbps
Auto-frequency calibration (AFC)
Antenna diversity and transmit/receive switch control
Programmable packet handler
TX and RX 64 byte FIFOs
Frequency hopping capability
On-chip crystal tuning
RAM contents over full supply range; fast wakeup of < 2 µs
Less than 600 nA with RTC running
Less than 1 µA with RTC running and radio state retained
On-chip dc-dc converter allows operation down to 0.9 V.
Two built-in brown-out detectors cover sleep and active
modes
10-Bit or 12-Bit Analog to Digital Converter
-
Up to 300 ksps
-
Up to 18 external inputs
-
External pin or internal VREF (no external capacitor
-
-
-
required)
Built-in temperature sensor
External conversion start input option
Autonomous burst mode with 16-bit automatic averaging
accumulator
Dual Comparators
-
Programmable hysteresis and response time
-
Configurable as interrupt or reset source
-
Low current (< 0.5 µA)
On-Chip Debug
-
On-chip debug circuitry facilitates full-speed, non-intrusive
-
-
-
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of instruc-
-
-
Memory
-
768 bytes RAM 16 kB (Si1010/2/4) or 8 kB (Si1011/3/5)
Flash; In-system programmable
tions in 1 or 2 system clocks
Up to
25 MIPS
throughput with 25 MHz clock
Expanded interrupt handler
in-system debug (No emulator required)
Provides breakpoints, single stepping
Inspect/modify memory and registers
Complete development kit
-
-
-
-
-
-
-
Digital Peripherals
-
12 port I/O plus 3 GPIO pins; Hardware enhanced UART,
-
-
SPI, and I
2
C serial ports available concurrently
Low power 32-bit SmaRTClock
Four general purpose 16-bit counter/timers; six channel
programmable counter array (PCA)
Clock Sources
-
Precision internal oscillators: 24.5 MHz with ±2% accuracy
-
-
-
supports UART operation; spread-spectrum mode for
reduced EMI; Low power 20 MHz internal oscillator
External oscillator: Crystal, RC, C, CMOS clock
SmaRTClock oscillator: 32.768 kHz crystal or self-oscillate
Can switch between clock sources on-the-fly; useful in
power saving modes and in implementing various power
saving modes
Package
-
42-pin LGA (5 x 7 mm)
Temperature Range: –40 to +85 °C
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
CRC
Port 0
CROSSBAR
EZRadio
PRO
Serial
Interface
Port 1
Port 2
EZRadioPRO
(240–960 MHz)
LNA
12/10-bit
75/300 ksps
ADC
+
IREF
+
PA
TEMP
SENSOR
VREF
VREG
VOLTAGE
COMPARATORS
Mixer
PGA
ADC
24.5 MHz PRECISION
INTERNAL OSCILLATOR
External Oscillator
20 MHz LOW POWER
INTERNAL OSCILLATOR
HARDWARE smaRTClock
Digital
Modem
Delta
Sigma
Modulator
Digital
Logic
HIGH-SPEED CONTROLLER CORE
16/8 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR
WDT
PLL
OSC
Rev. 1.2 2/13
Copyright © 2013 by Silicon Laboratories
Si1010/1/2/3/4/5
Si1010/1/2/3/4/5
Table of Contents
1. System Overview ..................................................................................................... 20
1.1. Typical Connection Diagram ............................................................................. 24
1.2. CIP-51™ Microcontroller Core .......................................................................... 25
1.2.1. Fully 8051 Compatible .............................................................................. 25
1.2.2. Improved Throughput................................................................................ 25
1.2.3. Additional Features ................................................................................... 25
1.3. Port Input/Output ............................................................................................... 26
1.4. Serial Ports ........................................................................................................ 27
1.5. Programmable Counter Array............................................................................ 27
1.6. SAR ADC with 16-Bit Auto-Averaging Accumulator and Autonomous
Low Power Burst Mode ..................................................................................... 28
1.7. Programmable Current Reference (IREF0)....................................................... 29
1.8. Comparators...................................................................................................... 29
2. Ordering Information ............................................................................................... 31
3. Pinout and Package Definitions ............................................................................. 32
4. Electrical Characteristics ........................................................................................ 43
4.1. Absolute Maximum Specifications..................................................................... 43
4.2. Electrical Characteristics ................................................................................... 44
4.3. EZRadioPRO
®
Electrical Characteristics .......................................................... 68
4.4. Definition of Test Conditions for the EZRadioPRO Peripheral .......................... 75
5. SAR ADC with 16-Bit Auto-Averaging Accumulator and Autonomous
Low Power Burst Mode........................................................................................... 76
5.1. Output Code Formatting .................................................................................... 77
5.2. Modes of Operation ........................................................................................... 78
5.2.1. Starting a Conversion................................................................................ 78
5.2.2. Tracking Modes......................................................................................... 79
5.2.3. Burst Mode................................................................................................ 80
5.2.4. Settling Time Requirements...................................................................... 82
5.2.5. Gain Setting .............................................................................................. 82
5.3. 8-Bit Mode ......................................................................................................... 83
5.4. 12-Bit Mode ....................................................................................................... 83
5.5. Low Power Mode............................................................................................... 83
5.6. Programmable Window Detector....................................................................... 91
5.6.1. Window Detector In Single-Ended Mode .................................................. 93
5.6.2. ADC0 Specifications ................................................................................. 93
5.7. ADC0 Analog Multiplexer .................................................................................. 94
5.8. Temperature Sensor.......................................................................................... 96
5.8.1. Calibration ................................................................................................. 96
5.9. Voltage and Ground Reference Options ........................................................... 99
5.10. External Voltage References......................................................................... 100
5.11. Internal Voltage References .......................................................................... 100
5.12. Analog Ground Reference............................................................................. 100
5.13. Temperature Sensor Enable ......................................................................... 100
Rev. 1.2
2
Si1010/1/2/3/4/5
5.14. Voltage Reference Electrical Specifications .................................................. 101
6. Programmable Current Reference (IREF0).......................................................... 102
6.1. PWM Enhanced Mode..................................................................................... 102
6.2. IREF0 Specifications ....................................................................................... 103
7. Comparators........................................................................................................... 104
7.1. Comparator Inputs........................................................................................... 104
7.2. Comparator Outputs ........................................................................................ 105
7.3. Comparator Response Time ........................................................................... 106
7.4. Comparator Hysteresis.................................................................................... 106
7.5. Comparator Register Descriptions .................................................................. 107
7.6. Comparator0 and Comparator1 Analog Multiplexers ...................................... 111
8. CIP-51 Microcontroller........................................................................................... 114
8.1. Performance .................................................................................................... 114
8.2. Programming and Debugging Support ............................................................ 115
8.3. Instruction Set.................................................................................................. 115
8.3.1. Instruction and CPU Timing .................................................................... 115
8.4. CIP-51 Register Descriptions .......................................................................... 119
9. Memory Organization ............................................................................................ 123
9.1. Program Memory............................................................................................. 123
9.1.1. MOVX Instruction and Program Memory ................................................ 124
9.2. Data Memory ................................................................................................... 124
9.2.1. Internal RAM ........................................................................................... 124
9.2.2. External RAM .......................................................................................... 125
10. On-Chip XRAM ..................................................................................................... 126
10.1. Accessing XRAM........................................................................................... 126
10.1.1. 16-Bit MOVX Example .......................................................................... 126
10.1.2. 8-Bit MOVX Example ............................................................................ 126
10.2. Special Function Registers............................................................................ 126
11. Special Function Registers................................................................................. 128
11.1. SFR Paging ................................................................................................... 129
12. Interrupt Handler.................................................................................................. 134
12.1. Enabling Interrupt Sources ............................................................................ 134
12.2. MCU Interrupt Sources and Vectors.............................................................. 134
12.3. Interrupt Priorities .......................................................................................... 135
12.4. Interrupt Latency............................................................................................ 135
12.5. Interrupt Register Descriptions ...................................................................... 137
12.6. External Interrupts INT0 and INT1................................................................. 144
13. Flash Memory....................................................................................................... 146
13.1. Programming the Flash Memory ................................................................... 146
13.1.1. Flash Lock and Key Functions .............................................................. 146
13.1.2. Flash Erase Procedure ......................................................................... 147
13.1.3. Flash Write Procedure .......................................................................... 147
13.2. Non-Volatile Data Storage............................................................................. 147
13.3. Security Options ............................................................................................ 148
13.4. Determining the Device Part Number at Run Time ....................................... 150
3
Rev. 1.2
Si1010/1/2/3/4/5
13.5. Flash Write and Erase Guidelines ................................................................. 151
13.5.1. VDD Maintenance and the VDD Monitor .............................................. 151
13.5.2. PSWE Maintenance .............................................................................. 151
13.5.3. System Clock ........................................................................................ 152
13.6. Minimizing Flash Read Current ..................................................................... 153
14. Power Management ............................................................................................. 157
14.1. Normal Mode ................................................................................................. 158
14.2. Idle Mode....................................................................................................... 158
14.3. Stop Mode ..................................................................................................... 159
14.4. Suspend Mode .............................................................................................. 160
14.5. Sleep Mode ................................................................................................... 161
14.6. Configuring Wakeup Sources........................................................................ 162
14.7. Determining the Event that Caused the Last Wakeup................................... 162
14.8. Power Management Specifications ............................................................... 165
15. Cyclic Redundancy Check Unit (CRC0)............................................................. 166
15.1. 16-Bit CRC Algorithm .................................................................................... 166
15.2. 32-bit CRC Algorithm..................................................................................... 168
15.3. Preparing for a CRC Calculation ................................................................... 169
15.4. Performing a CRC Calculation ...................................................................... 169
15.5. Accessing the CRC0 Result .......................................................................... 169
15.6. CRC0 Bit Reverse Feature............................................................................ 174
16. On-Chip DC-DC Converter (DC0)........................................................................ 175
16.1. Startup Behavior............................................................................................ 176
16.2.
High Power Applications ............................................................................ 177
16.3. Pulse Skipping Mode..................................................................................... 177
16.4. Enabling the DC-DC Converter ..................................................................... 177
16.5. Minimizing Power Supply Noise .................................................................... 179
16.6. Selecting the Optimum Switch Size............................................................... 179
16.7. DC-DC Converter Clocking Options .............................................................. 179
16.8. DC-DC Converter Behavior in Sleep Mode ................................................... 180
16.9. Bypass Mode................................................................................................. 180
16.10. Low Power Mode......................................................................................... 181
16.11. Passive Diode Mode.................................................................................... 181
16.12. DC-DC Converter Register Descriptions ..................................................... 182
16.13. DC-DC Converter Specifications ................................................................. 184
17. Voltage Regulator (VREG0)................................................................................. 185
17.1. Voltage Regulator Electrical Specifications ................................................... 185
18. Reset Sources ...................................................................................................... 186
18.1. Power-On (VBAT Supply Monitor) Reset ...................................................... 187
18.2. Power-Fail (VDD_MCU/DC+ Supply Monitor) Reset .................................... 189
18.3. External Reset ............................................................................................... 192
18.4. Missing Clock Detector Reset ....................................................................... 192
18.5. Comparator0 Reset ....................................................................................... 192
18.6. PCA Watchdog Timer Reset ......................................................................... 192
18.7. Flash Error Reset .......................................................................................... 192
Rev. 1.2
4
Si1010/1/2/3/4/5
18.8. SmaRTClock (Real Time Clock) Reset ......................................................... 193
18.9. Software Reset .............................................................................................. 193
19. Clocking Sources................................................................................................. 195
19.1. Programmable Precision Internal Oscillator .................................................. 196
19.2. Low Power Internal Oscillator........................................................................ 196
19.3. External Oscillator Drive Circuit..................................................................... 196
19.3.1. External Crystal Mode........................................................................... 196
19.3.2. External RC Mode................................................................................. 198
19.3.3. External Capacitor Mode....................................................................... 199
19.3.4. External CMOS Clock Mode ................................................................. 199
19.4. Special Function Registers for Selecting and Configuring the
System Clock................................................................................................. 200
20. SmaRTClock (Real Time Clock).......................................................................... 204
20.1. SmaRTClock Interface .................................................................................. 204
20.1.1. SmaRTClock Lock and Key Functions.................................................. 205
20.1.2. Using RTC0ADR and RTC0DAT to Access SmaRTClock
Internal Registers.................................................................................. 205
20.1.3. RTC0ADR Short Strobe Feature........................................................... 206
20.1.4. SmaRTClock Interface Autoread Feature ............................................. 206
20.1.5. RTC0ADR Autoincrement Feature........................................................ 207
20.2. SmaRTClock Clocking Sources .................................................................... 210
20.2.1. Using the SmaRTClock Oscillator with a Crystal or
External CMOS Clock ........................................................................... 210
20.2.2. Using the SmaRTClock Oscillator in Self-Oscillate Mode..................... 211
20.2.3. Using the Low Frequency Oscillator (LFO) ........................................... 211
20.2.4. Programmable Load Capacitance......................................................... 211
20.2.5. Automatic Gain Control (Crystal Mode Only) and SmaRTClock
Bias Doubling ........................................................................................ 212
20.2.6. Missing SmaRTClock Detector ............................................................. 213
20.2.7. SmaRTClock Oscillator Crystal Valid Detector ..................................... 214
20.3. SmaRTClock Timer and Alarm Function ....................................................... 214
20.3.1. Setting and Reading the SmaRTClock Timer Value ............................. 214
20.3.2. Setting a SmaRTClock Alarm ............................................................... 214
20.3.3. Software Considerations for using the SmaRTClock
Timer and Alarm ................................................................................... 215
21. Port Input/Output ................................................................................................. 220
21.1. Port I/O Modes of Operation.......................................................................... 221
21.1.1. Port Pins Configured for Analog I/O...................................................... 221
21.1.2. Port Pins Configured For Digital I/O...................................................... 221
21.1.3. Interfacing Port I/O to 5 V and 3.3 V Logic............................................ 222
21.1.4. Increasing Port I/O Drive Strength ........................................................ 222
21.2. Assigning Port I/O Pins to Analog and Digital Functions............................... 222
21.2.1. Assigning Port I/O Pins to Analog Functions ........................................ 222
21.2.2. Assigning Port I/O Pins to Digital Functions.......................................... 223
21.2.3. Assigning Port I/O Pins to External Digital Event Capture Functions ... 223
5
Rev. 1.2
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