SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）
250
认证状态
Not Qualified
调节器类型
FIXED POSITIVE MULTIPLE OUTPUT LDO REGULATOR
座面最大高度
1 mm
表面贴装
YES
技术
CMOS
端子面层
MATTE TIN
端子形式
FLAT
端子节距
0.5 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
40
最大电压容差
2%
宽度
3 mm
Base Number Matches
1
文档预览
SiP2210
Vishay Siliconix
Dual Output 150/300-mA Low Dropout Regulator
DESCRIPTION
SiP2210 is a dual output low dropout regulator capable of
supplying 150 mA from output 1 and 300 mA from output 2.
The SiP2210 has the outputs independently enabled. In
addition to the LDOs, an open drain output has been
included, which is capable of sinking 150 mA. SiP2210 offers
a low dropout, low ground current and extremely low noise
with the addition of a bypass capacitor.
Protection features include ERR, undervoltage lockout,
output current limit, and thermal shutdown.
The fixed output version of SiP2210 is available in a lead
(Pb)-free MLP33-10 PowerPAK package and the adjustable
version is available in a lead (Pb)-free MLP44-16 PowerPAK
package. Both packages ares specified to operate over the
range of - 40 °C to 85 °C.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
2.25 V to 5.5 V input voltage range
Two outputs - 150 mA and 300 mA
Low ground current of 48 µA
Open drain driver output sinking 150 mA
Low dropout voltage of 65 mV at 100 mA
ERR
Current limit
Thermal shutdown
MLP33-10 PowerPAK
®
package (fixed output)
MLP44-16 PowerPAK
®
package (adjustable output)
MIC2210 pin-for-pin replacement
APPLICATIONS
• Cellular phones
• Wireless modems
• PDAs
TYPICAL APPLICATION CIRCUIT
V
IN
EN
1
EN
2
SW
BP
GND
V
OUT1
V
OUT2
SiP2210
ERR
DRV
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
www.vishay.com
1
SiP2210
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
V
IN
, V
EN
, to GND
Power Dissipation
Storage Temperature
Thermal Resistance (MLP10 PowerPAK)
Notes:
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 20 mW/°C above 70 °C.
c. Derate 23.5 mW/°C above 70 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Limit
- 0.3 to 7
MLP33-10 PowerPAK
b
MLP44-16 PowerPAK
c
1600
1880
- 55 to 150
50
Unit
V
mW
°C
°C/W
RECOMMENDED OPERATING RANGE
Parameter
Input Voltage Range
Enable Voltage Range
Operating Temperature Range T
A
Operating Temperature Range T
J
Limit
2.25 to 5.5
0 to 5.5
- 40 to 85
- 40 to 125
Unit
V
°C
SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= V
OUT
+ 1 V
e
, C
OUT
= 1 µF, I
OUT
= 100 µA,
T
A
= 25 °C
From Nominal V
OUT
Limits
Temp.
a
Room
Full
Room
V
IN
= V
OUT
+ 1 V to 5.5 V
I
OUT
= 100 µA to 150 mA (LDO 1 and 2)
I
OUT
= 100 µA to 300 mA (LDO 2)
I
OUT
= 150 mA (LDO 1 and 2)
Dropout Voltage
f
V
DROP
I
OUT
= 300 mA (LDO 2)
I
OUT1
= I
OUT2
= 0 µA
Ground Pin Current
I
G
I
OUT1
= I
OUT2
= 0 µA
I
OUT1
= 150 mA, I
OUT2
= 300 mA
V
EN
< 0.4 V
Sequence Time Delay
Output Voltage Noise
Ripple Rejection
Inputs
EN, SW Input Voltage
EN, SW Input Current
SET Pin Threshold Voltage
SET Pin Current Source
V
IL
V
IH
I
IL
I
IH
V
TH
(set)
Logic Low
Logic High
V
IL
< 0.6 V
V
IH
> 1.8 V
POR = High
V
SET
= 0 V
Full
Full
Room
Room
Room
Room
0.75
1.8
-1
-1
0.01
0.01
1.25
1.25
1.75
1
1
0.6
V
µA
V
µA
d
Parameter
Regulators
Output Voltage Accuracy
Output Voltage
Temperature Coefficient
Line Regulation
e
Load Regulation
Symbol
Min.
b
-1
-2
Typ.
c
Max.
b
1
2
Unit
%
ppm/°C
40
- 0.3
- 0.6
0.2
120
240
48
60
2.0
70
30
60
40
0.2
0.3
0.6
1.0
1.5
190
250
340
420
65
80
Room
Full
Room
Room
Room
Full
Room
Full
Room
Full
Room
Full
Room
%
mV
µA
t
SEQ
C
BP
= 0.01 µF
f = 1 kHz, C
OUT
= 1 µF, C
BP
= 10 nF
f = 20 kHz, C
OUT
= 1 µF, C
BP
= 10 nF
µs
µVrms
dB
Room
Room
www.vishay.com
2
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
SiP2210
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
V
IN
= V
OUT
+ 1
Parameter
Error Flag Output (ERR)
Threshold
Output Voltage
Leakage Current
Driver (DRV) Output
Output Voltage
Leakage Current
Protection
Current Limit
Thermal Shutdown Temperature
Thermal Hysteresis
I
IL
V
OUT1
= 0 V
V
OUT1
= 0 V
Room
Room
Room
Room
150
300
280
450
165
25
460
700
mA
°C
V
OL
I
L
= 150 mA
I
DRV
= 0 mA, V
DRV
= 5.5 V, SW = 0 V
Full
Room
-1
0.2
0.01
0.6
1
V
µA
V
THL
V
THH
V
OL
I
ERR
% of Nominal V
OUT2
I
L
= 250 µA
ERR = High
Room
Room
Room
Room
-1
0.02
0.01
90
96
0.1
1
%
V
µA
Symbol
V
e
,
C
OUT
= 1 µF, I
OUT
= 100 µA,
T
A
= 25 °C
Temp.
a
Min.
b
Limits
Typ.
c
Max.
b
Unit
Notes:
a. Room = 25 °C, Full = - 40 °C to 85 °C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Timing is measured from 90 % of LDO #1’s final value to 90 % of LDO #2’s final value.
e. For higher output of the regulator pair.
f. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2 % below the output voltage measured
with a 1 V differential, provided that V
IN
does not drop below 2.25 V. When V
OUT(nom)
is less than 2.25 V, the output will be in regulation when
2.25 V - V
OUT(nom
) is greater than the dropout voltage specified.
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
www.vishay.com
3
SiP2210
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
V
IN
EN
1
LDO #1
V
OUT1
LDO #2
EN
2
ERR
COMPARATOR
BP
Reference
V
OUT2
ERR
DRV
SW
SW
LOGIC
GND
GND
SW
Fixed Voltage Version
V
IN
EN
1
LDO #1
V
OUT1
ADJ
1
LDO #2
ERR
COMPARATOR
V
OUT2
ADJ
2
ERR
EN
2
BP
Reference
DRV
SW
SW
LOGIC
GND
GND
SW
Adjustable Voltage Version
www.vishay.com
4
Document Number: 73441
S09-1455-Rev. D, 03-Aug-09
SiP2210
Vishay Siliconix
PIN CONFIGURATION AND ORDERING INFORMATION
PowerPAK MLP33-10 with Large Pad
VOLTAGE OPTIONS
Voltage
Code (x, z)
A
F
W
G
D
Y
H
E
J
K
L
M
N
O
P
Q
R
S
T
U
V
1
2
3
4
5
V
IN
EN
1
EN
2
BP
SW
1
2
3
4
5
10
9
8
7
6
V
OUT1
V
OUT1
V
OUT2
V
OUT2
ERR
DRV
GND
ERR
DRV
GND
10
9
8
7
6
Adj
V
IN
EN
1
EN
2
BP
SW
1.5
1.6
1.8
1.85
1.9
2.0
2.1
2.5
2.6
2.7
2.8
2.85
2.9
3.0
3.1
3.2
Top View
Bottom View
Exposed Pad
PowerPAK MLP44-16
V
OUT1
V
OUT2
V
IN
15
V
IN
16
1
2
3
4
8
GND
7
GND
6
NC
5
SW
EN
1
EN
2
BP
ADJ
1
13
ERR
DRV
ADJ
2
GND
SW
12
11
10
9
14
3.3
3.4
3.5
3.6
ORDERING INFORMATION
Part Number
SiP2210DMP-XZ-E3
- 40 °C to 85 °C
SiP2210DLP-AA-E3
X: Output 1 voltage code.
Z: Output 2 voltage code.
Temp. Range
Package
PowerPAK
MLP33-10
PowerPAK
MLP44-16
Marking
10XZ
10AA
Bottom View
PIN DESCRIPTION
Pin Number
MLP33-10
1
2
3
4
5
6
MLP44-16
15, 16
1
6
2
3
4
5
7, 8
9
10
7
8
9
10
11
12
13
14
Name
V
IN
EN
1
NC
EN
2
BP
ADJ
1
SW
GND
GND
SW
ADJ
2
DRV
ERR
V
OUT2
V
OUT1
Function
Input voltage for the power MOSFETs and their gate drive
Enables LDO #1 output.
No Connect
Enables LDO #2 output.
Bypass for noise reduction
Feedback connection for LDO #1
Control for open drain output
Ground
Ground for the internal N-channel MOSFET switch
Feedback connection for LDO #2
Open drain output
ERROR flag output
Output of LDO #2 - 300 mA
Output of LDO #1 - 150 mA
The exposed pad on both packages must be connected externally to the GND pin.
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