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SIT1602BCE21-33E-62.500000

LVCMOS Output Clock Oscillator, 62.5MHz Nom,

器件类别：无源元件    振荡器   

厂商名称：SiTime

器件标准：

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器件参数
参数名称
属性值
是否Rohs认证
符合
Objectid
145211653676
包装说明
DILCC4,.1,83
Reach Compliance Code
unknown
Country Of Origin
Malaysia, Taiwan, Thailand
YTEOL
7
其他特性
ENABLE/DISABLE FUNCTION; ALSO COMPATIBLE WITH HCMOS O/P
最长下降时间
2 ns
频率调整-机械
NO
频率稳定性
20%
JESD-609代码
e4
安装特点
SURFACE MOUNT
端子数量
4
标称工作频率
62.5 MHz
最高工作温度
70 °C
最低工作温度
-20 °C
振荡器类型
LVCMOS
输出负载
15 pF
封装主体材料
PLASTIC
封装等效代码
DILCC4,.1,83
物理尺寸
3.2mm x 2.5mm x 0.85mm
最长上升时间
2 ns
最大供电电压
3.63 V
最小供电电压
2.97 V
标称供电电压
3.3 V
表面贴装
YES
最大对称度
55/45 %
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
文档预览
SiT1602B
Low Power, Standard Frequency Oscillator
Features
◼
Applications
◼
◼
◼
◼
◼
◼
◼
◼
◼
◼
◼
◼
◼
52 standard frequencies between 3.57 MHz and
77.76 MHz
100% pin-to-pin drop-in replacement to quartz-based XO
Excellent total frequency stability as low as ±20 ppm
Operating temperature from -40°C to 85°C. For 125°C
and/or -55°C options, refer to
SiT1618, SiT8918, SiT8920
Low power consumption of 3.5 mA typical at 1.8 V
Qualify just one device with 1.62 V to 3.63 V continuous
supply voltage
Standby mode for longer battery life
Fast startup time of 5 ms
LVCMOS/HCMOS compatible output
Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0,
3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm x mm
Instant samples with
Time Machine II
and
Field
Programmable Oscillators
RoHS and REACH compliant, Pb-free, Halogen-free
and Antimony-free
For AEC-Q100 oscillators, refer to
SiT8924
and
SiT8925
◼
Ideal for DSC, DVC, DVR, IP CAM, Tablets, e-Books,
SSD, GPON, EPON, etc
Ideal for high-speed serial protocols such as: USB,
SATA, SAS, Firewire, 100M/1G/10G Ethernet, etc.
Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics
Parameters
Output Frequency Range
Symbol
f
Min.
Typ.
Max.
Unit
Condition
Refer to
Table 13
for the exact list of supported frequencies
Frequency Range
52 standard frequencies between
MHz
3.57 MHz and 77.76 MHz
Frequency Stability and Aging
Frequency Stability
F_stab
-20
-25
-50
Operating Temperature Range
T_use
-20
-40
Supply Voltage Options
Vdd_1.8
Vdd_2.5
Vdd_2.8
Vdd_3.0
Vdd_3.3
Vdd_XX
Vdd_YY
Current Consumption
Idd
1.62
2.25
2.52
2.7
2.97
2.25
1.62
–
–
–
OE Disable Current
I_OD
–
–
Standby Current
I_std
–
–
–
–
–
–
–
–
1.8
2.5
2.8
3.0
3.3
–
–
3.8
3.7
3.5
–
–
2.6
1.4
0.6
+20
+25
+50
+70
+85
1.98
2.75
3.08
3.3
3.63
3.63
3.63
4.5
4.2
4.1
4.2
4.0
4.3
2.5
1.3
ppm
ppm
ppm
°C
°C
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
A
A
A
No load condition, f = 20 MHz, Vdd_2.8, Vdd_3.0, Vdd_3.3,
Vdd_XX, Vdd_YY
No load condition, f = 20 MHz, Vdd_2.5
No load condition, f = 20 MHz, Vdd_1.8
Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX, Vdd_YY.
OE = GND, Output in high-Z state
Vdd_1.8. OE = GND, Output in high-Z state
ST = GND, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX, Vdd_YY.
Output is weakly pulled down
ST = GND, Vdd_2.5, Output is weakly pulled down
ST = GND, Vdd_1.8, Output is weakly pulled down
Extended Commercial
Industrial
Contact SiTime
for 1.5 V support
Inclusive of initial tolerance at 25°C, 1st year aging at 25°C,
and variations over operating temperature, rated power
supply voltage and load.
Operating Temperature Range
Supply Voltage and Current Consumption
Rev 1.07
10 March 2021
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Table 1. Electrical Characteristics
(continued)
Parameters
Duty Cycle
Rise/Fall Time
Symbol
DC
Tr, Tf
Min.
45
–
–
–
–
Output High Voltage
VOH
90%
Typ.
–
1
1.3
–
–
–
Max.
55
2
2.5
2
2.7
–
Unit
%
ns
ns
ns
ns
Vdd
Condition
All Vdds. See Duty Cycle definition in
Figure 3
and
Footnote 6
20% - 80% Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3
20% - 80% Vdd_1.8
20% - 80% Vdd_XX
20% - 80% Vdd_YY
IOH = -4 mA (Vdd_3.0 and Vdd_3.3)
IOH = -3 mA (Vdd_2.8 and Vdd_ 2.5)
IOH = -2 mA (Vdd_1.8)
IOH = -4 mA (Vdd_3.0 and Vdd_3.3)
IOH = -3 mA (Vdd_2.8 and Vdd_ 2.5)
IOH = -2 mA (Vdd_1.8)
Pin 1, OE or ST
Pin 1, OE or ST
Pin 1, OE logic high or logic low, or ST logic high
Pin 1, ST logic low
Measured from the time Vdd reaches its rated minimum value
f = 77.76 MHz. For other frequencies,
T_oe = 100 ns + 3*cycles
Measured from the time ST pin crosses 50% threshold
f = 75 MHz, Vdd_1.8, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3,
Vdd_XX,
f = 75 MHz, Vdd_YY
f = 75 MHz, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX,
Vdd_YY
f = 75 MHz, Vdd_1.8
f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz.
Vdd_1.8, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz.
Vdd_1.8, Vdd_2.5, Vdd_2.8, Vdd_3.0, Vdd_3.3, Vdd_XX
f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz.
Vdd_YY
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz.
Vdd_YY
LVCMOS Output Characteristics
Output Low Voltage
VOL
–
–
10%
Vdd
Input Characteristics
Input High Voltage
Input Low Voltage
Input Pull-up Impedance
VIH
VIL
Z_in
70%
–
50
2
Startup Time
Enable/Disable Time
Resume Time
RMS Period Jitter
T_start
T_oe
T_resume
T_jitt
–
–
–
–
–
Peak-to-peak Period Jitter
T_pk
–
–
RMS Phase Jitter (random)
T_phj
–
–
–
–
–
–
87
–
–
–
–
1.8
–
12
14
0.5
1.3
–
–
–
30%
150
–
5
138
5
Jitter
3
3.3
25
30
0.9
2
1.4
2.3
ps
ps
ps
ps
ps
ps
ps
ps
Vdd
Vdd
k
M
ms
ns
ms
Startup and Resume Timing
Table 2. Pin Description
Pin
Symbol
Output Enable
1
OE/ST /NC
̅ ̅̅
Functionality
H
[1]
: specified frequency output
L: output is high impedance. Only output driver is disabled.
H
[1]
: specified frequency output
L: output is low (weak pull down). Device goes to sleep mode. Supply
current reduces to I_std.
Any voltage between 0 and Vdd or Open
[1]
: Specified frequency
output. Pin 1 has no function.
Electrical ground
Oscillator output
Power supply voltage
[2]
OE/ST /NC
̅ ̅̅
Top View
VDD
Standby
No Connect
2
3
4
GND
OUT
VDD
Power
Output
Power
GND
OUT
Figure 1. Pin Assignments
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option.
̅ ̅̅
2.
A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Rev 1.07
Page 2 of 18
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance
of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
Vdd
Electrostatic Discharge
Soldering Temperature (follow standard Pb free
soldering guidelines)
Junction Temperature
[3]
Note:
3. Exceeding this temperature for extended period of time may damage the device.
Min.
-65
-0.5
–
–
–
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Table 4. Thermal Consideration
[4]
Package
7050
5032
3225
2520
2016
JA, 4 Layer Board
(°C/W)
142
97
109
117
152
JA, 2 Layer Board
(°C/W)
273
199
212
222
252
JC, Bottom
(°C/W)
30
24
27
26
36
Note:
4. Refer to JESD51 for
JA
and
JC
definitions, and reference layout used to determine the
JA
and
JC
values in the above table.
Table 5. Maximum Operating Junction Temperature
[5]
Max Operating Temperature (ambient)
70°C
85°C
Maximum Operating Junction Temperature
80°C
95°C
Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 6. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev 1.07
Page 3 of 18
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Test Circuit and Waveform
[6]
Vdd
Vout
Test Point
tr
80% Vdd
tf
4
Power
Supply
0.1 uF
1
3
2
15pF
(including probe
and fixture
capacitance)
50%
20% Vdd
High Pulse
(TH)
Period
Low Pulse
(TL)
Vdd
OE/ST Function
1 kΩ
Figure 2. Test Circuit
Note:
6.
Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3. Waveform
Timing Diagrams
90% Vdd
Vdd
Vdd
50% Vdd
[7]
Pin 4 Voltage
T_start
No Glitch
during start up
ST Voltage
T_resume
CLK Output
HZ
T_start: Time to start from power-off
CLK Output
HZ
T_resume: Time to resume from ST
Figure 4. Startup Timing (OE/ ST̅ Mode)
̅ ̅
Figure 5. Standby Resume Timing ( ST̅ Mode Only)
̅ ̅
Vdd
50% Vdd
OE Voltage
T_oe
Vdd
OE Voltage
50% Vdd
T_oe
CLK Output
HZ
T_oe: Time to re-enable the clock output
CLK Output
HZ
T_oe: Time to put the output in High Z mode
Figure 6. OE Enable Timing (OE Mode Only)
Note:
7.
Figure 7. OE Disable Timing (OE Mode Only)
SiT1602 has “no runt” pulses and “no glitch” output during startup or resume.
Rev 1.07
Page 4 of 18
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Performance Plots
[8]
1.8
5.2
5.0
4.8
4.6
4.4
20
15
2.5
2.8
3.0
3.3
DUT1
DUT6
DUT2
DUT7
DUT3
DUT8
DUT4
DUT9
DUT5
DUT10
Frequency (ppm)
10
5
0
-5
-10
-15
-20
Idd (mA)
4.2
4.0
3.8
3.6
3.4
3.2
3.0
10
20
30
40
50
60
70
80
-40
-20
0
20
40
60
80
Figure 8. Idd vs Frequency
Figure 9. Frequency vs Temperature
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
4.0
3.5
55
54
53
RMS period jitter (ps)
3.0
2.5
2.0
1.5
1.0
0.5
46
0.0
10
20
30
40
50
60
70
80
45
10
20
30
40
50
60
70
80
Duty cycle (%)
52
51
50
49
48
47
Figure 10. RMS Period Jitter vs Frequency
Figure 11. Duty Cycle vs Frequency
1.8 V
2.5
2.5 V
2.8 V
3.0 V
3.3 V
2.5
1.8 V
2.5 V
2.8 V
3.0 V
3.3 V
2.0
2.0
Rise time (ns)
Fall time (ns)
1.5
1.5
1.0
1.0
0.5
0.5
0.0
-40
-15
10
35
60
85
0.0
-40
-15
10
35
60
85
Figure 12. 20%-80% Rise Time vs Temperature
Figure 13. 20%-80% Fall Time vs Temperature
Rev 1.07
Page 5 of 18
www.sitime.com
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器件捷径:
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ
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