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SIT3373AI-2E1-25EX725.000000Y

LVDS Output Clock Oscillator, 725MHz Nom, QFN-6

器件类别:无源元件    振荡器   

厂商名称:SiTime

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
SiTime
Reach Compliance Code
unknown
其他特性
ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
最大控制电压
2.25 V
最小控制电压
0.25 V
最长下降时间
0.47 ns
频率调整-机械
NO
频率偏移/牵引率
400 ppm
频率稳定性
20%
JESD-609代码
e4
安装特点
SURFACE MOUNT
端子数量
6
标称工作频率
725 MHz
最高工作温度
85 °C
最低工作温度
-40 °C
振荡器类型
LVDS
输出负载
50 OHM
物理尺寸
7.0mm x 5.0mm x 0.9 mm
最长上升时间
0.47 ns
最大压摆率
89 mA
最大供电电压
2.75 V
最小供电电压
2.25 V
标称供电电压
2.5 V
表面贴装
YES
最大对称度
55/45 %
技术
LVDS
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
Base Number Matches
1
文档预览
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Features
Applications
Any frequency between 220.000001 MHz and 725 MHz
accurate to 6 decimal places
Widest pull range options: ±25, ±50, ±80, ±100, ±150,
±200, ±400, ±800, ±1600, ±3200ppm
0.23 ps RMS phase jitter (typ) over 12 kHz to 20 MHz
bandwidth
Wide temperature range support from -40°C to 85°C
Contact
SiTime
for other temperature range options
Industry-standard packages: 3.2 x 2.5, 7.0 x 5.0 mm
Contact
SiTime
for 5.0 x 3.2 mm package
For frequencies 1 MHz to 220 MHz, refer to
SiT3372
Cable Modem Termination System (CMTS), Video,
Broadcasting System, Audio, Industrial Sensors, Remote
Radio Head (RRH)
SATA, SAS, 10GB Ethernet, Fibre Channel, PCI-Express
Optical Transport Network (OTN)
Electrical Characteristics
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with standard
output termination show in the termination diagrams. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics – Common to LVPECL, LVDS and HCSL
Parameter
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
220.000001
-15
Typ.
Max.
725
+15
Unit
MHz
ppm
Condition
Accurate to 6 decimal places
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, load variations, and first year aging at 25°C.
Contact
SiTime
for ±15 ppm.
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, load variations, and first year aging at 25°C.
Frequency Range
Frequency Stability
-20
-30
-50
Operating Temperature Range
T_use
-20
-40
Supply Voltage
Vdd
2.97
2.7
2.52
2.25
Pull Range
Upper Control Voltage
Lower Control Voltage
Control Voltage Input Impedance
Control Voltage Input Bandwidth
Pull Range Linearity
Frequency Change Polarity
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Duty Cycle
Start-up Time
OE Enable/Disable Time
PR
VC_U
VC_L
VC_z
V_c
Lin
VIH
VIL
Z_in
DC
T_start
T_oe
70%
45
3.3
3.0
2.8
2.5
+20
+30
+50
+70
+85
Supply Voltage
3.63
3.3
3.08
2.75
ppm
ppm
ppm
°C
°C
V
V
V
V
ppm
Vdd
Vdd
kHz
%
Temperature Range
Extended Commercial
Industrial. Contact
SiTime
for other temperature range options.
Voltage Control Characteristics
±25, ±50, ±80, ±100, ±150, ±200,
±400, ±800, ±1600, ±3200ppm
90%
10
10
Positive Slope
100
30%
-
55
3.0
3.8
10%
1.0
See the APR (Absolute Pull Range)
Table 11
Contact
SiTime
for custom pull range options.
Voltage at which maximum frequency deviation is guaranteed
Voltage at which minimum frequency deviation is guaranteed
Contact
SiTime
for other input bandwidth options
Input Characteristics
Vdd
Vdd
%
ms
µs
Measured from the time Vdd reaches its rated minimum value.
Pin 2, OE
Pin 2, OE
Pin 2, OE logic high or logic low
Output Characteristics
Startup and OE Timing
Rev 1.0
September 30, 2017
www.sitime.com
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 2. Pin Description
Pin
1
Symbol
VIN
Input
No Connect
(NC)
2
NC/OE
Output Enable
(OE)
Power
Output
Output
Power
Control Voltage
No Connect: Leave floating or connect to GND for better heat dissipation. NC for all 3.2 x 2.5 mm
package options.
H
: specified frequency output
L: output is high impedance. Only output driver is disabled. OE function only available on 7050
package. Pin 2 on 3225 package is NC.
Vdd Power Supply Ground
Oscillator output
Complementary oscillator output
Power supply voltage
[3]
[1,2]
Functionality
3
4
5
6
GND
OUT+
OUT-
Vdd
Top View
VIN
NC/OE
[1]
GND
1
6
Top View
VDD
OUT-
OUT+
VIN
NC
[2]
GND
1
6
VDD
OUT-
OUT+
2
5
2
5
3
4
3
4
Figure 1. Pin Assignments
(7.0 x 5.0 mm package)
Figure 2. Pin Assignments
(3.2 x 2.5 mm package)
Notes:
1. OE mode is only available in the 7050 package. 3225 package is NC.
2. A pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven.
3. A capacitor of value 0.1 µF or higher between Vdd and GND is required. An additional 10 µF capacitor between Vdd and GND is required for the best
phase jitter performance.
Table 3. Electrical Characteristics – LVPECL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
Min.
Vdd-1.1
Vdd-1.9
1.2
Typ.
0.15
1.6
225
Max.
97
63
32
Vdd-0.7
Vdd-1.5
2.0
290
Jitter
0.225
RMS Phase Jitter (random)
T_phj
RMS Period Jitter
[4]
Unit
mA
mA
A
mA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See Figure 3
See Figure 3
See Figure 4
20% to 80%, see Figure 3
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. 7.0 x 5.0 mm package.
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. 3.2 x 2.5 mm package.
f = 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, all Vdd levels,
includes spurs.
f = 322.265625 MHz, Vdd = 3.3V or 2.5V
Current Consumption
Output Characteristics
0.270
0.275
1.6
ps
ps
ps
ps
0.225
0.1
1.0
T_jitt
Rev 1.0
Page 2 of 13
www.sitime.com
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 4. Electrical Characteristics – LVDS Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
VOD
ΔVOD
VOS
ΔVOS
Tr, Tf
Min.
250
1.125
Typ.
0.15
370
Max.
89
67
450
50
1.375
50
470
Jitter
RMS Phase Jitter (random)
T_phj
0.215
0.235
0.1
0.265
0.282
ps
ps
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. 7.0 x 5.0 mm package.
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. 3.2 x 2.5 mm package.
f = 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, all Vdd levels,
includes spurs.
f = 322.265625 MHz, Vdd = 3.3V or 2.5V
Unit
mA
mA
A
mV
mV
V
mV
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
See Figure 5
See Figure 5
See Figure 5
See Figure 5
Measured with 2 pF capacitive loading to GND, 20% to 80%, see
Figure 5
Current Consumption
Output Characteristics
RMS Period Jitter
[4]
T_jitt
0.92
1.6
ps
Table 5. Electrical Characteristics – HCSL
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
Min.
0.6
-0.05
1.2
Typ.
0.15
1.4
360
Max.
102
67
36
0.90
0.08
1.8
470
Jitter
RMS Phase Jitter (random)
T_phj
0.215
0.225
0.1
0.270
0.275
ps
ps
ps
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. 7.0 x 5.0 mm package.
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. 3.2 x 2.5 mm package.
f = 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, all Vdd levels,
includes spurs.
f = 322.265625 MHz, Vdd = 3.3V or 2.5V
Unit
mA
mA
A
mA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See Figure 3
See Figure 3
See Figure 4
Measured with 2 pF capacitive loading to GND, 20% to 80%, see
Figure 3
Current Consumption
Output Characteristics
RMS Period Jitter
[4]
T_jitt
1.0
1.6
ps
Notes:
4. Measure according to JESD65B.
Rev 1.0
Page 3 of 13
www.sitime.com
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Table 6. Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Vdd
VIH
VIL
Storage Temperature
Maximum Junction Temperature
Soldering Temperature (follow standard Pb-free soldering guidelines)
-0.3
-65
150
130
260
Min.
-0.5
Max.
4.0
Vdd + 0.3V
Unit
V
V
V
ºC
ºC
ºC
Table 7. Thermal Considerations
Package
3225, 6-pin
7050, 6-pin
[5]
JA
, 4 Layer Board (°C/W)
80
52
JC
, Bottom (°C/W)
30
19
Notes:
5. Refer to JESD51 for
JA
and
JC
definitions, and reference layout used to determine the
JA
and
JC
values in the above table.
Table 8. Maximum Operating Junction Temperature
Max Operating Temperature (ambient)
70°C
85°C
[6]
Maximum Operating Junction Temperature
95°C
110°C
Notes:
6. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 9. Environmental Compliance
Parameter
Mechanical Shock Resistance
Mechanical Vibration Resistance
Soldering Temperature (follow standard Pb free soldering guidelines)
Moisture Sensitivity Level
Electrostatic Discharge (HBM)
Charge-Device Model ESD Protection
Latch-up Tolerance
Test Conditions
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
MIL-STD-883F, Method 2003
MSL1 @ 260°C
HBM, JESD22-A114
JESD220C101
2,000
750
JESD78 Compliant
V
V
Value
10,000
70
260
Unit
g
g
°C
Rev 1.0
Page 4 of 13
www.sitime.com
SiT3373
220 MHz to 725 MHz Ultra-low Jitter Differential VCXO
Waveform Diagrams
OUT-
80%
80%
20%
OUT+
20%
VOH
Tr
GND
VOL
Tf
Figure 3. LVPECL/HCSL Voltage Levels per Differential Pin (OUT+/OUT-)
V_ Swing
0V
t
Figure 4. LVPECL/HCSL Voltage Levels across Differential Pair
OUT-
80%
VOD
80%
20%
OUT+
20%
VOS
Tr
GND
Tf
Figure 5. LVDS Voltage Levels per Differential Pin (OUT+/OUT-)
Rev 1.0
Page 5 of 13
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