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SiT3521

1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator

Description

The

SiT3521

is an ultra-low jitter, user programmable

oscillator which offers the system designer great flexibility

and functionality.

The device supports two in-system programming options

after powering up at a default, factory programmed startup

frequency:

◼

Features

◼

Any-frequency mode where the clock output can be

re-programmed to any frequency between 1 MHz and

340 MHz in 1 Hz steps

Digitally controlled oscillator (DCO) mode where the clock

output can be steered or pulled by up to ±3200 ppm with

5 to 94 ppt (parts per trillion) resolution.

◼

The device’s default start-up frequency is specified in the

ordering code. User programming of the device is achieved

via I

C or SPI. Up to 16 I

C addresses can be specified by

the user either as a factory programmable option or via

hardware pins, enabling the device to share the I

C with

other I

C devices.

The SiT3521 utilizes SiTime’s unique DualMEMS

temperature sensing and TurboCompensation

technology

to deliver exceptional dynamic performance:

◼

Programmable frequencies (factory or via I

C/SPI)

from 1 MHz to 340 MHz

Digital frequency pulling (DCO) via I

C/SPI

▪

Output frequency pulling with perfect pull linearity

▪

13 programmable pull range options to

±3200

ppm

▪

Frequency pull resolution as low as 5 ppt (0.005 ppb)

0.21 ps typical integrated phase jitter (12 kHz to 20 MHz)

Integrated LDO for on-chip power supply noise filtering

0.02 ps/mV PSNR

-40°C to 105°C operating temperature

LVPECL, LVDS, or HCSL outputs

▪

Programmable LVPECL, LVDS Swing

▪

LVDS Common Mode Voltage Control

RoHS and REACH compliant, Pb-free, Halogen-free

and Antimony-free

Applications

◼

Resistant to airflow and thermal shock

Resistant to shock and vibration

Superior power supply noise rejection

Combined with wide frequency range and user

programmability, this device is ideal for telecom, networking

and industrial applications that require a variety of

frequencies and operate in noisy environment.

Ethernet: 1/10/40/100/400 Gbps

G.fast and xDSL

Optical Transport: SONET/SDH, OTN

Clock and data recovery

Processor over-clocking

Low jitter clock generation

Server, storage, datacenter

Test and measurement

Broadcasting

Block Diagram

Package Pinout

(10-Lead QFN, 5.0 x 3.2 mm)

LK ISO

OE / NC

GND

VDD

OUT-

OUT+

A1 A0

/N /N

C/ C/

M SS

Figure 1. SiT3521 Block Diagram

Figure 2. Pin Assignments (Top view)

(Refer to

Table 14

for Pin Descriptions)

Rev 1.01

30 April 2021

www.sitime.com

SiT3521

1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator

Ordering Information

SiT3521 AC -1C133 1 GG156.250000T

Part Family

“SiT3521”

12 mm Tape & Reel, 3 ku reel

12 mm Tape & Reel, 1 ku reel

[2]

Revision Letter

“A” is the revision of Silicon

Frequency

1.000000 to 340. 000000 MHz

Temperature Range

“C” : Extended Commercial, -20 to 70°C

“ I ” : Industrial, -40 to 85°C

“E” : Extended Industrial, -40 to 105°C

[1]

DCXO Pull Range

“M”

“B”

“C”

“E”

“F”

“G”

“H”

“X”

“L”

“Y”

“S”

“Z”

“U”

± 25 ppm

± 50 ppm

± 80 ppm

±100 ppm

±125 ppm

±150 ppm

±200 ppm

±400 ppm

± 600 ppm

±800 ppm

±1200 ppm

±1600 ppm

±3200 ppm

Signaling Type

“1”: LVPECL

“2”: LVDS

“4”: HCSL

Package Size

“C”: 5.0 x 3.2 mm

Frequency Stability/Grade

“F”: ±10 ppm

“1”: ±20 ppm

“2”: ±25 ppm

“3”: ±50 ppm

Serial IF mode

“S”

: SPI mode

[1]

“0-G”

: I

C mode (See below)

I C Factory Programmable Addresses

“0-F” : I C Address factory programmed

Sets Bits 3: 0 of Device I

C address to

the Hex value of the ordering code .

When the I C address is factory

programmed using these codes ,

pin A0, A1 are NC

“G”: I

C address controlled by A0, A1 pins

A1:A0

C Address

1100000

1100010

1101000

1101010 (default)

Voltage Supply

“25”:

“28”:

“30”:

“33”:

2.5 V

2.8 V

3.0 V

3.3 V

±10%

OE Pin Control

“-”: OE under software Control.

Pin 1 and 2 are both NC.

“1”: Pin 1 OE, Pin 2 NC

“2”: Pin 1 NC, Pin 2 OE

Notes:

1. -40 to 105°C option available only for I

C operation.

2. Bulk is available for sampling only.

Rev 1.01

Page 2 of 45

www.sitime.com

SiT3521

1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator

TABLE OF CONTENTS

Description ................................................................................................................................................................................... 1

Features....................................................................................................................................................................................... 1

Applications ................................................................................................................................................................................. 1

Block Diagram ............................................................................................................................................................................. 1

Ordering Information .................................................................................................................................................................... 2

1 Electrical Characteristics ......................................................................................................................................................... 4

2 Device Configurations and Pin-outs ........................................................................................................................................ 9

3 Waveform Diagrams ............................................................................................................................................................. 11

4 Termination Diagrams ........................................................................................................................................................... 13

LVPECL .................................................................................................................................................................... 13

LVDS ........................................................................................................................................................................ 14

HCSL ........................................................................................................................................................................ 15

5 Test Circuit Diagrams ........................................................................................................................................................... 16

6 Architecture Overview ........................................................................................................................................................... 18

7 Functional Overview ............................................................................................................................................................. 18

User Programming Interface ..................................................................................................................................... 18

Start-up output frequency and signaling types ........................................................................................................... 18

In-system programmable options.............................................................................................................................. 18

8 In-system Programmable Functional Description.................................................................................................................. 19

Any-frequency function ............................................................................................................................................. 19

DCO Functional Description ..................................................................................................................................... 23

Pull Range, Absolute Pull Range .............................................................................................................................. 25

Software OE Functional Description ......................................................................................................................... 27

C/SPI Control Registers...................................................................................................................................................... 28

9 I

Register Address: 0x00. DCO Frequency Control Least Significant Word (LSW) .................................................... 28

Register Address: 0x01. OE Control, DCO Frequency Control Most Significant Word (MSW) ................................. 29

Register Address: 0x02. DCO PULL RANGE CONTROL ........................................................................................ 29

Value MSW ............................................................................................................................................................... 30

Register Address: 0x04. Frac-N PLL Feedback Divider Fraction Value LSW ........................................................... 30

Register Address: 0x05. Forward Divider, Driver Control ......................................................................................... 30

Register Address: 0x06. Driver Divider, Driver Control ............................................................................................. 31

C Operation ........................................................................................................................................................................ 32

10 I

C protocol ............................................................................................................................................................... 32

C Timing Specification ............................................................................................................................................ 35

C Device Address Modes ....................................................................................................................................... 36

11 SPI Operation ....................................................................................................................................................................... 37

Schematic Examples ................................................................................................................................................................. 40

Dimensions and Patterns ........................................................................................................................................................... 43

Additional Information ................................................................................................................................................................ 44

Revision History ......................................................................................................................................................................... 45

Rev 1.01

Page 3 of 45

www.sitime.com

SiT3521

1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator

1 Electrical Characteristics

All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with

standard output terminations shown in the termination diagrams. Typical values are at 25°C and nominal supply voltage.

Table 1. Electrical Characteristics – Common to LVPECL, LVDS and HCSL

Parameter

Output Frequency Range

Symbol

Min.

Typ.

–

±1

–

Max.

340

Unit

MHz

Condition

Factory or user programmable, accurate to 6 decimal places

Frequency Range

Frequency Stability

F_stab

-10

-20

-25

-50

First Year Aging

F_1y

–

+10

+20

+25

+50

–

ppm

°C

-year aging at 25°C

Inclusive of initial tolerance, operating temperature, rated

power supply voltage and load variations.

Temperature Range

Operating Temperature Range

T_use

-20

-40

+70

+85

+105

Supply Voltage

Vdd

2.97

2.7

2.52

2.25

3.3

3.0

2.8

2.5

–

100

–

3.63

3.3

3.08

2.75

–

30%

–

Extended Commercial

Industrial

Extended Industrial. Available only for I

C operation, not SPI.

Input Characteristics – OE Pin

Input Voltage High

Input Voltage Low

Input Pull-up Impedance

VIH

VIL

Z_in

70%

–

Vdd

kΩ

OE pin

OE pin, logic high or logic low

Output Characteristics

Duty Cycle

–

Startup and Output Enable/Disable Timing

Start-up Time

Output Enable/Disable Time –

Hardware control via OE pin

Output Enable/Disable Time –

Software control via I

C/SPI

T_start

T_oe_hw

3.0

3.8

µs

Measured from the time Vdd reaches its rated minimum value

Measured from the time OE pin reaches rated VIH and VIL to

the time clock pins reach 90% of swing and high-Z.

See

Figure 9

and

Figure 10

Measured from the time the last byte of command is

transmitted via I

C/SPI (reg1) to the time clock pins reach 90%

of swing and high-Z. See

Figure 30

and

Figure 31

T_oe_sw

–

6.5

µs

Rev 1.01

Page 4 of 45

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SiT3521

1 to 340 MHz Elite Platform I2C/SPI Programmable Oscillator

Table 2. Electrical Characteristics – LVPECL Specific

Parameter

Symbol

Min.

Typ.

Max.

Unit

Condition

Current Consumption

OE Disable Supply Current

Output Disable Leakage Current

Maximum Output Current

Idd

I_OE

I_leak

I_driver

–

0.15

–

A

Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V

OE = Low

Maximum average current drawn from OUT+ or OUT-

Output Characteristics

Output High Voltage

Output Low Voltage

Output Differential Voltage Swing

Rise/Fall Time

VOH

VOL

V_Swing

Tr, Tf

Vdd - 1.1V

Vdd - 1.9V

1.2

–

1.6

225

Vdd - 0.7V

Vdd - 1.5V

2.0

290

Jitter

RMS Phase Jitter (random) –

DCO Mode Only

T_phj

–

RMS Phase Jitter (random) –

Any-frequency Mode Only

T_phj

–

RMS Period Jitter

[3]

Note:

3. Measured according to JESD65B.

T_jitt

–

0.225

0.1

0.225

0.11

0.340

0.14

0.340

0.15

1.6

f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,

all Vdd levels

f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration

bandwidth = 1.875 MHz to 20 MHz, all Vdd levels

f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,

all Vdd levels

f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration

bandwidth = 1.875 MHz to 20 MHz, all Vdd levels

f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V

See

Figure 5

See

Figure 5

See

Figure 6

20% to 80%, see

Figure 6

Table 3. Electrical Characteristics – LVDS Specific

Parameter

Symbol

Min.

Typ.

Max.

Unit

Condition

Current Consumption

OE Disable Supply Current

Output Disable Leakage Current

Idd

I_OE

I_leak

–

0.15

–

A

Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V

OE = Low

Output Characteristics

Differential Output Voltage

Delta VOD

Offset Voltage

Delta VOS

Rise/Fall Time

VOD

ΔVOD

VOS

ΔVOS

Tr, Tf

250

–

1.125

–

400

455

1.375

470

Jitter

RMS Phase Jitter (random) –

DCO Mode Only

T_phj

–

RMS Phase Jitter (random) –

Any-frequency Mode Only

T_phj

–

RMS Period Jitter

[4]

Note:

4. Measured according to JESD65B.

T_jitt

–

0.21

0.1

0.21

0.1

0.275

0.12

0.367

0.12

1.6

f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,

all Vdd levels

f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration

bandwidth = 1.875 MHz to 20 MHz, all Vdd levels

f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz,

all Vdd levels

f = 156.25, IEEE802.3-2005 10 GbE jitter mask integration

bandwidth = 1.875 MHz to 20 MHz, all Vdd levels

f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V

f = 156.25MHz See

Figure 7

See

Figure 7

See

Figure 7

See

Figure 7

Measured with 2 pF capacitive loading to GND, 20% to 80%,

see

Figure 8

Rev 1.01

Page 5 of 45

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