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SIT5147AE-FD533JUA98.123456T

LVCMOS Output Clock Oscillator, 98.123456MHz Nom, QFN-10

器件类别:无源元件    振荡器   

厂商名称:SiTime

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
包装说明
LCC10,.13X.2,58/52/48
Reach Compliance Code
unknown
老化
1 PPM/YEAR
最长下降时间
1.9 ns
频率调整-机械
NO
频率稳定性
2.5%
安装特点
SURFACE MOUNT
端子数量
10
标称工作频率
98.123456 MHz
最高工作温度
105 °C
最低工作温度
-40 °C
振荡器类型
LVCMOS
输出负载
15 pF
封装主体材料
CERAMIC
封装等效代码
LCC10,.13X.2,58/52/48
物理尺寸
5.15mm x 3.35mm x 1.06mm
最长上升时间
1.9 ns
最大压摆率
62 mA
最大供电电压
3.63 V
最小供电电压
2.97 V
标称供电电压
3.3 V
表面贴装
YES
最大对称度
55/45 %
文档预览
SiT5147
PRELIMINARY
60 MHz to 220 MHz, ±0.5 to ±2.5 ppm, Endura™ Series Super-TCXO
Description
The
SiT5147
is a ruggedized ±0.5 to ±2.5 ppm MEMS
Features
Super-TCXO with a maximum acceleration sensitivity of
0.009 ppb/g or 0.1 ppb/g. Engineered for best dynamic
performance, it is ideal for high reliability defense, space,
avionics, guidance, precision GNSS and communications
applications.
Leveraging SiTime’s unique DualMEMS™ temperature
sensing and TurboCompensation™ technologies, the
SiT5147 delivers the best dynamic performance for timing
stability in the presence of environmental stressors due to
air flow, temperature perturbation, vibration, shock, and
electromagnetic interference. This device also integrates
multiple on-chip regulators to filter power supply noise,
eliminating the need for a dedicated external LDO.
The SiT5147 offers three device configurations that can be
ordered using
Ordering Codes
for:
1) TCXO with non-pullable output frequency,
2) VCTCXO allowing voltage control of output
frequency, and
3) DCTCXO, enabling digital control of output frequency
using an I
2
C interface, pullable to 5 ppt (parts per
trillion) resolution.
The SiT5147 can be factory programmed for any
combination of frequency, stability, voltage, and pull range.
Programmability enables designers to optimize clock
configurations while eliminating long lead times and
customization costs associated with quartz devices where
each frequency is custom built.
Refer to
Manufacturing Guideline
for proper reflow profile
and PCB cleaning recommendations to ensure best
performance.
Output 60–189 MHz, and 200–220 MHz, in 1 Hz steps
Factory programmable options for low lead time
Best dynamic stability under airflow, thermal shock
0.009 ppb/g or 0.1 ppb/g acceleration sensitivity
±0.5 ppm stability across temperature
±15 ppb/C typical frequency slope (ΔF/ΔT)
-40°C to +105°C operating temperature
No activity dips or micro jumps
Resistant to shock, vibration and board bending
On-chip regulators eliminate the need for external LDOs
Digital frequency pulling (DCTCXO) via I
2
C
Digital control of output frequency and pull range
Up to
±3200
ppm pull range
Frequency pull resolution down to 5 ppt
2.5V, 2.8V, 3.0V and 3.3V supply voltage
LVCMOS output
RoHS and REACH compliant
Pb-free, Halogen-free, Antimony-free
Contact SiTime
for up-screening and LAT programs
Applications
Ballistics, missiles, munitions
Military portable radios
Ruggedized communications networks
Precision GNSS systems
SATCOM
Transponders
Military, defense, space, avionics systems
Block Diagram
5.0 x 3.2 mm
2
Package Pinout
SDA / NC
OE / VC / NC
SCL / NC
NC
GND
1
10
9
VDD
NC
NC
CLK
2
3
8
7
4
5
6
A0 / NC
Figure 1. SiT5147 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 11
for Pin Descriptions)
July 22, 2019
www.sitime.com
Rev 0.91
SiT5147
60 MHz to 220 MHz, ±0.5 to ±2.5 ppm, Endura™ Series Super-TCXO
Ordering Information
PRELIMINARY
The following part number guide is for reference only. To customize and build an exact part number, use the
SiTime
Part Number Generator.
To validate the part number, use the SiTime
Part Number Decoder.
Package Size
"F": 5.0 x 3.2 mm
2
Output Waveform
"-" : LVCMOS
[1]
Silicon Revision Letter
Part Family
Pin 1 Function
TCXO mode only
"E": Output Enable
"N": No Connect
TCXO
VCTCXO
DCTCXO
Temperature Range
SiT5 1 4 7 A C
-
F K- 33E 0 B 98.123456T
SiT5 1 4 7 A C
-
F K- 33 V T B 98.123456T
SiT5 1 4 7 A C
-
F KG 33J R B 98.123456T
Packaging
"T": 12mm Tape & Reel, 3ku reel
"Y": 12mm Tape & Reel, 1ku reel
“X”: 12mm Tape & Reel, 250u reel
(blank): bulk
[2]
"I": Industrial, -40 to 85
°C
"C": Extended Commercial, -20 to 70
°C
"E": Extended Industrial, -40 to 105
°C
Frequency Stability
"K": for
±0.5
ppm
"A": for
±1.0
ppm
"D": for
±2.5
ppm
Frequency
60.000001 to 189.000000 MHz
200.000000 to 220.000000 MHz
I
2
C Address Mode
DCTCXO mode only
Values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
Set bits 3:0 of device
I
2
C address to the Hex value
of the ordering code. When the
I
2
C address is
factory programmed using these codes, pin
A0 is NC.
Value: G
The
I
2
C address is controlled by A0 pin.
Special Features
"A": Low g-Sensitivity, 0.1 ppb/g
"B": Ultra-low g-Sensitivity, 0.009 ppb/g
Pull Range
DCTCXO mode only
"T":
±6.25
ppm
"R":
±10
ppm
"Q":
±12.5
ppm
"M":
±25
ppm
"B":
±50
ppm
"C":
±80
ppm
"E":
±100
ppm
"F":
±125
ppm
"G":
"H":
"X":
"L":
"Y":
"S":
"Z":
"U":
±150 ppm
±200 ppm
±400 ppm
±600 ppm
±800 ppm
±1200 ppm
±1600 ppm
±3200 ppm
Supply Voltage
"25": 2.5 V
±
10%
"28": 2.8 V
±
10%
"30": 3.0 V
±
10%
"33": 3.3 V
±
10%
Pin 1 Function
DCTCXO mode only
"I": Output Enable
"J": No Connect, software OE control
Notes:
1. “-“ corresponds to the default rise/fall time for LVCMOS output as specified in
Table 1
(Electrical Characteristics). Contact
SiTime
for other rise/fall time
options for best EMI. For differential outputs, contact
SiTime.
2. Bulk is available for sampling only.
Rev 0.91
Page 2 of 32
www.sitime.com
SiT5147
60 MHz to 220 MHz, ±0.5 to ±2.5 ppm, Endura™ Series Super-TCXO
TABLE OF CONTENTS
PRELIMINARY
Description ................................................................................................................................................................................... 1
Features....................................................................................................................................................................................... 1
Applications ................................................................................................................................................................................. 1
Block Diagram ............................................................................................................................................................................. 1
5.0 x 3.2 mm
2
Package Pinout ..................................................................................................................................................... 1
Ordering Information .................................................................................................................................................................... 2
Electrical Characteristics.............................................................................................................................................................. 4
Device Configurations and Pin-outs ............................................................................................................................................. 8
Pin-out Top Views................................................................................................................................................................. 8
Test Circuit Diagrams for LVCMOS Outputs................................................................................................................................ 9
Waveforms................................................................................................................................................................................. 10
Timing Diagrams ........................................................................................................................................................................ 10
Typical Performance Plots ......................................................................................................................................................... 11
Architecture Overview ................................................................................................................................................................ 12
Frequency Stability ............................................................................................................................................................. 12
Output Frequency and Format ............................................................................................................................................ 12
Output Frequency Tuning ................................................................................................................................................... 12
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 12
Device Configurations ................................................................................................................................................................ 13
TCXO Configuration ........................................................................................................................................................... 13
VCTCXO Configuration ...................................................................................................................................................... 14
DCTCXO Configuration ...................................................................................................................................................... 15
VCXO-Specific Design Considerations ...................................................................................................................................... 16
Linearity .............................................................................................................................................................................. 16
Control Voltage Bandwidth ................................................................................................................................................. 16
FV Characteristic Slope K
V
................................................................................................................................................. 16
Pull Range, Absolute Pull Range ........................................................................................................................................ 17
DCTCXO-Specific Design Considerations ................................................................................................................................. 18
Pull Range and Absolute Pull Range .................................................................................................................................. 18
Output Frequency ............................................................................................................................................................... 19
I
2
C Control Registers .......................................................................................................................................................... 21
Register Descriptions.......................................................................................................................................................... 21
Register Address: 0x00. Digital Frequency Control Least Significant Word (LSW) ............................................................ 21
Register Address: 0x01. OE Control, Digital Frequency Control Most Significant Word (MSW) ......................................... 22
Register Address: 0x02. DIGITAL PULL RANGE CONTROL
[14]
........................................................................................ 23
Serial Interface Configuration Description .......................................................................................................................... 24
Serial Signal Format ........................................................................................................................................................... 24
Parallel Signal Format ........................................................................................................................................................ 25
Parallel Data Format ........................................................................................................................................................... 25
I
2
C Timing Specification ...................................................................................................................................................... 27
I
2
C Device Address Modes ................................................................................................................................................. 28
Schematic Example ............................................................................................................................................................ 29
Dimensions and Patterns ........................................................................................................................................................... 30
Layout Guidelines ...................................................................................................................................................................... 31
Manufacturing Guidelines .......................................................................................................................................................... 31
Rev 0.91
Page 3 of 32
www.sitime.com
SiT5147
60 MHz to 220 MHz, ±0.5 to ±2.5 ppm, Endura™ Series Super-TCXO
Electrical Characteristics
PRELIMINARY
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and 3.3V Vdd.
Table 1. Output Characteristics
Parameters
Nominal Output Frequency Range
Symbol
F_nom
Min.
60.000001
200
Operating Temperature Range
T_use
-20
-40
-40
Acceleration (g) sensitivity, Gamma
Vector
F_g
Typ.
Max.
189
220
+70
+85
+105
Unit
MHz
MHz
°C
°C
°C
Extended Commercial, ambient temperature
Industrial, ambient temperature
Extended Industrial, ambient temperature
Ultra-low sensitivity grade; total gamma over 3 axes; 15 Hz
to 2 kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Low sensitivity grade; total gamma over 3 axes; 15 Hz to
2 kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Referenced to (max frequency + min frequency)/2 over the
rated temperature range. Vc=Vdd/2 for VCTCXO
Condition
Frequency Coverage
Temperature Range
Rugged Characteristics
0.004
0.009
0.1
ppb/g
ppb/g
Frequency Stability
Frequency Stability over
Temperature
F_stab
-0.5
-1.0
-2.5
Initial Tolerance
Supply Voltage Sensitivity
F_init
F_Vdd
-1
-16.25
-32.50
-65.0
Output Load Sensitivity
F_load
-2.75
-5.50
-11.00
Frequency vs. Temperature Slope
ΔF/ΔT
-25
-50
-100
Dynamic Frequency Change during
Temperature Ramp
F_dynamic
-0.21
-0.42
-0.83
One-Year Aging
20-Year Aging
F_1y
F_20y
±7.10
±11.83
±28.40
±0.81
±1.35
±3.24
±15
±25
±60
±0.13
±0.21
±0.50
±1
±2
+0.5
+1.0
+2.5
+1
+16.25
+32.50
+65.0
+2.75
+5.50
+11.00
+25
+50
+100
+0.21
+0.42
+0.83
ppm
ppm
ppm
ppm
ppb
ppb
ppb
ppb
ppb
ppb
ppb/°C
ppb/°C
ppb/°C
ppb/s
ppb/s
ppb/s
ppm
ppm
Initial frequency at 25°C inclusive of solder-down shift
at 48 hours after 2 reflows
±0.5 ppm F_stab, Vdd ±5%
±1.0ppm F_stab, Vdd ±5%
±2.5 ppm F_stab, Vdd ±5%
±0.5 ppm F_stab. LVCMOS output, 15 pF ±10%. Clipped
sinewave output, 10kΩ || 10 pF ±10%
±1.0 ppm F_stab. LVCMOS output, 15 pF ±10%. Clipped
sinewave output, 10kΩ || 10 pF ±10%
±2.5 ppm F_stab. LVCMOS output, 15 pF ±10%. Clipped
sinewave output, 10kΩ || 10 pF ±10%
±0.5 ppm F_stab, 0.5°C/min ramp rate, -40 to 105 ºC
±1.0 ppm F_stab, 0.5°C/min ramp rate, -40 to 105 ºC
±2.5 ppm F_stab, 0.5°C/min ramp rate, -40 to 105 ºC
±0.5 ppm F_stab, 0.5°C/min ramp rate, -40 to 105 ºC
±1.0 ppm F_stab, 0.5°C/min ramp rate, -40 to 105 ºC
±2.5 ppm F_stab, 0.5°C/min ramp rate, -40 to 105 ºC
At 25°C, after 2-days of continued operation. Aging is
measured with respect to day 3.
At 25°C, after 2-days of continued operation. Aging is
measured with respect to day 3.
60 to 150 MHz
150 to 189 MHz, 200 to 220 MHz
10% - 90% Vdd
IOH = +3mA
IOL = -3mA
Impedance looking into output buffer
Time to first pulse, measured from the time Vdd reaches
90% of its final value. Vdd ramp time = 100 µs from 0V to
Vdd
See
Timing Diagrams
section below.
Time to first accurate pulse within rated stability, measured
from the time Vdd reaches 90% of its final value. Vdd
ramp time = 100 µs
LVCMOS Output Characteristics
Duty Cycle
Rise/Fall Time
Output Voltage High
Output Voltage Low
Output Impedance
Start-up Time
DC
Tr, Tf
VOH
VOL
Z_out_c
T_start
45
42
0.8
90%
1.2
20
2.5
55
55
1.9
10%
3.5
%
%
ns
Vdd
Vdd
Ohms
ms
Start-up Characteristics
Output Enable Time
First Pulse Accuracy
T_oe
T_stability
5
285
45
ns
ms
Rev 0.91
Page 4 of 32
www.sitime.com
SiT5147
60 MHz to 220 MHz, ±0.5 to ±2.5 ppm, Endura™ Series Super-TCXO
Table 2. DC Characteristics
Parameters
Supply Voltage
Symbol
Vdd
Min.
2.25
2.52
2.7
2.97
Current Consumption
OE Disable Current
Idd
I_od
Typ.
2.5
2.8
3.0
3.3
48
52
45
49
Max.
2.75
3.08
3.3
3.63
62
66
52
56
Unit
V
V
V
V
mA
mA
mA
mA
PRELIMINARY
Condition
Contact
SiTime
for 2.25V to 3.63V continuous supply
voltage support.
Supply Voltage
Current Consumption
F_nom = 100 MHz, No Load, TCXO and DCTCXO modes
F_nom = 100 MHz, No Load, VCTCXO mode
OE = GND, output weakly pulled down. TCXO, DCTCXO
OE = GND, output weakly pulled down. VCTCXO mode
Table 3. Input Characteristics
Parameters
Input Impedance
Input High Voltage
Input Low Voltage
Symbol
Z_in
VIH
VIL
Min.
75
70%
±6.25
±6.25
±10
±12.5
±25
±50
±80
±100
±125
±150
±200
±400
±600
±800
±1200
±1600
±3200
±2.75
±2.25
±0.75
Upper Control Voltage
Lower Control Voltage
Control Voltage Input Impedance
Control Voltage Input Bandwidth
Frequency Control Polarity
Pull Range Linearity
Bus Frequency
VC_U
VC_L
VC_z
VC_bw
F_pol
PR_lin
2
Typ.
Max.
30%
Unit
kΩ
Vdd
Vdd
ppm
Internal pull up to Vdd
Condition
Input Characteristics
OE Pin
Frequency Tuning Range – Voltage Control or I
2
C mode
VCTCXO mode; contact
SiTime
for ±12.5 and ±25 ppm.
Pull Range
PR
ppm
DCTCXO mode.
Absolute Pull Range
[3]
APR
10
Positive
10%
ppm
ppm
ppm
Vdd
Vdd
MΩ
kHz
±0.5 ppm F_stab, DCTCXO, VCTCXO for PR = ±6.25 ppm
±1.0 ppm F_stab, DCTCXO, VCTCXO for PR = ±6.25 ppm
±2.5 ppm F_stab, DCTCXO, VCTCXO for PR = ±6.25 ppm
VCTCXO mode
VCTCXO mode
VCTCXO mode
VCTCXO mode; contact
SiTime
for other bandwidth
options.
VCTCXO mode
VCTCXO mode
-40 to 105
°C
-40 to 85
°C
DCTCXO mode
DCTCXO mode
DCTCXO mode
0.1 V
DD
< VOUT < 0.9 V
DD.
Includes typical leakage current
from 200 kΩ pull resister to VDD; DCTCXO mode
DCTCXO mode
90%
8
0.5
≤ 400
≤ 1000
1.0
%
kHz
kHz
I C Interface Characteristics, 200 Ohm, 550 pF (Max I
2
C Bus Load)
F_I2C
70%
0.5
Input Voltage Low
Input Voltage High
Output Voltage Low
Input Leakage current
Input Capacitance
VIL_I2C
VIH_I2C
VOL_I2C
I
L
C
IN
30%
0.4
24
5
Vdd
Vdd
V
µA
pF
Note:
3. APR = PR – initial tolerance – 20-year aging – frequency stability over temperature. Refer to
Table 14
for APR with respect to other pull range options.
Rev 0.91
Page 5 of 32
www.sitime.com
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