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SIT5346AECFF633JBA60.000000

Clipped Sine Output Oscillator, 60MHz Nom, QFN-10

器件类别:无源元件    振荡器   

厂商名称:SiTime

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
SiTime
包装说明
LCC10,.13X.2,58/52/48
Reach Compliance Code
compli
老化
0.23 PPM/FIRST YEAR
频率调整-机械
NO
频率稳定性
0.2%
安装特点
SURFACE MOUNT
端子数量
10
标称工作频率
60 MHz
最高工作温度
105 °C
最低工作温度
-40 °C
振荡器类型
CLIPPED SINE
输出阻抗
17 Ω
封装主体材料
CERAMIC
封装等效代码
LCC10,.13X.2,58/52/48
物理尺寸
5.15mm x 3.35mm x 1.06mm
最大压摆率
53 mA
最大供电电压
3.63 V
最小供电电压
2.97 V
标称供电电压
3.3 V
表面贴装
YES
文档预览
SiT5346
PRELIMINARY
1 – 60 MHz, ±0.1 to ±0.25 ppm, Endura™ Series Precision Super-TCXO
Description
The
SiT5346
is a ruggedized ±100 ppb precision MEMS
Features
Super-TCXO with a maximum acceleration sensitivity of
0.009 ppb/g or 0.1 ppb/g. Fully compliant to Telcordia GR-
1244-CORE Stratum 3 oscillator specifications, and
engineered for best dynamic performance, the SiT5346 is
ideal for high reliability defense, space, avionics, guidance,
precision GNSS and communications applications.
Leveraging SiTime’s unique DualMEMS™ temperature
sensing and TurboCompensation™ technologies, the
SiT5346 delivers the best dynamic performance for timing
stability in the presence of environmental stressors due to
air flow, temperature perturbation, vibration, shock, and
electromagnetic interference. This device also integrates
multiple on-chip regulators to filter power supply noise,
eliminating the need for a dedicated external LDO.
The SiT5346 offers three device configurations that can be
ordered using
Ordering Codes
for:
1) TCXO with non-pullable output frequency,
2) VCTCXO allowing voltage control of output
frequency, and
3) DCTCXO, enabling digital control of output frequency
using an I
2
C interface, pullable to 5 ppt (parts per
trillion) resolution.
The SiT5346 can be factory programmed for any
combination of frequency, stability, voltage, and pull range.
Programmability enables designers to optimize clock
configurations while eliminating long lead times and
customization costs associated with quartz devices where
each frequency is custom built.
Refer to
Manufacturing Guideline
for proper reflow profile
and PCB cleaning recommendations for best performance.
Any frequency from 1 MHz to 60 MHz in 1 Hz steps
Factory programmable options for low lead time
Best dynamic stability under airflow, thermal shock
0.009 ppb/g or 0.1 ppb/g acceleration sensitivity
±100 ppb stability across temperature
±1 ppb/C typical frequency slope (ΔF/ΔT)
3e-11 ADEV at 10 second averaging time
-40°C to +105°C operating temperature
No activity dips or micro jumps
Resistant to shock, vibration and board bending
On-chip regulators eliminate the need for external LDOs
Digital frequency pulling (DCTCXO) via I
2
C
Digital control of output frequency and pull range
Up to
±3200
ppm pull range
Frequency pull resolution down to 5 ppt
2.5V, 2.8V, 3.0V and 3.3V supply voltage
LVCMOS or clipped sinewave output
RoHS and REACH compliant
Pb-free, Halogen-free, Antimony-free
Contact SiTime
for up-screening and LAT programs
Applications
Ballistics, missiles, munitions
Military portable radios
Ruggedized communications networks
Precision GNSS systems
SATCOM
Transponders
Military, defense, space, avionics systems
Block Diagram
5.0 x 3.2 mm
2
Package Pinout
SDA / NC
OE / VC / NC
SCL / NC
NC
GND
1
10
9
VDD
NC
NC
CLK
2
3
8
7
4
5
6
A0 / NC
Figure 1. SiT5346 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 13
for Pin Descriptions)
Rev 0.54
July 22, 2019
www.sitime.com
SiT5346
1 – 60 MHz, ±0.1 to ±0.25 ppm, Endura™ Series Precision Super-TCXO
Ordering Information
PRELIMINARY
The following part number guide is for reference only. To customize and build an exact part number, use the
SiTime
Part Number Generator.
To validate the part number, use the SiTime
Part Number Decoder.
Part
Family
Silicon
Revision
Letter
Package Size
"F": 5.0 x 3.2 mm
2
Pin 1 Function
TCXO mode only
"E": Output Enable
"N": No Connect
TCXO
VCTCXO
DCTCXO
Temperature Range
SiT5 3 4 6 A C
-
F Q- 33E 0 B 19.123456T
SiT5 3 4 6 A C
-
F Q- 33 V T B 19.123456T
SiT5 3 4 6 A C
-
F QG 33J R B 19.123456T
Packaging
"T": 12mm Tape & Reel, 3ku reel
"Y": 12mm Tape & Reel, 1ku reel
“X”: 12mm Tape & Reel, 250u reel
(blank): bulk
[2]
"I": Industrial, -40 to 85
°C
"C": Extended Commercial, -20 to 70
°C
"E": Extended Industrial, -40 to 105
°C
Output Waveform
"-": LVCMOS
[1]
"C": Clipped Sinewave
Frequency
1.000000 to 60.000000 MHz
Frequency Stability
"Q": for
±0.1
ppm
"P": for
±0.2
ppm
"N": for
±0.25
ppm
Special Features
"A": Low g-Sensitivity, 0.1 ppb/g
"B": Ultra-low g-Sensitivity, 0.009 ppb/g
I
2
C Address Mode
DCTCXO mode only
Values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
Set bits 3:0 of device
I
2
C address to the Hex value
of the ordering code. When the
I
2
C address is
factory programmed using these codes, pin
A0 is NC.
Value: G
The
I
2
C address is controlled by A0 pin.
Pull Range
DCTCXO mode only
"T":
±6.25
ppm
"R":
±10
ppm
"Q":
±12.5
ppm
"M":
±25
ppm
"B":
±50
ppm
"C":
±80
ppm
"E":
±100
ppm
"F":
±125
ppm
"G":
"H":
"X":
"L":
"Y":
"S":
"Z":
"U":
±150 ppm
±200 ppm
±400 ppm
±600 ppm
±800 ppm
±1200 ppm
±1600 ppm
±3200 ppm
Pin 1 Function
DCTCXO mode only
Supply Voltage
"25": 2.5 V
±
10%
"28": 2.8 V
±
10%
"30": 3.0 V
±
10%
"33": 3.3 V
±
10%
"I": Output Enable
"J": No Connect, software OE control
Notes:
1. “-“ corresponds to the default rise/fall time for LVCMOS output as specified in
Table 1
(Electrical Characteristics).
Contact SiTime
for other rise/fall time options
for best EMI.
2. Bulk is available for sampling only
Rev 0.54
Page 2 of 39
www.sitime.com
SiT5346
1 – 60 MHz, ±0.1 to ±0.25 ppm, Endura™ Series Precision Super-TCXO
TABLE OF CONTENTS
PRELIMINARY
Description ................................................................................................................................................................................... 1
Features....................................................................................................................................................................................... 1
Applications ................................................................................................................................................................................. 1
Block Diagram ............................................................................................................................................................................. 1
5.0 x 3.2 mm
2
Package Pinout ..................................................................................................................................................... 1
Ordering Information .................................................................................................................................................................... 2
Electrical Characteristics.............................................................................................................................................................. 4
Device Configurations and Pin-outs ........................................................................................................................................... 10
Pin-out Top Views............................................................................................................................................................... 10
Test Circuit Diagrams for LVCMOS and Clipped Sinewave Outputs ......................................................................................... 11
Waveforms................................................................................................................................................................................. 13
Timing Diagrams ........................................................................................................................................................................ 14
Typical Performance Plots ......................................................................................................................................................... 15
Architecture Overview ................................................................................................................................................................ 19
Frequency Stability ............................................................................................................................................................. 19
Output Frequency and Format ............................................................................................................................................ 19
Output Frequency Tuning ................................................................................................................................................... 19
Pin 1 Configuration (OE, VC, or NC) .................................................................................................................................. 20
Device Configurations ................................................................................................................................................................ 20
TCXO Configuration ........................................................................................................................................................... 20
VCTCXO Configuration ...................................................................................................................................................... 21
DCTCXO Configuration ...................................................................................................................................................... 22
VCTCXO-Specific Design Considerations ................................................................................................................................. 23
Linearity .............................................................................................................................................................................. 23
Control Voltage Bandwidth ................................................................................................................................................. 23
FV Characteristic Slope K
V
................................................................................................................................................. 23
Pull Range, Absolute Pull Range ........................................................................................................................................ 24
DCTCXO-Specific Design Considerations ................................................................................................................................. 25
Pull Range and Absolute Pull Range .................................................................................................................................. 25
Output Frequency ............................................................................................................................................................... 26
I
2
C Control Registers .......................................................................................................................................................... 28
Register Descriptions.......................................................................................................................................................... 28
Register Address: 0x00. Digital Frequency Control Least Significant Word (LSW) ............................................................ 28
Register Address: 0x01. OE Control, Digital Frequency Control Most Significant Word (MSW) ......................................... 29
Register Address: 0x02. DIGITAL PULL RANGE CONTROL
[14]
........................................................................................ 30
Serial Interface Configuration Description .......................................................................................................................... 31
Serial Signal Format ........................................................................................................................................................... 31
Parallel Signal Format ........................................................................................................................................................ 32
Parallel Data Format ........................................................................................................................................................... 32
I
2
C Timing Specification ...................................................................................................................................................... 34
I
2
C Device Address Modes ................................................................................................................................................. 35
Schematic Example ............................................................................................................................................................ 36
Dimensions and Patterns ........................................................................................................................................................... 37
Layout Guidelines ...................................................................................................................................................................... 38
Manufacturing Guidelines .......................................................................................................................................................... 38
Rev 0.54
Page 3 of 39
www.sitime.com
SiT5346
1 – 60 MHz, ±0.1 to ±0.25 ppm, Endura™ Series Precision Super-TCXO
Electrical Characteristics
PRELIMINARY
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and 3.3V Vdd.
Table 1. Output Characteristics
Parameters
Nominal Output Frequency Range
Operating Temperature Range
(Contact SiTime for other ranges)
Symbol
F_nom
T_use
Min.
1
-20
-40
-40
Acceleration (g) sensitivity, Gamma
Vector
F_g
Typ.
Max.
60
+70
+85
+105
Unit
MHz
°C
°C
°C
Extended Commercial, ambient temperature
Industrial, ambient temperature
Extended Industrial, ambient temperature
Ultra-low sensitivity grade; total gamma over 3 axes; 15 Hz
to 2 kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Low sensitivity grade; total gamma over 3 axes; 15 Hz to 2
kHz; MIL-PRF-55310, computed per section 4.8.18.3.1
Referenced to (max frequency + min frequency)/2 over the
rated temperature range, in TCXO, DCTCXO, or VCTCXO
(VCTCXO with ±6.25 ppm pull range, Vc=Vdd/2)
Initial frequency at 25°C inclusive of solder-down shift at
48 hours after 2 reflows
Vdd ±5%
LVCMOS output, 15 pF ±10%. Clipped sinewave output,
10kΩ || 10 pF ±10%
0.5C/min temperature ramp rate, -20 to 85 °C
0.5C/min temperature ramp rate, -40 to -20 °C
0.5C/min temperature ramp rate, 85 to 105 °C
0.5C/min temperature ramp rate, -20 to 85 °C
0.5C/min temperature ramp rate, -40 to -20 °C
0.5C/min temperature ramp rate, 85 to 105 °C
Inclusive of over-temp frequency variation
-40 to 105 °C, 0.5°C/min ramp rate
-40 to 85 °C, 0.5°C/min ramp rate
-20 to 70 °C, 0.5°C/min ramp rate
At 85°C, after 30-days of continued operation. Aging is
measured with respect to day 31
At 85°C, after 2-days of continued operation. Aging is
measured with respect to day 3.
Condition
Frequency Coverage
Temperature Range
Rugged Characteristics
0.004
0.009
0.1
ppb/g
ppb/g
Frequency Stability - Stratum 3+ Grade
Frequency Stability over
Temperature
Initial Tolerance
Supply Voltage Sensitivity
Output Load Sensitivity
Frequency vs. Temperature Slope
F_stab
-0.1
+0.1
ppm
F_init
F_Vdd
F_load
ΔF/ΔT
-0.5
-2.5
-0.4
-2
-3.5
±0.5
±0.05
±0.9
±1
±0.9
±0.008
±0.01
±0.008
±25
±15
±10
±0.5
±54
±75
±95
±4.2
±0.3
±6.4
±0.05
±3
±1
±1.5
±2
+0.5
+2.5
+0.4
+2
+3.5
+0.02
-0.035
+0.15
+2.5
+300
+430
+540
+1
+6.5
+1.1
+0.2
+0.25
+10
+0.08
+0.28
+5
+4.6
ppm
ppb
ppb
ppb/°C
ppb/°C
ppb/°C
ppb/s
ppb/s
ppb/s
ppm
ppb
ppb
ppb
ppb
ppb
ppb
ppb
ppm
ppb
ppb
ppm
ppm
ppb/°C
ppb/s
ppm
ppb
ppm
ppm
ppm
ppm
Dynamic Frequency Change during
Temperature Ramp
F_dynamic
-0.02
-0.035
24-hour holdover stability
Hysteresis Over Temperature
F_24_Hold
F_hys
-0.15
One-Day Aging
One-Year Aging
5-Year Aging
20-Year Aging
Initial Tolerance
Supply Voltage Sensitivity
Output Load Sensitivity
Frequency Stability over
Temperature
Frequency vs. Temperature Slope
Dynamic Frequency Change during
Temperature Ramp
24-hour holdover stability
One-Day Aging
One-Year Aging
5-Year Aging
20-Year Aging
20-Year Total Stability
F_1d
F_1y
F_5y
F_20y
F_init
F_Vdd
F_load
F_stab
ΔF/ΔT
F_dynamic
F_24_Hold
F_1d
F_1y
F_5y
F_20y
F_tot_20y
-2.5
-300
-430
-540
-1
-6.5
-1.1
-0.2
-0.25
-10
-0.8
-0.28
-5
-4.6
Frequency Stability - Stratum 3 Grade
Initial frequency at 25°C inclusive of solder-down shift
at 48 hours after 2 reflows
Vdd ±5%
LVCMOS output, 15 pF ±10%. Clipped sinewave output,
10kΩ || 10 pF ±10%.
Referenced to (max frequency + min frequency)/2 over the
rated temperature range. Vc=Vdd/2 for VCTCXO.
-40 to 105 °C
0.5°C/min temperature ramp rate
Inclusive of over-temperature frequency variation
At 85°C, after 30-days of continued operation. Aging is
measured with respect to day 31.
At 85°C, after 2-days of continued operation. Aging is
measured with respect to day 3.
Complies with Stratum 3 per GR-1244-CORE. Actual
performance is better.
Rev 0.54
Page 4 of 39
www.sitime.com
SiT5346
1 – 60 MHz, ±0.1 to ±0.25 ppm, Endura™ Series Precision Super-TCXO
Table 1. Output Characteristics (continued)
Parameters
Duty Cycle
Rise/Fall Time
Output Voltage High
Output Voltage Low
Output Impedance
Output Voltage Swing
Rise/Fall Time
Start-up Time
Symbol
DC
Tr, Tf
VOH
VOL
Z_out_c
V_out
Tr, Tf
T_start
Min.
45
0.8
90%
0.8
Typ.
1.2
20
3.5
2.5
Max.
55
1.9
10%
1.2
4.6
3.5
Unit
%
ns
Vdd
Vdd
Ohms
V
ns
ms
PRELIMINARY
Condition
LVCMOS Output Characteristics
10% - 90% Vdd
IOH = +3mA
IOL = -3mA
Impedance looking into output buffer
Clipped sinewave output, 10kΩ || 10 pF ±10%
20% - 80% Vdd, F_nom = 19.2 MHz
Time to first pulse, measured from the time Vdd reaches
90% of its final value. Vdd ramp time = 100 µs from 0V to
Vdd
F_nom = 10 MHz. See
Timing Diagrams
section below.
Time to first accurate pulse within rated stability, measured
from the time Vdd reaches 90% of its final value. Vdd
ramp time = 100 µs
Clipped Sinewave Output Characteristics
Start-up Characteristics
Output Enable Time
First Pulse Accuracy
T_oe
T_stability
5
680
45
ns
ms
Table 2. DC Characteristics
Parameters
Supply Voltage
Symbol
Vdd
Min.
2.25
2.52
2.7
2.97
Current Consumption
OE Disable Current
Idd
I_od
Typ.
2.5
2.8
3.0
3.3
44
48
43
47
Max.
2.75
3.08
3.3
3.63
53
57
51
55
Unit
V
V
V
V
mA
mA
mA
mA
F_nom = 19.2 MHz, No Load, TCXO and DCTCXO modes
F_nom = 19.2 MHz, No Load, VCTCXO mode
OE = GND, output weakly pulled down. TCXO, DCTCXO
OE = GND, output weakly pulled down. VCTCXO mode
Condition
Contact
SiTime
for 2.25V to 3.63V continuous supply
voltage support.
Supply Voltage
Current Consumption
Rev 0.54
Page 5 of 39
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