SiT8209
Ultra-Performance Oscillator
Features
Any frequency between 80.000001 and 220 MHz accurate to
6 decimal places
100% pin-to-pin drop-in replacement to quartz-based oscillators
Ultra-low phase jitter: 0.5 ps (12 kHz to 20 MHz)
Frequency stability as low as ±10 PPM
Industrial or extended commercial temperature range
LVCMOS/LVTTL compatible output
Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2,
7.0 x 5.0 mm x mm
Outstanding silicon reliability of 2 FIT or 500 million hour MTBF
Pb-free, RoHS and REACH compliant
Ultra-short lead time
Applications
SATA, SAS, Ethernet, 10-Gigabit Ethernet, SONET, PCI
Express, video, Wireless
Computing, storage, networking, telecom, industrial control
Table 1. Electrical Characteristics
Parameter
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
[1]
Min.
80.000001
-10
-20
-25
-50
Typ.
–
–
–
–
–
–
–
1.8
2.5
2.8
3.3
34
30
–
–
–
–
–
–
1.2
–
–
–
–
100
–
7
–
–
1.5
2
0.5
–
–
Max.
220
+10
+20
+25
+50
+70
+85
1.89
2.75
3.08
3.63
36
33
31
30
70
10
55
60
2
–
10%
–
30%
250
–
10
115
10
2
3
1
+1.5
+5
Unit
MHz
PPM
PPM
PPM
PPM
°C
°C
V
V
V
V
mA
mA
mA
mA
µA
µA
%
%
ns
Vdd
Vdd
Vdd
Vdd
kΩ
MΩ
ms
ns
ms
ps
ps
ps
PPM
PPM
Pin 1, OE or
ST
Pin 1, OE or
ST
Extended Commercial
Industrial
Condition
Inclusive of Initial tolerance at 25 °C, and variations over
operating temperature, rated power supply voltage and load
Operating Temperature Range
Supply Voltage
T_use
Vdd
-20
-40
1.71
2.25
2.52
2.97
Supply voltages between 2.5V and 3.3V can be supported.
Contact
SiTime
for guaranteed performance specs for supply
voltages not specified in this table.
Current Consumption
OE Disable Current
Idd
I_OD
–
–
–
–
No load condition, f = 100 MHz, Vdd = 2.5V, 2.8V or 3.3V
No load condition, f = 100 MHz, Vdd = 1.8V
Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled
Down
Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down
Vdd = 2.5V, 2.8V or 3.3V,
ST
= GND, output is Weakly
Pulled Down
Vdd = 1.8 V.
ST
= GND, output is Weakly Pulled Down
f <= 165 MHz, all Vdds.
f > 165 MHz, all Vdds.
15 pF load, 10% - 90% Vdd
IOH = -6 mA, IOL = 6 mA, (Vdd = 3.3V, 2.8V, 2.5V)
IOH = -3 mA, IOL = 3 mA, (Vdd = 1.8V)
Standby Current
I_std
–
–
Duty Cycle
Rise/Fall Time
Output Voltage High
Output Voltage Low
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
DC
Tr, Tf
VOH
VOL
VIH
VIL
Z_in
45
40
–
90%
–
70%
–
–
2
Pin 1, OE logic high or logic low, or
ST
logic high
Pin 1,
ST
logic low
Measured from the time Vdd reaches its rated minimum value
f = 80 MHz, For other frequencies, T_oe = 100 ns + 3 cycles
In standby mode, measured from the time
ST
pin
crosses 50% threshold. Refer to
Figure 5.
f = 156.25 MHz, Vdd = 2.5V, 2.8V or 3.3V
f = 156.25 MHz, Vdd = 1.8V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz
25°C
25°C
Startup Time
OE Enable/Disable Time
Resume Time
RMS Period Jitter
RMS Phase Jitter (random)
First year Aging
10-year Aging
T_start
T_oe
T_resume
T_jitt
T_phj
F_aging
–
–
–
–
–
–
-1.5
-5
Note:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
Rev 1.1
January 2, 2017
www.sitime.com
SiT8209
Ultra-Performance Oscillator
Table 2. Pin Configuration
Pin
Symbol
Output
Enable
1
OE/ ST
Standby
2
3
4
Notes:
2. A pull-up resistor of <10 kΩ between OE/ ST pin and Vdd is recommended in high noise environment.
3. A capacitor of value 0.1 µF between Vdd and GND is recommended.
GND
OUT
VDD
Power
Output
Power
[2]
Functionality
H or Open : specified frequency output
L: output is high impedance. Only output driver is disabled.
H or Open
:
specified frequency output
L: output is low (weak pull down). Device goes to sleep mode.
Supply current reduces to I_std.
Electrical ground
Oscillator output
Power supply voltage
[3]
[3]
[2]
Top View
OE/ST
1
4
VDD
GND
2
3
OUT
Figure 1. Pin Assignments
Table 3. Absolute Maximum
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part.
Actual performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
VDD
Electrostatic Discharge
Soldering Temperature (follow standard Pb free soldering guidelines)
Junction Temperature
Min.
-65
-0.5
–
–
–
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Table 4. Thermal Consideration
Package
7050
5032
3225
2520
θ
JA, 4 Layer Board (°C/W)
191
97
109
117
θ
JA, 2 Layer Board (°C/W)
263
199
212
222
θ
JC, Bottom (°C/W)
30
24
27
26
Table 5. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev. 1.1
Page 2 of 15
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SiT8209
Ultra-Performance Oscillator
Phase Noise Plot
-40
-60
Integrated random phase jitter (12kHz to 20MHz): 0.49 ps,RMS
Phase noise (dBc/Hz)
-80
-100
-120
-140
-160
3
4
5
6
7
10
10
10
10
10
Frequency offset (Hz)
Figure 2. Phase Noise, 156.25 MHz, 3.3V, LVCMOS Output
Test Circuit and Waveform
[4]
Vdd
Vout
Test
Point
tr
4
Power
Supply
0.1µF
3
tf
90% Vdd
1
2
15pF
(including probe
and fixture
capacitance)
50%
10% Vdd
High Pulse
(TH)
Period
Low Pulse
(TL)
OE/ST Function
Vdd
1kΩ
Figure 3. Test Circuit
Figure 4. Waveform
Notes:
4. Duty Cycle is computed as Duty Cycle = TH/Period.
5. SiT8209 supports the configurable duty cycle feature. For custom duty cycle at any given frequency, contact
SiTime.
Rev. 1.1
Page 3 of 15
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SiT8209
Ultra-Performance Oscillator
Timing Diagram
Figure 5. Startup Timing (OE/ST Mode)
Figure 6. Standby Resume Timing (ST Mode Only)
Figure 6. OE Enable Timing (OE Mode Only)
Figure 7. OE Disable Timing (OE Mode Only)
Notes:
6. SiT8209 supports NO RUNT pulses and No glitches during startup or resume.
7. SiT8209 supports gated output which is accurate within rated frequency stability from the first cycle.
Rev. 1.1
Page 4 of 15
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SiT8209
Ultra-Performance Oscillator
Performance Plots
[8]
3.3V
3.00
2.50
2.5V
1.8V
3.3V
40.0
38.0
36.0
34.0
32.0
30.0
28.0
26.0
24.0
22.0
20.0
80
100
120
2.5V
1.8V
RMS Period jitter, ps
140
160
180
200
220
2.00
1.50
1.00
0.50
0.00
80
Idd, mA
100
120
140
160
180
200
220
Frequency, MHz
Frequency, MHz
Figure 8. Idd vs Frequency
Figure 9. RMS Period Jitter vs Frequency
3.3V
60.0
58.0
54.0
52.0
50.0
48.0
46.0
44.0
42.0
40.0
80
100
120
56.0
2.5V
1.8V
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
80
100
120
2.5V
3.3V
1.8V
140
160
180
200
220
RMS Phase jitter, ps
Duty cycle, %
140
160
180
200
220
Frequency, MHz
Frequency, MHz
Figure 10. Duty Cycle vs Frequency
Figure 11. RMS Phase Jitter vs Frequency
1.8V
35
33
2.5V
3.3V
2.0
1.8V (10%-90%)
1.8V (20%-80%)
2.5V (10%-90%)
2.5V (20%-80%)
3.3V (10%-90%)
3.3V (20%-80%)
1.5
31
29
27
25
-40
Rise Time, ns
-20
0
20
40
60
80
Idd, mA
1.0
0.5
Temperature, °C
0.0
-40
-20
0
20
40
60
80
Temperature, °C
Figure 12. Idd vs Temperature, 100 MHz Output
Figure 13. Rise Time vs Temperature, 100 MHz Output
Note:
8. All plots are measured with 15pF load at room temperature, unless otherwise stated.
Rev. 1.1
Page 5 of 15
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stm32/stm8
