SiT9107
LVPECL / LVDS / CML - Preliminary
220 to 800 MHz High Performance Oscillator
Features
• Extremely low RMS phase jitter (random)
• <1 ps (typical)
• Wide frequency range
• 220 MHz to 800 MHz
• High frequency stability
• ±10 PPM, ±15 PPM, ±20 PPM
• ±25 PPM, ±50 PPM
• Operating voltage
• 1.8, 2.5 or 3.3 V
• Other voltages up to 3.63 V (contact SiTime)
• Operating temperature range
• Industrial, -40 to 85 °C
• Extended Commercial, -20 to 70 °C
• Commercial, 0 to 70 °C
• Small footprint
• 5.0 x 3.2 x 0.75 (L x W x H) mm
• 7.0 x 5.0 x 0.90 (L x W x H) mm
• Pb-free and RoHS compliant
• For Spread Spectrum option contact SiTime
• Ultra-reliable start up and greater immunity from inter
ference
Benefits
•
•
•
•
•
Ultra fast lead time: 3 to 5weeks
No crystal or capacitors required
Eliminates crystal qualification time
More than 50% + board saving space
More cost effective than quartz oscillators, quartz crystals
and clock ICs.
• Completely quartz-free
Applications
•
•
•
•
•
•
•
•
•
•
•
Server
Router
RAID controller
Gigabit Ethernet
10 Gigabit Ethernet
Fiber Channel
SATA / SAS
PCI-Express
Fully Buffered DIMM
System clock
Networking and computing
Block Diagram
VDD
OUT- OUT+
Pinout
ST/OE
1
6
VDD
NC
2
5
OUT-
MEMS
Resonator
High Performance
Phase Lock Loop
GND
3
4
OUT+
ST/OE
GND
SiTime Corporation
Rev. 1.0
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised August 27, 2010
SiT9107
LVPECL / LVDS / CML
220 to 800 MHz High Performance Oscillator
Pin Description
Pin No.
1
Name
ST/OE
Input
Pin Description
Standby or Output Enable pin for OUT+ and OUT-.
OE:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance state
ST:
When High or Open : OUT+ and OUT- = active
When Low : OUT+ and OUT- = High Impedance State
Do not connect pin, leave it floating.
VDD power supply ground. Connect to Ground
220 to 800 MHz programmable clock output.
Power supply
2
3
4
5
6
NC
GND
OUT+
OUT-
VDD
NA
Power
Output
Output
Power
Absolute Maximum Ratings
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual
performance of the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Ab
solute Maximum Table
Parameter
Storage Temperature
VDD
Vin
Theta JA ( with copper plane on VDD and GND) 5.0 x 3.2 package
7.0 x 5.0 package when center pad is soldered down
7.0 x 5.0 package when center pad is not soldered down
Theta JC (with PCB traces of 0.010 inch to all pins) 5.0 x 3.2 package
7.0 x 5.0 package when center pad is soldered down
7.0 x 5.0 package when center pad is not soldered down
Soldering Temperature (follow standard Pb free soldering guidelines)
Number of Program Writes
Program Retention over -40 to 125C, Process, VDD (0 to 3.6V)
Human Body Model (JESD22-A114)
Charged Device Model (JESD22-C101)
Machine Model (JESD22-A115)
Min.
-65
-0.5
GND - 0.5
–
–
–
–
–
–
–
–
–
2000
750
200
Max.
150
4
VDD + 0.5
68
38
90
45
35
48
260
1
1,000+
–
–
–
Unit
°C
V
V
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C
NA
years
–
–
–
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
MIL-STD-883F, Method 1010-65-150°C (1000 cycle)
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev. 0.9
Page 2 of 12
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SiT9107
LVPECL / LVDS / CML
220 to 800 MHz High Performance Oscillator
DC Electrical Specifications
LVCMOS input, OE or ST pin, 3.3V ±10% or 2.5V ±10% or 1.8V ±5%, -40 to 85°C
Symbol
V
IH
V
IL
I
IH
I
IL
T
pu
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Power Up Time
OE or ST pin
OE or ST pin
Time from minimum power supply voltage to the
first cycle (Guaranteed no runt pulses)
Condition
Min.
70
–
–
-10
–
Typ.
–
–
–
–
–
Max.
–
30
10
–
10
Unit
%Vdd
%Vdd
µA
µA
ms
LVPECL Output, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OH
V
OL
V
swing
Parameter
Supply Voltage
Supply Current
Output High Voltage
Output Low Voltage
Pk-Pk Output Voltage Swing
V
DD
= 3.3, Excluding Load Termination Current
V
DD
= 2.5, Excluding Load Termination Current
50 Ohm termination to V
DD
- 2.0V
See Figure 1, 2.
Condition
Min.
2.97
2.25
–
–
V
DD
-1.1
V
DD
-2.0
600
Typ.
3.3
2.5
68
65
–
–
800
Max.
3.63
2.75
74
71
V
DD
-0.7
V
DD
-1.4
1000
Unit
V
V
mA
mA
V
V
mV
LVDS Output, 3.3V ±10% or 2.5V ±10%, -40 to 85°C
Symbol
V
DD
I
DD
V
OD1
V
OS1
Parameter
Supply Voltage
Supply Current
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Differential Output Voltage
V
OD
Magnitude Change
Offset Voltage
V
OS
Magnitude Change
Swing Mode = High
Double load termination.
See Figure 5.
Swing Mode = High
Single load termination.
See Figure 4.
V
DD
= 3.3, Excluding Load Termination Current
V
DD
= 2.5, Excluding Load Termination Current
Swing Mode = Normal
Single load termination.
See Figure 4.
Condition
Min.
2.97
2.25
–
–
250
–
–
–
500
–
–
–
250
–
–
–
Typ.
3.3
2.5
73
70
350
–
1.2
–
700
–
1.2
–
350
–
1.2
–
Max.
3.63
2.75
79
76
450
50
–
50
900
50
–
50
450
50
–
50
Unit
V
V
mA
mA
mV
mV
V
mV
mV
mV
V
mV
mV
mV
V
mV
Δ
V
OD1
Δ
V
OS1
Δ
V
OD2
V
OD2
V
OS2
Δ
V
OS2
Δ
V
OD3
V
OD3
V
OS3
Δ
V
OS3
CML Output, 3.3V ±10% or 2.5V ±10% or 1.8V ±5%, -40 to 85°C
Symbol
V
DD
Parameter
Supply Voltage
Condition
Min.
2.97
2.25
1.71
I
DD
Supply Current
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 1.8V
Rev. 0.9
Page 3 of 12
Typ.
3.3
2.5
1.8
48
47
38
Max.
3.63
2.75
1.89
51
50
41
Unit
V
V
V
mA
mA
mA
Excluding Load
Termination
Current
–
–
–
www.sitime.com
SiT9107
LVPECL / LVDS / CML
220 to 800 MHz High Performance Oscillator
CML Output, 3.3V ±10% or 2.5V ±10% or 1.8V ±5%, -40 to 85°C
(continued)
V
OH1
V
OL1
V
swing1
V
OH2
V
OL2
V
swing2
V
OH3
V
OL3
V
swing3
Output High Voltage
Output Low Voltage
Pk-Pk Output Voltage Swing
Output High Voltage
Output Low Voltage
Pk-Pk Output Voltage Swing
Output High Voltage
Output Low Voltage
Pk-Pk Output Voltage Swing
Swing Mode = Normal
Single Load Termination
See Figure 6.
Swing Mode = High
Single Load Termination
See Figure 6.
Swing Mode = High
Double Load Termination
See Figure 7.
V
DD
-0.1
300
V
DD
-0.1
V
DD
-1.1
–
425
–
V
DD
-0.85
V
DD
V
DD
-0.3
V
V
mV
V
V
mV
V
V
mV
V
DD
-0.55 V
DD
-0.425
550
V
DD
V
DD
-0.6
600
V
DD
-0.1
300
850
–
425
1100
V
DD
V
DD
-0.3
V
DD
-0.55 V
DD
-0.425
550
AC Electrical Specifications
LVPECL Output, 3.3V ±10%, -40 to 85°C
Symbol
F
out
F
stab
Parameter
Output Frequency
Frequency Stability
Inclusive of initial stability,
operating temp., rated power
supply voltage change, load
change
0 to 70°C
-20 to 70°C
-40 to 85°C
Condition
Min.
220
-10
-15
-20
-25
-50
F
age
DC
Aging
Duty Cycle
First year @ 25°C
F
out
= 220 - 460 MHz, 490 - 610 MHz or
750 - 800 MHz
F
out
= 460.1 - 489.9 MHz or 610.1- 749.9 MHz
t
R
/t
F
PH
J
Output Rise/Fall Time
RMS Phase Jitter (random)
20% to 80%
F
out
= 212.5MHz @ BW: 1.875M Hz to10 MHz
F
out
= 312.5 MHz @ BW: 1.875M Hz to10 MHz
F
out
= 600 MHz @ BW: 1.875M Hz to10 MHz
P
J
RMS Period Jitter
F
out
= 212.5 MHz
F
out
= 312.5 MHz
F
out
= 600 MHz
F
out
= 800 MHz
–
45
35
160
–
–
–
–
–
–
–
–
–
–
260
0.3
0.3
0.3
1.4
1.4
1.5
1.2
Typ.
–
–
–
–
Max.
800
+10
+15
+20
+25
+50
1
55
65
350
0.44
0.33
0.34
1.8
1.8
2.2
1.6
Unit
MHz
PPM
PPM
PPM
PPM
PPM
PPM
%
%
ps
ps
ps
ps
ps
ps
ps
ps
Rev. 0.9
Page 4 of 12
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SiT9107
LVPECL / LVDS / CML
220 to 800 MHz High Performance Oscillator
LVPECL Output, 2.5V ±10%, -40 to 85°C
Symbol
F
out
F
stab
Parameter
Output Frequency
Frequency Stability
Inclusive of initial stability,
operating temp., rated
power supply voltage
change, load change
0 to 70°C
-20 to 70°C
-40 to 85°C
Condition
Min.
220
-10
-15
-20
-25
-50
F
age
DC
Aging
Duty Cycle
First year @ 25°C
F
out
= 220 - 460 MHz, 490 - 610 MHz or
750 - 800 MHz
F
out
= 460.1 - 489.9 MHz or 610.1- 749.9 MHz
t
R
/t
F
PH
J
Output Rise/Fall Time
RMS Phase Jitter (random)
20% to 80%
F
out
= 212.5MHz @ BW: 1.875MHz to10 MHz
F
out
= 312.5 MHz @ BW: 1.875MHz to10 MHz
F
out
= 600 MHz @ BW: 1.875MHz to10 MHz
P
J
RMS Period Jitter
F
out
= 212.5 MHz
F
out
= 312.5 MHz
F
out
= 600 MHz
F
out
= 800 MHz
–
45
35
160
–
–
–
–
–
–
–
–
–
–
260
0.3
0.3
0.3
1.4
1.4
1.5
1.2
Typ.
–
–
–
–
Max.
800
+10
+15
+20
+25
+50
1
55
65
350
0.44
0.33
0.34
1.8
1.8
2.2
1.6
Unit
MHz
PPM
PPM
PPM
PPM
PPM
PPM
%
%
ps
ps
ps
ps
ps
ps
ps
ps
LVDS Output, 3.3V ±10%, -40 to 85°C
Symbol
F
out
F
stab
Parameter
Output Frequency
Frequency Stability
Inclusive of initial stability,
operating temp., rated
power supply voltage
change, load change
0 to 70°C
-20 to 70°C
-40 to 85°C
Condition
Min.
220
-10
-15
-20
-25
-50
F
age
DC
Aging
Duty Cycle
First year @ 25°C
F
out
= 220 - 460 MHz, 490 - 610 MHz or
750 - 800 MHz
F
out
= 460.1 - 489.9 MHz or 610.1- 749.9 MHz
t
R
/t
F
PH
J
Output Rise/Fall Time
RMS Phase Jitter (random)
20% to 80%
F
out
= 212.5MHz @ BW: 1.875M Hz to10 MHz
F
out
= 312.5 MHz @ BW: 1.875M Hz to10 MHz
F
out
= 600 MHz @ BW: 1.875M Hz to10 MHz
P
J
RMS Period Jitter
F
out
= 212.5 MHz
F
out
= 312.5 MHz
F
out
= 600 MHz
F
out
= 800 MHz
–
45
35
240
–
–
–
–
–
–
–
–
–
–
310
0.4
0.3
0.2
1.8
1.7
1.7
1.5
Typ.
–
–
–
–
Max.
800
+10
+15
+20
+25
+50
1
55
65
420
0.8
0.6
0.4
2.5
2.4
2.5
2.2
Unit
MHz
PPM
PPM
PPM
PPM
PPM
PPM
%
%
ps
ps
ps
ps
ps
ps
ps
ps
Rev. 0.9
Page 5 of 12
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