首页 > 器件类别 > 无源元件 > 振荡器

SIT9366AC-2B2-30N1.000000T

LVDS Output Clock Oscillator, 1MHz Nom,

器件类别:无源元件    振荡器   

厂商名称:SiTime

器件标准:

下载文档
器件参数
参数名称
属性值
是否Rohs认证
符合
Objectid
7203638524
Reach Compliance Code
compliant
Country Of Origin
Malaysia, Taiwan, Thailand
YTEOL
2
其他特性
COMPLEMENTARY OUTPUT; TR
频率调整-机械
NO
频率稳定性
25%
JESD-609代码
e4
安装特点
SURFACE MOUNT
标称工作频率
1 MHz
最高工作温度
70 °C
最低工作温度
-20 °C
振荡器类型
LVDS
输出负载
15 pF
物理尺寸
3.2mm x 2.5mm x 0.75mm
最大供电电压
3.3 V
最小供电电压
2.7 V
标称供电电压
3 V
表面贴装
YES
最大对称度
55/45 %
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
文档预览
SiT9366
Features
Advanced Information
The Smart Timing Choice
1 to 220 MHz Ultra-low Jitter Differential Oscillator
Applications
Any frequency between 1 MHz and 220 MHz accurate to 6
decimal places
LVPECL, LVDS and HCSL output signaling types
0.1ps RMS phase jitter (random) for Ethernet applications
Frequency stability as low as ±10 ppm
Wide temperature range from -40°C to 85°C
Contact SiTime for higher temperature range options
Industry-standard packages: 3.2x2.5, 7.0x5.0 mm
Contact SiTime for 5.0 x 3.2 mm package
10/40GB Ethernet, SONET, SATA, SAS, Fibre Channel
Telecom, networking, instrumentation, storage, servers
Electrical Characteristics
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage with 15 pF output load
unless otherwise stated. Typical values are at 25°C and nominal supply voltage
Table 1. Electrical Characteristics - Common to LVPECL, LVDS and HCSL
Parameter
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
1
220
MHz
Accurate to 6 decimal places
Frequency Stability
-10
Frequency Stability
F_stab
-20
-25
-50
First Year Aging
F_aging1
-20
-40
±1
+10
+20
+25
+50
+70
+85
Supply Voltage
2.97
Supply Voltage
Vdd
2.7
2.52
2.25
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Duty Cycle
Start-up Time
OE Enable/Disable Time
VIH
VIL
Z_in
DC
T_start
T_oe
70%
45
3.3
3.0
2.8
2.5
100
3.63
3.3
3.08
2.75
30%
-
55
5
515
V
V
V
V
Vdd
Vdd
%
ms
ns
Measured from the time Vdd reaches its rated minimum value.
f = 212.5 MHz - For other frequencies, T_oe = 500ns + 3 period
Pin 1, OE
Pin 1, OE
Pin 1, OE logic high or logic low
ppm
ppm
ppm
ppm
ppm
°C
°C
At 25°C
Extended Commercial
Industrial. Contact SiTime for higher temperature range options
Inclusive of initial tolerance, operating temperature, rated power
supply voltage and load variations
Temperature Range
Operating Temperature Range
T_use
Input Characteristics
Output Characteristics
Startup and OE Timing
SiTime Corporation
Rev. 0.25
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised September 21, 2016
SiT9366
Advanced Information
The Smart Timing Choice
1 to 220 MHz Ultra-low Jitter Differential Oscillator
Table 2. Electrical Characteristics - LVPECL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
RMS Period Jitter
[1]
RMS Phase Jitter (random)
Notes:
1. Measured according to JESD65B
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
T_jitt
T_phj
Min.
Vdd-1.1
Vdd-1.9
1.2
Typ.
0.15
1.6
250
1
0.23
0.1
Max.
84
55
30
Vdd-0.7
Vdd-1.5
2.0
Jitter
2
ps
ps
ps
f = 100, 156.25 or 212.5 MHz, VDD = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds
f = 156.25, IEEE802.3-2005 10GbE jitter mask integration bandwidth
= 1.875 MHz to 20 MHz, all Vdds
Unit
mA
mA
µA
mA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See Figure 2
See Figure 2
See Figure 3
20% to 80%, see Figure 2
Current Consumption
Output Characteristics
Table 3. Electrical Characteristics – LVDS Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Differential Output Voltage
VOD Magnitude Change
Offset Voltage
VOS Magnitude Change
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
VOD
ΔVOD
VOS
ΔVOS
Tr, Tf
Min.
250
1.125
Typ.
0.15
340
Max.
76
55
450
50
1.375
50
Jitter
RMS Period Jitter
[2]
Unit
mA
mA
µA
mV
mV
V
mV
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
See Figure 4
See Figure 4
See Figure 4
See Figure 4
Measured with 2 pF capacitive loading to GND, 20% to 80%, see
Figure 4
Current Consumption
Output Characteristics
T_jitt
T_phj
1
0.23
0.1
2
ps
ps
ps
f = 100, 156.25 or 212.5 MHz, VDD = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds
f = 156.25 MHz, IEEE802.3-2005 10GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdds
RMS Phase Jitter (random)
Notes:
2. Measured according to JESD65B
Rev. 0.25
Page 2 of 10
www.sitime.com
SiT9366
Advanced Information
The Smart Timing Choice
1 to 220 MHz Ultra-low Jitter Differential Oscillator
Table 4. Electrical Characteristics – HCSL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Symbol
Idd
I_OE
I_leak
VOH
VOL
V_Swing
Tr, Tf
Min.
0.6
-0.05
1
Typ.
0.15
1.4
350
Max.
84
55
0.8
0.05
1.8
Jitter
RMS Period Jitter
[3]
RMS Phase Jitter (random)
Notes:
3. Measured according to JESD65B
T_jitt
T_phj
1
0.23
0.1
2
ps
ps
ps
f = 100, 156.25 or 212.5 MHz, VDD = 3.3V or 2.5V
f = 156.25 MHz, Integration bandwidth = 12 kHz to 20 MHz, all Vdds
f = 156.25 MHz, IEEE802.3-2005 10GbE jitter mask integration
bandwidth = 1.875 MHz to 20 MHz, all Vdds
Unit
mA
mA
µA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
See Figure 2
See Figure 2
See Figure 3
Measured with 2 pF capacitive loading to GND, 20% to 80%, see
Figure 2
Current Consumption
Output Characteristics
Table 5. Pin Description
Pin
Map
Output Enable
(OE)
1
OE/NC
Non Connect
(NC)
NA
Power
Output
Output
Power
Functionality
H
[4]
: specified frequency output
L: output is high impedance
H or L or Open: No effect on output frequency or other device
functions
No Connect; Leave it floating or connect to GND for better heat
dissipation
VDD Power Supply Ground
Oscillator output
Complementary oscillator output
Power supply voltage
[5]
Top View
OE/NC
NC
GND
1
6
VDD
OUT-
OUT+
2
5
2
3
4
5
6
NC
GND
OUT+
OUT-
VDD
3
4
Notes:
4. In OE mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven.
5. A capacitor of value 0.1 µF or higher between Vdd and GND is required. An additional 10 pF capacitor between
Vdd and GND is required for the best phase jitter performance
Figure 1. Pin Assignments
Rev. 0.25
Page 3 of 10
www.sitime.com
SiT9366
Table 6. Absolute Maximum
Advanced Information
The Smart Timing Choice
1 to 220 MHz Ultra-low Jitter Differential Oscillator
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of
the IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
VDD
Electrostatic Discharge (HBM)
Soldering Temperature (follow standard Pb free soldering guidelines)
Min.
-65
-0.5
Max.
150
4
2000
260
Unit
°C
V
V
°C
Table 7. Thermal Consideration
[6]
Package
3225, 6-pin
7050, 6-pin
θ
JA, 4 Layer Board (°C/W)
TBD
TBD
θ
JC, Bottom (°C/W)
TBD
TBD
Notes:
6. Refer to JESD51 for
θJA
and
θJC
definitions, and reference layout used to determine the
θJA
and
θJC
values in the above table.
Table 8. Maximum Operating Junction Temperature
[7]
Max Operating Temperature (ambient)
70°C
85°C
Maximum Operating Junction Temperature
80
95
Notes:
7. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 9. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev. 0.25
Page 4 of 10
www.sitime.com
SiT9366
Waveform Diagrams
OUT-
Advanced Information
The Smart Timing Choice
1 to 220 MHz Ultra-low Jitter Differential Oscillator
80%
80%
20%
OUT+
20%
VOH
Tr
GND
VOL
Tf
Figure 2. LVPECL/HCSL Voltage Levels per Differential Pin (OUT+/OUT-)
V_ Swing
0V
t
Figure 3. LVPECL/HCSL Voltage Levels across Differential Pair
OUT-
80%
VOD
80%
20%
OUT+
20%
VOS
Tr
GND
Tf
Figure 4. LVDS Voltage Levels per Differential Pin (OUT+/OUT-)
Rev. 0.25
Page 5 of 10
www.sitime.com
查看更多>
热门器件
热门资源推荐
器件捷径:
E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ
需要登录后才可以下载。
登录取消