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SIT9367AC-1BF-30E322.265625D

LVPECL Output Clock Oscillator, 322.265625MHz Nom, PQFD-6

器件类别:无源元件    振荡器   

厂商名称:SiTime

器件标准:

下载文档
器件参数
参数名称
属性值
是否Rohs认证
符合
Objectid
145142097435
包装说明
SOLCC6,.1,43
Reach Compliance Code
unknown
Country Of Origin
Malaysia, Taiwan, Thailand
YTEOL
7.13
其他特性
ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
最长下降时间
0.33 ns
频率调整-机械
NO
频率稳定性
10%
JESD-609代码
e4
安装特点
SURFACE MOUNT
端子数量
6
标称工作频率
322.265625 MHz
最高工作温度
70 °C
最低工作温度
-20 °C
振荡器类型
LVPECL
输出负载
50 OHM
封装等效代码
SOLCC6,.1,43
物理尺寸
3.2mm x 2.5mm x 0.9mm
最长上升时间
0.33 ns
最大供电电压
3.3 V
最小供电电压
2.7 V
标称供电电压
3 V
表面贴装
YES
最大对称度
55/45 %
端子面层
Nickel/Palladium/Gold (Ni/Pd/Au)
文档预览
SiT9367
220 MHz to 725 MHz Ultra-low Jitter Differential Oscillator
Description
The
SiT9367
is a 220.000001 MHz to 725 MHz differential
MEMS XO engineered for low-jitter applications. Utilizing
SiTime’s unique DualMEMS
®
temperature sensing and
TurboCompensation
®
technology, the SiT9367 delivers
exceptional dynamic performance by providing resistance
to airflow, thermal gradients, shock and vibration. This
device also integrates multiple on-chip regulators to filter
power supply noise, eliminating the need for a dedicated
external LDO.
The SiT9367 can be factory programmed for any
combination of frequency, stability, voltage, and output
signaling. Programmability enables designers to optimize
clock configurations while eliminating long lead times and
customization costs associated with quartz devices
where each frequency is custom built.
The wide frequency range and programmability makes
this device ideal for telecom, networking, and industrial
applications that require a variety of frequencies and
operate in noisy environments.
Refer to
Manufacturing Notes
for proper reflow profile,
tape and reel dimension, and other manufacturing
related information.
Features
Any frequency between 220.000001 MHz and 725 MHz,
accurate to 6 decimal places.
For HCSL output signaling, maximum frequency is
500 MHz.
Contact SiTime
for higher frequency options.
(For additional frequencies, refer to
SiT9366
and
SiT9365
datasheets)
LVPECL, Low-swing LVPECL, LVDS and HCSL output
signaling
0.1ps RMS phase jitter (random) for Ethernet applications
Frequency stability as low ±10 ppm
Wide temperature range from -40°C to 105°C
Contact SiTime
for higher temperature range options
Industry-standard packages: 3.2 x 2.5 mm
2
, 7.0 x 5.0 mm
2
and 5.0 x 3.2 mm
2
package
Applications
100 Gbps Ethernet, SONET, SATA, SAS,
Fibre Channel
Telecom, networking, instrumentation, storage, servers
Block Diagram
Package Pinout
OE/NC
NC
GND
1
6
VDD
OUT-
OUT+
2
5
3
4
Figure 1. SiT9367 Block Diagram
Figure 2. Pin Assignments (Top view)
(Refer to
Table 6
for Pin Descriptions)
Rev 1.71
15 July 2021
www.sitime.com
SiT9367
220 MHz to 725 MHz Ultra-low Jitter Differential Oscillator
Ordering Information
SiT9367AC - 1B2-33E322.265625T
Part Family
“SiT9367”
Packaging
“T”, “Y”, “D” or “E”
Refer to table below for packing method
[1]
Leave Blank for Bulk
Revision Letter
“A” is the revision of Silicon
Frequency
Temperature Range
“C”: Extended Commercial, -20 to 70°C
“I”: Industrial, -40 to 85°C
“B”: -40 to 95°C
“E”: Extended Industrial, -40 to 105°C
220.00001 to 725 MHz for LVDS and
LVPECL output drivers
[2]
220.00001 to 500 MHz for HCSL driver
Feature Pin
“N”: No Connect
“E”: Output Enable
Signalling Type
“1”: LVPECL
“2”: LVDS
“4”: HCSL
“5”: Low-swing LVPECL
Voltage Supply
“25”: 2.5 V ±10%
“28”: 2.8 V ±10%
“30”: 3.0 V ±10%
“33”: 3.3 V ±10%
Package Size
“B”: 3.2 x 2.5 mm
“C”: 5.0 x 3.2 mm with center pad
“E”: 7.0 x 5.0 mm with center pad
Frequency Stability
“F”:
“1”:
“2”:
“3”:
±10 ppm
±20 ppm
±25 ppm
±50 ppm
Notes:
1. Bulk is available for sampling only.
2.
Contact SiTime
for higher frequency HCSL options.
Table 1. Ordering Codes for Supported Tape & Reel Packing Method
Device Size
(mm x mm)
7.0 x 5.0
5.0 x 3.2
3.2 x 2.5
D
E
8 mm T&R
(3ku)
8 mm T&R
(1ku)
12 mm T&R
(3ku)
T
12 mm T&R
(1ku)
Y
16 mm T&R
(3ku)
T
16 mm T&R
(1ku)
Y
Rev 1.71
Page 2 of 16
www.sitime.com
SiT9367
220 MHz to 725 MHz Ultra-low Jitter Differential Oscillator
TABLE OF CONTENTS
Description ................................................................................................................................................................................... 1
Features ....................................................................................................................................................................................... 1
Applications .................................................................................................................................................................................. 1
Block Diagram .............................................................................................................................................................................. 1
Package Pinout ............................................................................................................................................................................ 1
Ordering Information .................................................................................................................................................................... 2
Electrical Characteristics .............................................................................................................................................................. 4
Waveform Diagrams..................................................................................................................................................................... 9
Timing Diagrams ........................................................................................................................................................................ 10
Termination Diagrams ................................................................................................................................................................ 11
LVPECL and Low-swing LVPECL ....................................................................................................................................... 11
LVDS................................................................................................................................................................................... 12
HCSL .................................................................................................................................................................................. 12
Dimensions and Patterns ― 3.2 x 2.5 mm
2
................................................................................................................................ 13
Dimensions and Patterns ― 5.0 x 3.2 mm
2
................................................................................................................................ 13
Dimensions and Patterns ― 7.0 x 5.0 mm
2
................................................................................................................................ 14
Additional Information................................................................................................................................................................. 15
Revision History ......................................................................................................................................................................... 16
Rev 1.71
Page 3 of 16
www.sitime.com
SiT9367
220 MHz to 725 MHz Ultra-low Jitter Differential Oscillator
Electrical Characteristics
All Min and Max limits in the Electrical Characteristics tables are specified over temperature and rated operating voltage
with standard output termination shown in the termination diagrams. Typical values are at 25°C at nominal supply voltage.
Table 2. Electrical Characteristics – Common to LVPECL, Low-swing LVPECL, LVDS and HCSL
Parameter
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
220.000001
-10
-20
-25
-50
First Year Aging
5 Year Aging
10 Year Aging
20 Year Aging
Operating Temperature Range
F_1y
F_5y
F_10y
F_20y
T_use
-0.7
-1.1
-1.3
-1.5
-20
-40
-40
-40
Supply Voltage
Vdd
2.97
2.70
2.52
2.25
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Duty Cycle
Startup Time
OE Enable/Disable Time
VIH
VIL
Z_in
DC
T_start
T_oe
70%
45
Typ.
±0.4
±0.7
±0.8
±1.0
3.30
3.00
2.80
2.50
100
Max.
725
+10
+20
+25
+50
+0.7
+1.1
+1.3
+1.5
+70
+85
+95
+105
3.63
3.30
3.08
2.75
30%
-
55
3.0
3.8
Unit
MHz
ppm
ppm
ppm
ppm
ppm
ppm
ppm
ppm
°C
°C
°C
°C
V
V
V
V
Vdd
Vdd
%
ms
µs
Measured from the time Vdd reaches its rated minimum value.
f = 322.265625 MHz. Measured from the time OE pin reaches rated
VIH and VIL to the time clock pins reach 90% of swing and high-Z.
See
Figure 8
and
Figure 9
Pin 1, OE
Pin 1, OE
Pin 1, OE logic high or logic low
Extended Industrial
At 85°C
At 85°C
At 85°C
At 85°C
Extended Commercial
Industrial
Condition
Accurate to 6 decimal places
Inclusive of initial tolerance, operating temperature, rated power
supply voltage and load variations
Frequency Range
Frequency Stability
Temperature Range
Supply Voltage
Input Characteristics
Output Characteristics
Startup and OE Timing
Rev 1.71
Page 4 of 16
www.sitime.com
SiT9367
220 MHz to 725 MHz Ultra-low Jitter Differential Oscillator
Table 3. Electrical Characteristics – LVPECL Specific
Parameter
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
Output High Voltage
Output Low Voltage
Output Differential Voltage
Swing
Rise/Fall Time
RMS Period
Jitter
[3]
Symbol
Idd
I_OE
I_leak
I_driver
VOH
VOL
V_Swing
Tr, Tf
VOH
VOL
V_Swing
Tr, Tf
T_jitt
T_phj
Min.
Vdd-1.15
Vdd-2.0
1.2
Typ.
0.15
1.6
225
Max.
94
63
33
Vdd-0.7
Vdd-1.5
2.0
330
Unit
mA
mA
A
mA
V
V
V
ps
Condition
Excluding Load Termination Current, Vdd = 3.3 V or 2.5 V
OE = Low
OE = Low
Maximum average current drawn from OUT+ or OUT-
See
Figure 4
See
Figure 4
See
Figure 5
20% to 80%, see
Figure 5
Current Consumption
Output Characteristics for LVPECL
Output Characteristics for Low-swing LVPECL
Vdd-1.2
Vdd-0.75
V
See
Figure 4
Vdd-1.8
0.4
0.4
1
1
225
1.0
0.220
Vdd-1.25
1.2
1.6
320
1.6
0.270
V
V
V
ps
Ps
Ps
See
Figure 4
Output frequency 1 to 220 MHz, See
Figure 5
Output frequency greater than 220 MHz, See
Figure 5
20% to 80%. See
Figure 5
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. Temperature ranges -20 to 70ºC and
-40 to 85ºC.
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. Temperature ranges -40 to 95ºC and
-40 to 105ºC
f = 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, Includes spurs, all
Vdd levels
f = 100, 156.25 or 212.5 MHz, Vdd = 3.3 V or 2.5 V
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. Temperature ranges -20 to 70ºC and
-40 to 85ºC.
f = 322.265625 MHz, Integration bandwidth = 12 kHz to 20 MHz,
all Vdd levels, includes spurs. Temperature ranges -40 to 95ºC and
-40 to 105ºC
f = 322.265625 MHz, IEEE802.3-2005 10GbE jitter mask
integration bandwidth = 1.875 MHz to 20 MHz, Includes spurs, all
Vdd levels
Jitter – 7.0 x 5.0 mm Package
RMS Phase Jitter (random)
0.220
0.300
Ps
0.1
Ps
Jitter – 5.0 x 3.2 and 3.2 x 2.5 mm Packages
RMS Period Jitter
[3]
RMS Phase Jitter (random)
T_jitt
T_phj
1.0
0.225
1.6
0.282
Ps
ps
0.225
0.315
ps
0.1
ps
Notes:
3. Measured according to JESD65B.
Rev 1.71
Page 5 of 16
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