首页 > 器件类别 >

SL74HCU04

hex unbuffered inverters(high-performance silicon-gate cmos)

厂商名称:SLS

厂商官网:http://www.slsemicon.com

下载文档
文档预览
SL74HCU04
Hex Unbuffered Inverters
High-Performance Silicon-Gate CMOS
The SL74HCU04 is identical in pinout to the 74LS04. This contain
six independent unbuffered inverters. These inverters are well suited
for use as oscillators, pulse shapers and in many other applications
requiring a high-input impedance amplifier.
This device is characterized for over wide temperature ranges to
meet industry and ation over military specifications.
Low Power consumption characteristic of CMOS devices
Output drive capability: 10 LS TTL Loads Min.
Operating speed superior to LS TTL
Wide operating voltage range: 2.0 to 6.0 V
Low input current: 1.0
µA
Max.
Low quiescent current: 20µA Max.
High noise immunity characteristic of CMOS
Diode protection on all inputs
ORDERING INFORMATION
SL74HCU04N Plastic
SL74HCU04D SOIC
T
A
= -55° to 125° C for all packages
igh-Performance??Silicon-Gate
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
A
L
H
Output
Y
H
L
PIN 14 =V
CC
PIN 7 = GND
SLS
System Logic
Semiconductor
SL74HCU04
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +7.0
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±20
±25
±50
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
Min
2.0
0
-55
0
0
0
Max
6.0
V
CC
+125
1000
500
400
Unit
V
V
°C
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND≤(V
IN
or V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V ).
CC
Unused outputs must be left open.
SLS
System Logic
Semiconductor
SL74HCU04
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-
Level Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-
Level Output
Voltage
V
IN
=V
IH
or V
IL
I
OH
= -20
µA
V
IN
=V
IH
or V
IL
I
OH
= -4 mA
I
OH
= -5.2 mA
V
OL
Maximum Low-
Level Output
Voltage
V
IN
=V
IH
or V
IL
I
OL
= 20
µA
V
IN
=V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 5.2 mA
I
IN
I
CC
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or GND
V
IN
=V
CC
or GND
I
OUT
=0
µA
Test Conditions
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
Guaranteed Limit
25
°C
to
-55°C
1.7
3.6
4.8
0.3
0.8
1.1
1.8
4.0
5.5
3.86
5.36
0.2
0.5
0.5
0.32
0.32
±0.1
2.0
≤85
°C
1.7
3.6
4.8
0.3
0.8
1.1
1.8
4.0
5.5
3.76
5.26
0.2
0.5
0.5
0.37
0.37
±1.0
20
≤125
°C
1.7
3.6
4.8
0.3
0.8
1.1
1.8
4.0
5.5
3.7
5.2
0.2
0.5
0.5
0.4
0.4
±1.0
40
µA
µA
V
Unit
V
V
IL
V
V
OH
V
SLS
System Logic
Semiconductor
SL74HCU04
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
t
PLH
, t
PHL
Parameter
Maximum Propagation Delay, Input A to
Output Y (Figures 1 and 2)
Maximum Output Transition Time, Any Output
(Figures 1 and 2)
Maximum Input Capacitance
V
2.0
4.5
6.0
2.0
4.5
6.0
-
Guaranteed Limit
25
°C
to
-55°C
80
16
14
75
15
13
10
≤85°C
100
20
17
95
19
16
10
≤125°C
120
24
20
110
22
19
10
Unit
ns
t
TLH
, t
THL
ns
C
IN
pF
Power Dissipation Capacitance (Per Inverter)
C
PD
Used to determine the no-load dynamic power
consumption:
P
D
=C
PD
V
CC2
f+I
CC
V
CC
Typical @25°C,V
CC
=5.0 V
15
pF
Figure 1. Switching Waveforms
* Includes all probe and jig capacitance
Figure 2. Test Circuit
SLS
System Logic
Semiconductor
查看更多>
热门器件
热门资源推荐
器件捷径:
S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY
需要登录后才可以下载。
登录取消