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SM802141UMG

PLL FREQUENCY SYNTHESIZER

器件类别:模拟混合信号IC    信号电路   

厂商名称:Microchip(微芯科技)

厂商官网:https://www.microchip.com

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SM802141
ClockWorks Selectable 62.5MHz,
125MHz, 156.25MHz and 312.5MHz
Ultra-Low Jitter, LVPECL Frequency
Synthesizer
General Description
The SM802141 is a part of Micrel’s ClockWorks family of
devices and provides an extremely low-noise timing
solution for Ethernet clock signals.
The device operates from a 3.3V or 2.5V power supply
and synthesizes differential LVPECL output clocks at
62.5MHz, 125MHz, 156.25MHz or 312.5MHz, selectable
through logic control pins. The SM802141 accepts a
25MHz crystal or LVCMOS reference clock.
Data sheet and support documentation can be found on
Micrel’s web site at:
www.micrel.com.
Features
Configurable to generate up to four different LVPECL
clock frequencies
2.5V or 3.3V operating range
Typical phase jitter @ 125MHz
(12kHz to 20MHz): 255 fs
rms
Industrial temperature range (–40C to +85C)
Green, RoHS, and PFOS compliant
Available in 24-pin 4mm
4mm QFN package
Applications
Ethernet PHY
Storage networking (SAN, NAS)
Block Diagram
ClockWorks is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 •
http://www.micrel.com
April 2012
M9999-041812-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802141
Ordering Information
(1)
Part Number
SM802141UMG
SM802141UMGTR
Note:
1. Devices are Green, RoHS, and PFOS compliant.
Marking
802141
802141
Shipping
Tube
Tape and Reel
Temperature Range
–40C to +85C
–40C to +85C
Package
24-Pin QFN
24-Pin QFN
Pin Configuration
24-Pin QFN
(Top View)
Pin Description
Pin Number
19, 20
22, 23
24
2
3
4
Pin Name
/Q1, Q1
/Q2, Q2
VDDO2
VSSO2
PLL_BYPASS
XTAL_SEL
Pin Type
O, (DIF)
O, (DIF)
PWR
PWR
I, (SE)
I, (SE)
LVCMOS
LVCMOS
Pin Level
LVPECL
LVPECL
Pin Function
Differential Clock Output from Bank 1, 156.25MHz or
312.5MHz.
Differential Clock Output from Bank 2, 62.5MHz or 125MHz.
Power Supply for Output Bank 2.
Power Supply Ground for Output Bank 2.
PLL Bypass, Selects Output Source, 0 = Normal PLL
Operation, 1 = Output from Input Reference Clock or Crystal
45KΩ pull-down.
Selects PLL Input Reference Source (0 = REF_IN, 1 =
XTAL, 45KΩ pull-up).
April 2012
2
M9999-041812-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802141
Pin Description (Continued)
Pin Number
5, 11, 16, 18
1
13, 14, 15
17
21
8
9
10
6
7
12
Pin Name
TEST
VDD
VSS (Exposed Pad)
VDDO1
VSSO1
REF_IN
XTAL_IN
XTAL_OUT
FSEL
OE1
OE2
PWR
PWR
PWR
PWR
I, (SE)
I, (SE)
O, (SE)
I, (SE)
I, (SE)
I, (SE)
LVCMOS
XTAL
XTAL
LVCMOS
LVCMOS
LVCMOS
Pin
Type
Pin Level
Pin Function
Factory test pins. Do not connect anything to these pins.
Core Power Supply .
Core Power Supply Ground. The exposed pad must be
connected to the VSS ground plane.
Power Supply for Output Bank 1.
Power Supply Ground for Output Bank 1.
Reference Clock Input.
Crystal Reference Input. No load caps needed (see Figure 5).
Crystal Reference Output. No load caps needed (see Figure 5).
Frequency Select, 1 = 312.5/125 MHz, 0 = 156.25/62.5MHz,
45KΩ pull-up.
Output Enable, Q1 disables to tri-state, 0 = Disabled, 1 =
Enabled, 45KΩ pull-up.
Output Enable, Q2 disables to tri-state, 0 = Disabled, 1 =
Enabled, 45KΩ pull-up.
Truth Table
PLL_BYPASS
0
1
XTAL_SEL
0
1
OE1
1
1
1
1
OE2
1
1
1
1
INPUT
REF_IN
XTAL
OUTPUT
PLL
XTAL/REF_IN
0
1
1
0
Q1 Tri-State
Q2 Tri-State
Output Selection Table
XTAL_SEL
L
H (Default)
H (Default)
H (Default)
H (Default)
H (Default)
PLL_Bypass
H
H
L (Default)
L (Default)
L (Default)
L (Default)
F SEL
x
x
H (Default)
H (Default)
L
L
OE1
H
H
H
L
H
L
OE2
L
L
L
H
L
H
Div 1
x
x
10
10
20
20
Div 2
x
x
25
25
50
50
Q1
Q2
Reference Input
25
312.5
Hi-Z
156.25
Hi-Z
Hi-Z
Hi-Z
Hi-Z
125
Hi-Z
62.5
April 2012
3
M9999-041812-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802141
Absolute Maximum Ratings
(1)
Supply Voltage (V
DD
, V
DDO1/2
) ......................................+4.6V
Input Voltage (V
IN
) ..............................
0.50V
to V
DD
+ 0.5V
Lead Temperature (soldering, 20s)............................ 260°C
Case Temperature ..................................................... 115°C
Storage Temperature (T
s
) .........................
65C
to
150°C
Operating Ratings
(2)
Supply Voltage (V
DD
, V
DDO1/2
)............... +2.375V to +3.465V
Ambient Temperature (T
A
).......................... –40°C to +85°C
Junction Thermal Resistance
(3)
QFN (
JA
)
Still-Air......................................................... 50°C/W
QFN (
JB
)
Junction-to-Board ....................................... 30°C/W
DC Electrical Characteristics
(4)
V
DD
= V
DDO1, 2
= 3.3V
5%
or 2.5V
5%
V
DD
= 3.3V
5%
& V
DDO1,2
= 3.3V
5%
or 2.5V
5%
T
A
=
40C
to
85C.
Symbol
V
DD
, V
DDO1/2
V
DD
, V
DDO1/2
Parameter
2.5V Operating Voltage
3.3V Operating Voltage
62.5MHz; 1 output enabled
I
DD
XTAL
Supply Current V
DD
+ V
DDO
XTAL_SEL = 1
Outputs Open
125MHz; 1 output enabled
156.25MHz; 1 output enabled
312.5MHz; 1 output enabled
Condition
Min.
2.375
3.135
Typ.
2.5
3.3
80
86
88
97
125
mA
Max.
2.625
3.465
Units
V
V
LVPECL OUTPUT DC Electrical Characteristics
(4)
V
DD
= V
DDO1, 2
= 3.3V
5%
or 2.5V
5%
V
DD
= 3.3V
5%
& V
DDO1, 2
= 3.3V
5%
or 2.5V
5%,
T
A
=
40C
to
85C,
R
L
= 50Ω to V
DDO
2V
Symbol
V
OH
V
OL
V
SWING
Notes:
1.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied
at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
Package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB.
The circuit is designed to meet the AC and DC specifications shown in the above table(s) after thermal equilibrium has been established.
Parameter
Output High Voltage
Output Low Voltage
Output Voltage Swing
Condition
Min.
V
DDO
– 1.145
V
DDO
– 1.945
0.6
Typ.
V
DDO
– 0.97
V
DDO
– 1.77
0.8
Max.
V
DDO
– 0.845
V
DDO
– 1.645
1.0
Units
V
V
V
2.
3.
4.
April 2012
4
M9999-041812-A
hbwhelp@micrel.com
or (408) 955-1690
Micrel, Inc.
SM802141
LVCMOS (PLL_BYPASS, XTAL_SEL, OE1/2, FSEL) DC Electrical Characteristics
(4)
V
DD
= 3.3V
5%,
or 2.5V
5%,
T
A
=
40C
to
85C.
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
DD
= V
IN
= 3.465V
V
DD
= 3.465V, V
IN
= 0V
150
Condition
Min.
2
0.3
Typ.
Max.
V
DD
+ 0.3
0.8
150
Units
V
V
A
A
REF_IN DC Electrical Characteristics
(4)
V
DD
= 3.3V
5%,
or 2.5V
5%,
T
A
=
40C
to
85C.
Symbol
V
IH
V
IL
I
IN
Parameter
Input High Voltage
Input Low Voltage
Input Current
XTAL_SEL = V
IL
, V
IN
= 0V to V
DD
XTAL_SEL = V
IH
, V
IN
= V
DD
Condition
Min.
1.1
0.3
5
20
Typ.
Max.
V
DD
+ 0.3
0.6
5
Units
V
V
A
µA
Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitor, C0
Correlation Drive Level
Condition
10pF Load
Min.
Typ.
25
1
10
50
5
100
Max.
Units
MHz
pF
uW
Fundamental, Parallel Resonant
April 2012
5
M9999-041812-A
hbwhelp@micrel.com
or (408) 955-1690
查看更多>
参数对比
与SM802141UMG相近的元器件有:SM802141、SM802141UMGTR。描述及对比如下:
型号 SM802141UMG SM802141 SM802141UMGTR
描述 PLL FREQUENCY SYNTHESIZER Ultra-Low Jitter, LVPECL Frequency Ultra-Low Jitter, LVPECL Frequency
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