SNC745
16-bit Voice Processor
1. INTRODUCTION
SNC745 is a 64mins two-channel speech/melody and 4-channel wave-table melody
voice chip. It based on reduced 16-bit fixed-point DSP architecture. SNC745 provides
user some necessary and efficient DSP instructions. Furthermore, SNC745 provide one
10-bit PWM and one 10-bit DA converter to driving speaker for speech/melody output.
User can select PWM or DA by programming DA/PWM control register, and only one
function can be active at the same time.
2. FEATURES
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Power supply: 2.4V ~ 3.6V (for 2 battery application)
3.6V ~ 5.1V (for 3 battery application)
Built-in a 16-bit DSP (Very Light Structure)
Software-based voice/melody processing
Rich Function Instruction Set
System Clock
−
16MHz crystal or R-C type oscillator for system clock
−
0.25s real time clock is form 32768Hz crystal
8 MIPS CPU performance
I/O Ports:
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16 I/O pins (P0.0~P0.15) and 8 input pins (P1.0~P1.7)
−
P0.15 with IR carrier signal
RAM size: 2K*16 bits
High performance program ROM: 32K*16 bits
Data ROM size: 480K*16 bits
Total ROM size: 512K*16 bits
Maximum program size: 64K word
8 Interrupt Sources
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4 for Internal Timer (timer0, 1, 2 and RTC)
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4 for External (P0.0~P0.3)
Two voice/melody channels
Three 8-bit timer with auto-reload function
Built in a 10-bit PWM Direct Drive circuit and a fixed current D/A output
Sampling Rate: 6KHz ~16KHz
Built-in software voice synthesizer (multiple bit-rate solution 2Kbps, 3.6Kbps, 5Kbps,
6Kbps, 8Kbps, 10Kbps, 12Kbps, 14Kbps, 16Kbps, 20Kbps, 24Kbps and 29Kbps
@8K sampling rate)
Built-in software melody synthesizer includes the dual-tone melody and 4-ch
wave-table melody.
Low Voltage Reset
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Ver. 1.3
1
October 23, 2002
SNC745
16-bit Voice Processor
3. PIN ASSIGNMENT
Symbol
P0.0 ~ P0.15
P1.0 ~ P1.7
CVDD
VDD
GND
BP0
BN0
VO
XIN
XOUT
LXIN
LXOUT
CKSEL
RST
TEST
I/O
I/O
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Descriptions
I/O port 0
Input port 1
Positive power supply for core circuit
Positive power supply
Negative power supply
PWM output 1
PWM output 2
DA output
High speed clock crystal input / RC-type oscillator input
High speed clock crystal output / RC-type oscillator input
Low speed clock crystal input
Low speed clock crystal output
Crystal/RC-type oscillator select for high speed clock
Chip reset
For test only
Ver. 1.3
2
October 23, 2002
SNC745
16-bit Voice Processor
4. ROM TABLE
The total ROM size is 512K words. But only 64K words ROM for programming.
And 32K words of all is the high speed program ROM. The high-low speed ratio is 1:16,
that is to say, if the instruction cycle is two clocks at high speed ROM, the instruction cycle
will down to 32 clocks at low speed ROM.
0x000000
0x007FFF
0x008000
0x00FFFF
0x010000
Hi-Speed ROM
(32K words)
Low-Speed program
ROM
(32K words)
Low-Speed Data ROM (480K words)
Total ROM size (512K words)
Data ROM
0x07FFFF
Ver. 1.3
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October 23, 2002
SNC745
16-bit Voice Processor
5. RAM TABLE
Total RAM size is 2K words, and one bank is 512 words. If user need playing voice
(2Kbps, 3.6Kbps, 12Kbps, dual-tone melody and 4-ch wave-table melody), the system
will reserve 1.5K words RAM size.
0x0000
Bank0
0x01FF
0x0200
Bank1
0x03FF
0x0400
Bank2
0x05FF
0x0600
Bank3
0x07FF
Free for User
Reserved for
OS and Voice
Algorithm
6. System Clock
The system clock source also can be selected from 16Mhz crystal or ROSC. For the
ROSC, user should connect two resistors in the pin “XIN” and “XOUT” instead of 16MHZ
crystal. Beside, the clock source select pin “CKSEL” also should be connected to VDD
for ROSC.
In order to get an accurate system clock by ROSC, the real time clock
source is recommended to connect a 32768HZ crystal for system clock
calibration.
Ver. 1.3
4
October 23, 2002
SNC745
16-bit Voice Processor
7. I/O PORT
SNC745 provides one a 16-bit I/O port and an 8-bit input port for user application
(P0.0~P0.15, P1.0~P1.7). The input pull high resistor of each pin can be programmed by
Port Pull-High register. The direction of I/O port is selected by Port Direction register. The
Port0 (P0.0~P0.15) and Port1 (P1.0~P1.7) can wake the chip up from the stop mode and
watch mode. P0.15 can be modulated with a 38.5Khz carry signal to realize IR signal
transmission.
Pull-Up
Resister
Pull-Up
Select
In/Out
Control
PAD
Latch
to internal bus
In/Out
Control
I/O Configuration of P0.0~P0.15
Pull-Up
Resister
Pull-Up
Select
PAD
Digital In
Input Control
Input Port Configuration of Port 1 (P1.0~P1.7)
Ver. 1.3
5
October 23, 2002